A gigabit ethernet link source card.
A Link Source Card (LSC) has been developed which employs Gigabit Ethernet as the physical medium. The LSC is implemented as a mezzanine card compliant with the S-Link specifications, and is intended for use in development of the Region of Interest Building (ROIB) in the Level 2 Trigger of ATLAS. The LSC will be used to bring Region of Internet Fragments from Level 1 Trigger elements to the ROIB, and to transfer compiled Region of Interest Records to Supervisor Processors. The card uses the LSI 8101/8104 Media Access Controller (MAC) [1] and the Agilent HDMP-1636 Transceiver. An Altera 10K50A FPGA [2] is configured to provide several state machines which perform all the tasks on the card, such as formulating the Ethernet header, read/write registers in the MAC, etc. An on-card static RAM provides storage for 512K S-Link words, and a FIFO provides 4K buffering of input S-Link words. The LSC has been tested in a setup where it transfers data to a NIC in the PCI bus of a PC.
- Research Organization:
- Argonne National Lab., IL (US)
- Sponsoring Organization:
- US Department of Energy (US)
- DOE Contract Number:
- W-31-109-ENG-38
- OSTI ID:
- 801625
- Report Number(s):
- ANL-HEP-CP-02-77; TRN: US0205475
- Resource Relation:
- Conference: 8th Workshop on Electronics for LHC Experiments, Colmar (FR), 09/09/2002--09/13/2002; Other Information: PBD: 18 Sep 2002
- Country of Publication:
- United States
- Language:
- English
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