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Title: The data acquisition system for SLD

Conference ·
OSTI ID:7026821

This paper describes the data acquisition system planned for the SLD detector, which is being constructed for use with the SLAC Linear Collider (SLC). Analog electronics, heavily incorporating hybrid and custom VLSI circuitry, is mounted on the detector itself. Extensive use is made of multiplexing through optical fibers to a FASTBUS readout system. The low repetition rate of the SLC allows a relatively simple software-based trigger. Hardware and software processors within the acquisition modules are used to reduce the large volume of data per event and to calibrate the electronics. A farm of microprocessors is used for full reconstruction of a sample of events prior to transmission to the host.

Research Organization:
Stanford Linear Accelerator Center, Menlo Park, CA (USA)
DOE Contract Number:
AC03-76SF00515
OSTI ID:
7026821
Report Number(s):
SLAC-PUB-4108; CONF-861007-11; ON: DE87003260
Resource Relation:
Conference: Nuclear science and nuclear power systems symposium, Washington, DC, USA, 29 Oct 1986; Other Information: Portions of this document are illegible in microfiche products. Original copy available until stock is exhausted
Country of Publication:
United States
Language:
English