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Title: Microstore: the Stanford analog memory unit

Conference ·
OSTI ID:6116810

An NMOS device has been developed which provides high speed analog signal storage and readout for time expansion of transient signals. This device takes advantage of HMOS-1 VLSI technology to implement an array of 256 storage cells. Sequential samples of an input waveform can be taken every 5 ns while providing an effective sampling aperture time of less than 1 ns. The design signal-to-noise ratio is 1 part in 2000. Digital control circuitry is provided on the chip for controlling the read-in and read-out processes. A reference circuit is incorporated in the chip for first order compensation of leakage drifts, sampling pedestals, and temperature effects.

Research Organization:
Stanford Univ., CA (USA). Stanford Electronics Labs.; Stanford Linear Accelerator Center, CA (USA)
DOE Contract Number:
AC03-76SF00515
OSTI ID:
6116810
Report Number(s):
SLAC-PUB-3503; CONF-841007-61; ON: DE85005534
Resource Relation:
Conference: Nuclear science symposium, Orlando, FL, USA, 31 Oct 1984; Other Information: Portions of this document are illegible in microfiche products. Original copy available until stock is exhausted
Country of Publication:
United States
Language:
English