Programmable delay unit incorporating a semi-custom integrated circuit

Conference · Mon Apr 01 00:00:00 EST 1985

OSTI ID:5674185

Linstadt, E

The synchronization of SLC accelerator control and monitoring functions is realized by a CAMAC module, the PDU II (Programmable Delay Unit II, SLAC 253-002), which includes a semi-custom gate array integrated circuit. The PDU II distributes 16 channels of independently programmable delayed pulses to other modules within the same CAMAC crate. The delays are programmable in increments of 8.4 ns. Functional descriptions of both the module and the semi-custom integrated circuit used to generate the output pulses are given.

• Research Organization: Stanford Linear Accelerator Center, CA (USA)
• DOE Contract Number: AC03-76SF00515
• OSTI ID: 5674185
• Report Number(s): SLAC-PUB-3637; CONF-850504-72; ON: DE85013379
• Resource Relation: Conference: Particle accelerator conference, Vancouver, Canada, 13 May 1985; Other Information: Portions of this document are illegible in microfiche products. Original copy available until stock is exhausted
• Country of Publication: United States
• Language: English

Related Subjects

43 PARTICLE ACCELERATORS
STANFORD LINEAR COLLIDER
DELAY CIRCUITS
TIMING CIRCUITS
CAMAC SYSTEM
CONTROL SYSTEMS
ACCELERATOR FACILITIES
ACCELERATORS
ELECTRONIC CIRCUITS
LINEAR ACCELERATORS
430100* - Particle Accelerators- Design
Development
& Operation