Development of a front end controller/heap manager for PHENIX
A controller/heap manager has been designed for applicability to all detector subsystem types of PHENIX. the heap manager performs all functions associated with front end electronics control including ADC and analog memory control, data collection, command interpretation and execution, and data packet forming and communication. Interfaces to the unit consist of a timing and control bus, a serial bus, a parallel data bus, and a trigger interface. The topology developed is modular so that many functional blocks are identical for a number of subsystem types. Programmability is maximized through the use of flexible modular functions and implementation using field programmable gate arrays (FPGAs). Details of unit design and functionality will be discussed with particular detail given to subsystems having analog memory-based front end electronics. In addition, mode control, serial functions, and FPGA implementation details will be presented.
- Research Organization:
- Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC05-96OR22464
- OSTI ID:
- 435335
- Report Number(s):
- CONF-961123-8; ON: DE97001375
- Resource Relation:
- Conference: Institute of Electrical and Electronic Engineers (IEEE) nuclear science symposium and medical imaging conference, Anaheim, CA (United States), 2-9 Nov 1996; Other Information: PBD: [1996]
- Country of Publication:
- United States
- Language:
- English
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