Complementary HFET technology for low-power mixed-mode applications
Development of a complementary heterostructure field effect transistor (CHFET) technology for low-power, mixed-mode digital-microwave applications is presented. An earlier digital CHFET technology with independently optimizable transistors which operated with 319 ps loaded gate delays at 8.9 fJ is reviewed. Then work demonstrating the applicability of the digital nJFET device as a low-power microwave transistor in a hybrid microwave amplifier without any modification to the digital process is presented. A narrow band amplifier with a 0.7 {times} 100 {micro}m nJFET as the active element was designed, constructed, and tested. At 1 mW operating power, the amplifier showed 9.7 dB of gain at 2.15 GHz and a minimum noise figure of 2.5 dB. In addition, next generation CHFET transistors with sub 0.5 {micro}m gate lengths were developed. Cutoff frequencies, f{sub t} of 49 GHz and 11.5 GHz were achieved for n- and p-channel FETs with 0.3 and 0.4 {micro}m gates, respectively. These FETs will enable both digital and microwave circuits with enhanced performance.
- Research Organization:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 244632
- Report Number(s):
- SAND-96-1174C; CONF-960401-40; ON: DE96010523; TRN: AHC29613%%107
- Resource Relation:
- Conference: Spring meeting of the Materials Research Society (MRS), San Francisco, CA (United States), 8-12 Apr 1996; Other Information: PBD: [1996]
- Country of Publication:
- United States
- Language:
- English
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