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Title: Mask substrate requirements and development for extreme ultraviolet lithography (EUVL)

Abstract

The mask is deemed one of the areas that require significant research and development in EUVL. Silicon wafers will be used for mask substrates for an alpha-class EUVL exposure tool due to their low-defect levels and high quality surface finish. However, silicon has a large coefficient of thermal expansion that leads to unacceptable image distortion due to absorption of EUV light. A low thermal expansion glass or glass-ceramic is likely to be required in order to meet error budgets for the 70nm node and beyond. Since EUVL masks are used in reflection, they are coated with multilayers prior to patterning. Surface imperfections, such as polishing marks, particles, scratches, or digs, are potential nucleation sites for defects in the multilayer coating, which could result in the printed defects. Therefore we are accelerating developments in the defect reduction and surface finishing of low thermal expansion mask substrates in order to understand long-term issues in controlling printable defects, and to establish the infrastructure for supplying masks. In this paper, we explain the technical requirements for EUVL mask substrates and describe our efforts in establishing a SEMI standard for EUVL masks. We will also report on the early progress of our suppliers in producingmore » low thermal-expansion mask substrates for our development activities.« less

Authors:
; ; ;
Publication Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE Office of Defense Programs (DP) (US)
OSTI Identifier:
14670
Report Number(s):
UCRL-JC-135884
TRN: AH200129%%377
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Conference
Resource Relation:
Conference: 19th Annual Bay Area Chrom Users Society Symposium on Photomask Technology and Management, Monterey, CA (US), 09/15/1999--09/17/1999; Other Information: PBD: 28 Sep 1999
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; MASKING; ULTRAVIOLET RADIATION; ABSORPTION; DEFECTS; SILICON; SUBSTRATES; SURFACE FINISHING; THERMAL EXPANSION; PRINTED CIRCUITS

Citation Formats

Hector, S D, Shell, M, Taylor, J S, and Tong, W M. Mask substrate requirements and development for extreme ultraviolet lithography (EUVL). United States: N. p., 1999. Web.
Hector, S D, Shell, M, Taylor, J S, & Tong, W M. Mask substrate requirements and development for extreme ultraviolet lithography (EUVL). United States.
Hector, S D, Shell, M, Taylor, J S, and Tong, W M. 1999. "Mask substrate requirements and development for extreme ultraviolet lithography (EUVL)". United States. https://www.osti.gov/servlets/purl/14670.
@article{osti_14670,
title = {Mask substrate requirements and development for extreme ultraviolet lithography (EUVL)},
author = {Hector, S D and Shell, M and Taylor, J S and Tong, W M},
abstractNote = {The mask is deemed one of the areas that require significant research and development in EUVL. Silicon wafers will be used for mask substrates for an alpha-class EUVL exposure tool due to their low-defect levels and high quality surface finish. However, silicon has a large coefficient of thermal expansion that leads to unacceptable image distortion due to absorption of EUV light. A low thermal expansion glass or glass-ceramic is likely to be required in order to meet error budgets for the 70nm node and beyond. Since EUVL masks are used in reflection, they are coated with multilayers prior to patterning. Surface imperfections, such as polishing marks, particles, scratches, or digs, are potential nucleation sites for defects in the multilayer coating, which could result in the printed defects. Therefore we are accelerating developments in the defect reduction and surface finishing of low thermal expansion mask substrates in order to understand long-term issues in controlling printable defects, and to establish the infrastructure for supplying masks. In this paper, we explain the technical requirements for EUVL mask substrates and describe our efforts in establishing a SEMI standard for EUVL masks. We will also report on the early progress of our suppliers in producing low thermal-expansion mask substrates for our development activities.},
doi = {},
url = {https://www.osti.gov/biblio/14670}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Sep 28 00:00:00 EDT 1999},
month = {Tue Sep 28 00:00:00 EDT 1999}
}

Conference:
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