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Title: Cellular computational platform and neurally inspired elements thereof

Patent ·
OSTI ID:1333216

A cellular computational platform is disclosed that includes a multiplicity of functionally identical, repeating computational hardware units that are interconnected electrically and optically. Each computational hardware unit includes a reprogrammable local memory and has interconnections to other such units that have reconfigurable weights. Each computational hardware unit is configured to transmit signals into the network for broadcast in a protocol-less manner to other such units in the network, and to respond to protocol-less broadcast messages that it receives from the network. Each computational hardware unit is further configured to reprogram the local memory in response to incoming electrical and/or optical signals.

Research Organization:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC04-94AL85000
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Number(s):
9,501,738
Application Number:
13/966,127
OSTI ID:
1333216
Resource Relation:
Patent File Date: 2013 Aug 13
Country of Publication:
United States
Language:
English

References (14)

Microprocessor assemblies forming adaptive neural networks patent February 1989
Optical neural network and method patent September 1990
Multi-layer neural network employing multiplexed output neurons patent February 1992
Reprogrammable CNN and supercomputer patent October 1994
Two wavelength range photodiode demultiplexer and methods for using the same patent June 2014
A high-performance hybrid electrical-optical interconnection technology for high-speed electronic systems journal January 2001
Cellular neural networks: applications journal January 1988
A 16 × 16 Cellular Neural Network Universal Chip: The First Complete Single-Chip Dynamic Computer Array with Distributed Memory and with Gray-Scale Input-Output journal January 1998
Electrical and Optical On-Chip Interconnects in Scaled Microprocessors conference January 2005
Optical cellular processor architecture 1 : Principles journal January 1988
Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores
  • Cassidy, Andrew S.; Merolla, Paul; Arthur, John V.
  • 2013 International Joint Conference on Neural Networks (IJCNN 2013 - Dallas), The 2013 International Joint Conference on Neural Networks (IJCNN) https://doi.org/10.1109/IJCNN.2013.6707077
conference August 2013
Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores
  • Esser, Steve K.; Andreopoulos, Alexander; Appuswamy, Rathinakumar
  • 2013 International Joint Conference on Neural Networks (IJCNN 2013 - Dallas), The 2013 International Joint Conference on Neural Networks (IJCNN) https://doi.org/10.1109/IJCNN.2013.6706746
conference August 2013
A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm conference September 2011
Cognitive computing programming paradigm: A Corelet Language for composing networks of neurosynaptic cores
  • Amir, Arnon; Datta, Pallab; Risk, William P.
  • 2013 International Joint Conference on Neural Networks (IJCNN 2013 - Dallas), The 2013 International Joint Conference on Neural Networks (IJCNN) https://doi.org/10.1109/IJCNN.2013.6707078
conference August 2013