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Title: Method for reworkable packaging of high speed, low electrical parasitic power electronics modules through gate drive integration

Patent ·
OSTI ID:1279755

A multichip power module directly connecting the busboard to a printed-circuit board that is attached to the power substrate enabling extremely low loop inductance for extreme environments such as high temperature operation. Wire bond interconnections are taught from the power die directly to the busboard further enabling enable low parasitic interconnections. Integration of on-board high frequency bus capacitors provide extremely low loop inductance. An extreme environment gate driver board allows close physical proximity of gate driver and power stage to reduce overall volume and reduce impedance in the control circuit. Parallel spring-loaded pin gate driver PCB connections allows a reliable and reworkable power module to gate driver interconnections.

Research Organization:
Cree Fayetteville, Inc. Fayetteville, AR (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AR0000111
Assignee:
Cree Fayetteville, Inc. (Fayetteville, AR)
Patent Number(s):
9,407,251
Application Number:
14/100,288
OSTI ID:
1279755
Resource Relation:
Patent File Date: 2013 Dec 09
Country of Publication:
United States
Language:
English

References (9)

High power semiconductor assembly patent March 1994
Power semiconductor packaging patent December 2000
Surface mount semiconductor package, die-leadframe combination and leadframe therefor and method of mounting leadframes to surfaces of semiconductor die patent October 2001
Low-cost 3D flip-chip packaging technology for integrated power electronics modules patent August 2002
Power module and method of fabricating the same patent March 2010
Power semiconductor module and method of manufacturing the same patent May 2010
Double-sided package for power module patent August 2010
Package for high power density devices patent September 2011
Wafer scale package for high power devices patent February 2013

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