Method and apparatus for sub-hysteresis discrimination

De Geronimo, Gianluigi

Title: Method and apparatus for sub-hysteresis discrimination

Patent · Tue Dec 29 00:00:00 EST 2015

OSTI ID:1234203

De Geronimo, Gianluigi

Embodiments of comparator circuits are disclosed. A comparator circuit may include a differential input circuit, an output circuit, a positive feedback circuit operably coupled between the differential input circuit and the output circuit, and a hysteresis control circuit operably coupled with the positive feedback circuit. The hysteresis control circuit includes a switching device and a transistor. The comparator circuit provides sub-hysteresis discrimination and high speed discrimination.

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Research Organization:: Brookhaven National Laboratory (BNL), Upton, NY (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: AC02-98CH10886

Assignee:: Brookhaven Science Associates, LLC

Patent Number(s):: 9,225,325

Application Number:: 14/471,617

OSTI ID:: 1234203

Resource Relation:: Patent File Date: 2014 Aug 28

Country of Publication:: United States

Language:: English

References (12)

Precision CMOS comparator with hysteresis Laude, David P. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/4940907 US Patent Document 4,940,907	patent	July 1990
Programmable hysteresis comparator Abdi, Behrooz https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5155386 US Patent Document 5,155,386	patent	October 1992
Comparator circuit with variable hysteresis characteristic Matsubara, Kunihiro; Shimizu, Katsuya https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5166550 US Patent Document 5,166,550	patent	November 1992
Comparator circuit with hysteresis Marlow, C. Allen; Danstrom, Eric J. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/5656957 US Patent Document 5,656,957	patent	August 1997
Comparator circuit with built-in hysteresis offset Callahan, Jr., Michael J. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6208187 US Patent Document 6,208,187	patent	March 2001
Voltage monitor circuit with adjustable hysteresis using a single comparator Yee, Philip W. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6304088 US Patent Document 6,304,088	patent	October 2001
Fast-switching comparator with hysteresis Bray, Derek https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6362467 US Patent Document 6,362,467	patent	March 2002
Programmable logic integrated circuit devices with low voltage differential signaling capabilities Nguyen, Khai; Wang, Xiaobao; Kim, In Whan https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6535031 US Patent Document 6,535,031	patent	March 2003
Simplified comparator with digitally controllable hysteresis and bandwidth Cheng, Yi https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6982582 US Patent Document 6,982,582	patent	January 2006
Leakage balancing transistor for jitter reduction in CML to CMOS converters Rowley, Matthew D. https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7187207 US Patent Document 7,187,207	patent	March 2007
Comparator with amplitude and time hysteresis Xu, Chao https://doi.org/https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7714620 US Patent Document 7,714,620	patent	May 2010
VMM1—An ASIC for Micropattern Detectors De Geronimo, G.; Fried, J. IEEE Transactions on Nuclear Science, Vol. 60, Issue 3 https://doi.org/10.1109/TNS.2013.2258683	journal	June 2013

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