Wire like link for cycle reproducible and cycle accurate hardware accelerator
First and second field programmable gate arrays are provided which implement first and second blocks of a circuit design to be simulated. The field programmable gate arrays are operated at a first clock frequency and a wire like link is provided to send a plurality of signals between them. The wire like link includes a serializer, on the first field programmable gate array, to serialize the plurality of signals; a deserializer on the second field programmable gate array, to deserialize the plurality of signals; and a connection between the serializer and the deserializer. The serializer and the deserializer are operated at a second clock frequency, greater than the first clock frequency, and the second clock frequency is selected such that latency of transmission and reception of the plurality of signals is less than the period corresponding to the first clock frequency.
- Research Organization:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- B554331
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Number(s):
- 9,002,693
- Application Number:
- 13/342,128
- OSTI ID:
- 1177498
- Resource Relation:
- Patent File Date: 2012 Jan 02
- Country of Publication:
- United States
- Language:
- English
Wire like link for cycle reproducible and cycle accurate hardware accelerator
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patent | April 2015 |
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