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Title: Stress Intensity of Delamination in a Sintered-Silver Interconnection: Preprint

Conference ·
DOI:https://doi.org/10.4071/HITEC-WA26· OSTI ID:1150186

In automotive power electronics packages, conventional thermal interface materials such as greases, gels, and phase-change materials pose bottlenecks to heat removal and are also associated with reliability concerns. The industry trend is toward high thermal performance bonded interfaces for large-area attachments. However, because of coefficient of thermal expansion mismatches between materials/layers and resultant thermomechanical stresses, adhesive and cohesive fractures could occur, posing a reliability problem. These defects manifest themselves in increased thermal resistance. This research aims to investigate and improve the thermal performance and reliability of sintered-silver for power electronics packaging applications. This has been experimentally accomplished by the synthesis of large-area bonded interfaces between metalized substrates and copper base plates that have subsequently been subjected to thermal cycles. A finite element model of crack initiation and propagation in these bonded interfaces will allow for the interpretation of degradation rates by a crack-velocity (V)-stress intensity factor (K) analysis. A description of the experiment and the modeling approach are discussed.

Research Organization:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Organization:
USDOE Office of Energy Efficiency and Renewable Energy Vehicle Technologies Office
DOE Contract Number:
AC36-08GO28308
OSTI ID:
1150186
Report Number(s):
NREL/CP-5400-61598
Resource Relation:
Journal Volume: 2014; Journal Issue: HITEC; Conference: Presented at IMAPS/HiTEC, 13-15 May 2014, Albuquerque, New Mexico
Country of Publication:
United States
Language:
English

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