Hardware support for software controlled fast multiplexing of performance counters
Performance counters may be operable to collect one or more counts of one or more selected activities, and registers may be operable to store a set of performance counter configurations. A state machine may be operable to automatically select a register from the registers for reconfiguring the one or more performance counters in response to receiving a first signal. The state machine may be further operable to reconfigure the one or more performance counters based on a configuration specified in the selected register. The state machine yet further may be operable to copy data in selected one or more of the performance counters to a memory location, or to copy data from the memory location to the counters, in response to receiving a second signal. The state machine may be operable to store or restore the counter values and state machine configuration in response to a context switch event.
- Research Organization:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- B554331
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Number(s):
- 8,347,001
- Application Number:
- 12/684,429
- OSTI ID:
- 1082910
- Country of Publication:
- United States
- Language:
- English
Extended duration high resolution timer contained in two integrated circuits and having alternating data sequences provided from different integrated circuits
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patent | October 1995 |
Implementation-efficient multiple-counter value hardware performance counter
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patent | September 2007 |
Performance counters controlled by programmable logic
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patent | August 2000 |
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Hardware support for software controlled fast reconfiguration of performance counters
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