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Title: Deadlock-free class routes for collective communications embedded in a multi-dimensional torus network

Patent ·
OSTI ID:1082652

A computer implemented method and a system for routing data packets in a multi-dimensional computer network. The method comprises routing a data packet among nodes along one dimension towards a root node, each node having input and output communication links, said root node not having any outgoing uplinks, and determining at each node if the data packet has reached a predefined coordinate for the dimension or an edge of the subrectangle for the dimension, and if the data packet has reached the predefined coordinate for the dimension or the edge of the subrectangle for the dimension, determining if the data packet has reached the root node, and if the data packet has not reached the root node, routing the data packet among nodes along another dimension towards the root node.

Research Organization:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B554331
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
8,364,844
Application Number:
12/697,015
OSTI ID:
1082652
Resource Relation:
Patent File Date: 2010 Jan 29
Country of Publication:
United States
Language:
English

References (11)

A general theory for deadlock-free adaptive routing using a mixed set of resources journal January 2001
Torus routing element error handling and self-clearing with missing or extraneous control code feature patent June 2002
Configuring of networked system to permit replacement of failed modes and selection of alternate paths patent November 1997
Global tree network for computing structures enabling global processing operations patent January 2010
Collective network routing October 2006
Method and Apparatus for Routing Data in an Inter-Nodal Communications Lattice of a Massively Parallel Computer System by Dynamically Adjusting Local Routing Strategies patent-application April 2008
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks journal May 1987
Class network routing patent September 2009
Scalable Bus-Based On-Chip Interconnection Networks patent-application December 2010
Routing with Virtual Channels patent-application February 2009
Dynamically Rerouting Node Traffic on a Massively Parallel Computer System Using Hint Bits patent-application October 2008

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