Control system architecture: The standard and non-standard models
Control system architecture development has followed the advances in computer technology through mainframes to minicomputers to micros and workstations. This technology advance and increasingly challenging accelerator data acquisition and automation requirements have driven control system architecture development. In summarizing the progress of control system architecture at the last International Conference on Accelerator and Large Experimental Physics Control Systems (ICALEPCS) B. Kuiper asserted that the system architecture issue was resolved and presented a ``standard model``. The ``standard model`` consists of a local area network (Ethernet or FDDI) providing communication between front end microcomputers, connected to the accelerator, and workstations, providing the operator interface and computational support. Although this model represents many present designs, there are exceptions including reflected memory and hierarchical architectures driven by requirements for widely dispersed, large channel count or tightly coupled systems. This paper describes the performance characteristics and features of the ``standard model`` to determine if the requirements of ``non-standard`` architectures can be met. Several possible extensions to the ``standard model`` are suggested including software as well as the hardware architectural feature.
- Research Organization:
- Los Alamos National Laboratory (LANL), Los Alamos, NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- W-7405-ENG-36
- OSTI ID:
- 10161403
- Report Number(s):
- LA-UR-93-1853; CONF-930511-115; ON: DE93014546
- Resource Relation:
- Conference: PAC `93: international particle accelerator conference,Washington, DC (United States),17-20 May 1993; Other Information: PBD: [1993]
- Country of Publication:
- United States
- Language:
- English
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