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Title: Pixel detectors in 3D technologies for high energy physics

Conference ·
OSTI ID:1002012

This paper reports on the current status of the development of International Linear Collider vertex detector pixel readout chips based on multi-tier vertically integrated electronics. Initial testing results of the VIP2a prototype are presented. The chip is the second embodiment of the prototype data-pushed readout concept developed at Fermilab. The device was fabricated in the MIT-LL 0.15 {micro}m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 {micro}m{sup 2} pixels, laid out in an array of 48 x 48 pixels.

Research Organization:
Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
Sponsoring Organization:
USDOE Office of Science (SC)
DOE Contract Number:
AC02-07CH11359
OSTI ID:
1002012
Report Number(s):
FERMILAB-CONF-10-401-PPD; TRN: US1100472
Resource Relation:
Conference: Presented at IEEE International 3D System Integration Conference - 3DIC 2010, Munich, Germany, 16-18 Nov 2010
Country of Publication:
United States
Language:
English