A high-performance MPI implementation on a shared-memory vector supercomputer.

Journal Article · Wed Jan 01 00:00:00 EST 1997 · Parallel Comput.

DOI:https://doi.org/10.1016/S0167-8191(96)00062-2· OSTI ID:938039

Gropp, W; Lusk, E

In this article we recount the sequence of steps by which MPICH, a high-performance, portable implementation of the Message-Passing Interface (MPI) standard, was ported to the NEC SX-4, a high-performance parallel supercomputer. Each step in the sequence raised issues that are important for shared-memory programming in general and shed light on both MPICH and the SX-4. The result is a low-latency, very high bandwidth implementation of MPI for the NEC SX-4. In the process, MPICH was also improved in several general ways.

• Research Organization: Argonne National Lab. (ANL), Argonne, IL (United States)
• Sponsoring Organization: ER
• DOE Contract Number: DE-AC02-06CH11357
• OSTI ID: 938039
• Report Number(s): ANL/MCS-P651-0297; PACOEJ; TRN: US200906%%485
• Journal Information: Parallel Comput., Vol. 22, Issue 11 ; Jan. 1997; ISSN 0167-8191
• Country of Publication: United States
• Language: ENGLISH

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
IMPLEMENTATION
PROGRAMMING
VECTORS
SUPERCOMPUTERS
PARALLEL PROCESSING