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Title: Room temperature to cryogenic electrical interface

Patent ·
OSTI ID:7200014

A monolithic superconductive chip is described comprising: a. a substrate with a low temperature region and a high temperature region; b. a low temperature electronic circuit formed on the low temperature region and including an element which is superconductive when it has a temperature below a critical level; and c. electrical conductors formed on the substrate, the conductors being connected to the electronic circuit and traversing the substrate to the high temperature region.

Assignee:
Hypres, Inc., Elmsford, NY
Patent Number(s):
US 4739633
OSTI ID:
7200014
Resource Relation:
Patent File Date: Filed date 12 Nov 1985
Country of Publication:
United States
Language:
English