Circuit level modeling and parameterization of integrated circuit structures
The details of the structure and the underlying physical models for a computer-based solid-state device parameter extractor for SPICE (1), ICEPAR (Integrated Circuit Extraction of PARameters), based on IC fabrication process flow is described. These solid state devices currently include, Bipolar Junction Transistors (BJT's), junction diodes, and semiconductor resistors of almost arbitrary shapes. A detailed explanation is offered to demonstrate the capability of the ICEPAR software to control the terminal electrical characteristics of either a device or a complete integrated circuit, through variation of IC process parameter. In particular, procedures to subdivide the IC structure into a network of lumped simple-device regions are developed. The particular structures and geometrical specifications defining those regions and the methodology for assigning impurity concentration profiles to the corresponding regions is explained thoroughly. Subsequently, physically based mathematical models defining the SPICE parameters of the lumped devices are offered.
- Research Organization:
- University of Southern California, Los Angeles (USA)
- OSTI ID:
- 6968623
- Resource Relation:
- Other Information: Thesis (Ph. D.)
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
COMPUTERIZED CONTROL SYSTEMS
SEMICONDUCTOR DEVICES
PARAMETRIC ANALYSIS
FABRICATION
MATHEMATICAL MODELS
CONTROL SYSTEMS
MICROELECTRONIC CIRCUITS
420800* - Engineering- Electronic Circuits & Devices- (-1989)
990200 - Mathematics & Computers