Advanced MOSFET technologies for high-speed circuits and EPROM
In the first part of the thesis, two novel source-side injection EPROM (SI-EPROM) devices capable of 5-volt only, high-speed programming are studied. Both devices are asymmetrical n-channel stacked-gate MOSFETs, each with a short weak gate-control channel region introduced close to the source. Under high gate bias, a strong-channel electric field for hot-electron generation is created in this local region even at a relatively low drain voltage. Furthermore, the gate oxide field in this region is highly favorable for hot-electron injection into the floating-gate. As a results, a programming speed of 10..mu..s at a drain voltage of 5 volts was demonstrated with one of the SI-EPROM devices fabricated. In the second part of the thesis, technology design considerations accompanying MOSFET scaling are studied for high-speed analog circuits and densely packed digital circuits. It is shown that for sub-micron technologies, especially those for CMOS, the drain/source junction capacitances dominate device parasitic capacitances in digital applications. A novel MOS device structure that employs the COO and DOO schemes is described.
- Research Organization:
- California Univ., Berkeley (USA)
- OSTI ID:
- 6948740
- Resource Relation:
- Other Information: Thesis (Ph. D.)
- Country of Publication:
- United States
- Language:
- English
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