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Title: LOPOS; Advanced device isolation for a 0. 8. mu. CMOS/BULK process technology

Journal Article · · Journal of the Electrochemical Society; (USA)
DOI:https://doi.org/10.1149/1.2097120· OSTI ID:6836954
; ; ; ;  [1]
  1. General Electric Co., Schenectady, NY (USA). Corporate Research and Development Dept.

Local oxidation of polysilicon over silicon (LOPOS) isolation has been characterized for use in a 0.8 {mu}m CMOS/BULK process with reduced field oxide edge encroachment (bird's beak). Compared to the standard local oxidation of silicon (LOCOS) LOPOS adds a thin polysilicon layer between the stress relief oxide and the overlying nitride without changing the active area patterning procedure. To optimize the LOPOS structure, the thickness of the oxide and nitride layers was varied in a fully-factorial experiment, measuring the bird's beak and checking for the presence of silicon edge defects. It was found that for a 6000{Angstrom} field oxide the bird's beak can be safely reduced to {approx}0.3 {mu}m per side with LOPOS, which is significantly less than {approx}0.55 {mu}m with LOCOS. The corresponding stack consisted of 1500{Angstrom} Si{sub 3}N{sub 4}/550{Angstrom} polysilicon (undoped)/200{Angstrom} SiO{sub 2}. LOPOS fabricated diodes exhibited low leakage of {lt} 0.5 nA/cm{sup 2} and {lt} 0.5 pA/cm for the area and edge components, respectively, while MOS capacitors were breakdown-free up to 8 MV/cm during voltage-stress tests, compared to 6 MV/cm for LOCOS.

OSTI ID:
6836954
Journal Information:
Journal of the Electrochemical Society; (USA), Vol. 136:7; ISSN 0013-4651
Country of Publication:
United States
Language:
English

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