Total dose hardness of three commercial CMOS microelectronics foundries
Abstract
The authors have measured the effects of total ionizing dose (TID) on CMOS FETs, ring oscillators and field-oxide transistor test structures fabricated at three different commercial foundries with four different processes. The foundries spanned a range of integration levels and included Hewlett-Packard (HP) 0.5 {micro}m and 0.8 {micro}m processes, an Orbit 1.2 {micro}m process, and an AMI 1.6 {micro}m process. They found that the highest tolerance to TID was for the HP 0.5 {micro}m process, where the shift in NMOS threshold voltage was less than 40 mV at 300 krad. An examination of the dependence of the threshold voltage shift on gate oxide thickness indicated that oxides of the different commercial processes were of similar quality, and that the improvement in the total dose tolerance of the HP 0.5 {micro}m technology is associated with the scaling of the gate oxide. Measurements on field-oxide transistors from the HP 0.5 {micro}m process were shown not to invert for signal voltages at 300 krad, maintaining the integrity of the LOCOS isolation.
- Authors:
-
- Aerospace Corp., Los Angeles, CA (United States). Electronics Technology Center
- Publication Date:
- OSTI Identifier:
- 644144
- Report Number(s):
- CONF-970934-
Journal ID: IETNAE; ISSN 0018-9499; TRN: 98:008077
- Resource Type:
- Journal Article
- Journal Name:
- IEEE Transactions on Nuclear Science
- Additional Journal Information:
- Journal Volume: 45; Journal Issue: 3Pt3; Conference: RADECS 97: radiations and their effects on devices and systems conference, Cannes (France), 15-19 Sep 1997; Other Information: PBD: Jun 1998
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 44 INSTRUMENTATION, INCLUDING NUCLEAR AND PARTICLE DETECTORS; MOS TRANSISTORS; OSCILLATORS; PHYSICAL RADIATION EFFECTS; IONIZING RADIATIONS; COMPARATIVE EVALUATIONS; FABRICATION
Citation Formats
Osborn, J V, Lacoe, R C, Mayer, D C, and Yabiku, G. Total dose hardness of three commercial CMOS microelectronics foundries. United States: N. p., 1998.
Web. doi:10.1109/23.685223.
Osborn, J V, Lacoe, R C, Mayer, D C, & Yabiku, G. Total dose hardness of three commercial CMOS microelectronics foundries. United States. https://doi.org/10.1109/23.685223
Osborn, J V, Lacoe, R C, Mayer, D C, and Yabiku, G. 1998.
"Total dose hardness of three commercial CMOS microelectronics foundries". United States. https://doi.org/10.1109/23.685223.
@article{osti_644144,
title = {Total dose hardness of three commercial CMOS microelectronics foundries},
author = {Osborn, J V and Lacoe, R C and Mayer, D C and Yabiku, G},
abstractNote = {The authors have measured the effects of total ionizing dose (TID) on CMOS FETs, ring oscillators and field-oxide transistor test structures fabricated at three different commercial foundries with four different processes. The foundries spanned a range of integration levels and included Hewlett-Packard (HP) 0.5 {micro}m and 0.8 {micro}m processes, an Orbit 1.2 {micro}m process, and an AMI 1.6 {micro}m process. They found that the highest tolerance to TID was for the HP 0.5 {micro}m process, where the shift in NMOS threshold voltage was less than 40 mV at 300 krad. An examination of the dependence of the threshold voltage shift on gate oxide thickness indicated that oxides of the different commercial processes were of similar quality, and that the improvement in the total dose tolerance of the HP 0.5 {micro}m technology is associated with the scaling of the gate oxide. Measurements on field-oxide transistors from the HP 0.5 {micro}m process were shown not to invert for signal voltages at 300 krad, maintaining the integrity of the LOCOS isolation.},
doi = {10.1109/23.685223},
url = {https://www.osti.gov/biblio/644144},
journal = {IEEE Transactions on Nuclear Science},
number = 3Pt3,
volume = 45,
place = {United States},
year = {Mon Jun 01 00:00:00 EDT 1998},
month = {Mon Jun 01 00:00:00 EDT 1998}
}