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Title: Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS

Abstract

Significant improvements have been made in the radiation hardness of silicon-gate CMOS by reducing the gate oxide thickness. The device studied is an 8-bit arithmetic logic unit designed with Sandia's Expanded Linear Array (ELA) standard cells. Devices with gate oxide thicknesses of 400, 570 (standard), and 700 A were fabricated. Irradiations were done at a dose rate of 2 x 10/sup 6/ rads (Si) per hour. N- and P-channel maximum threshold shifts were reduced by 0.3 and 1.2 volts, respectively, for the thinnest oxide. Approximately, a linear relationship is found for threshold shift versus thickness. The functional radiation hardness of the full integrated circuit was also measured.

Authors:
;
Publication Date:
Research Org.:
Sandia National Labs., Livermore, CA (USA)
OSTI Identifier:
6294306
Report Number(s):
SAND-81-1680C; CONF-810707-7
ON: DE81027202; TRN: 81-014164
DOE Contract Number:  
AC04-76DP00789
Resource Type:
Conference
Resource Relation:
Conference: IEEE conference on nuclear science and space radiation, Seattle, WA, USA, 21 Jul 1981
Country of Publication:
United States
Language:
English
Subject:
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; INTEGRATED CIRCUITS; RADIATION HARDENING; MOS TRANSISTORS; SPECIFICATIONS; ELECTRONIC CIRCUITS; HARDENING; MICROELECTRONIC CIRCUITS; PHYSICAL RADIATION EFFECTS; RADIATION EFFECTS; SEMICONDUCTOR DEVICES; TRANSISTORS; 440200* - Radiation Effects on Instrument Components, Instruments, or Electronic Systems

Citation Formats

Nordstrom, T V, and Gibbon, C F. Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS. United States: N. p., 1981. Web.
Nordstrom, T V, & Gibbon, C F. Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS. United States.
Nordstrom, T V, and Gibbon, C F. 1981. "Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS". United States.
@article{osti_6294306,
title = {Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS},
author = {Nordstrom, T V and Gibbon, C F},
abstractNote = {Significant improvements have been made in the radiation hardness of silicon-gate CMOS by reducing the gate oxide thickness. The device studied is an 8-bit arithmetic logic unit designed with Sandia's Expanded Linear Array (ELA) standard cells. Devices with gate oxide thicknesses of 400, 570 (standard), and 700 A were fabricated. Irradiations were done at a dose rate of 2 x 10/sup 6/ rads (Si) per hour. N- and P-channel maximum threshold shifts were reduced by 0.3 and 1.2 volts, respectively, for the thinnest oxide. Approximately, a linear relationship is found for threshold shift versus thickness. The functional radiation hardness of the full integrated circuit was also measured.},
doi = {},
url = {https://www.osti.gov/biblio/6294306}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Thu Jan 01 00:00:00 EST 1981},
month = {Thu Jan 01 00:00:00 EST 1981}
}

Conference:
Other availability
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