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Title: The UCLA mirror processor

Abstract

This paper reports on the design and implementation of a VLSI RISC microprocessor, called UCLA Mirror Processor, which is capable of micro rollback. In order to achieve concurrent error detection, two Mirror Processor chips operated in lock-step, comparing external signs and a signature of internal signals every clock cycle. It a mismatch is detected, both processors roll back to the beginning of the cycle when the error occurred. In some cases erroneous state is corrected by copying a value from the fault-free processor to the faulty processor. The authors describe the architecture, microarchitecture, and VLSI implementation of the Mirror Processor, emphasizing its error-detection, error-recovery, and self-diagnosis capabilities.

Authors:
; ; ;
Publication Date:
OSTI Identifier:
5900393
Resource Type:
Book
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; FAULT TOLERANT COMPUTERS; MONITORS; MICROPROCESSORS; COMPUTER ARCHITECTURE; ERRORS; RELIABILITY; SIGNAL CONDITIONING; SYSTEMS ANALYSIS; COMPUTERS; DIGITAL COMPUTERS; ELECTRONIC CIRCUITS; MEASURING INSTRUMENTS; MICROELECTRONIC CIRCUITS; 990200* - Mathematics & Computers

Citation Formats

Tamir, Y, Liang, M, Lai, T, and Tremblay, M. The UCLA mirror processor. United States: N. p., 1991. Web.
Tamir, Y, Liang, M, Lai, T, & Tremblay, M. The UCLA mirror processor. United States.
Tamir, Y, Liang, M, Lai, T, and Tremblay, M. 1991. "The UCLA mirror processor". United States.
@article{osti_5900393,
title = {The UCLA mirror processor},
author = {Tamir, Y and Liang, M and Lai, T and Tremblay, M},
abstractNote = {This paper reports on the design and implementation of a VLSI RISC microprocessor, called UCLA Mirror Processor, which is capable of micro rollback. In order to achieve concurrent error detection, two Mirror Processor chips operated in lock-step, comparing external signs and a signature of internal signals every clock cycle. It a mismatch is detected, both processors roll back to the beginning of the cycle when the error occurred. In some cases erroneous state is corrected by copying a value from the fault-free processor to the faulty processor. The authors describe the architecture, microarchitecture, and VLSI implementation of the Mirror Processor, emphasizing its error-detection, error-recovery, and self-diagnosis capabilities.},
doi = {},
url = {https://www.osti.gov/biblio/5900393}, journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 01 00:00:00 EST 1991},
month = {Tue Jan 01 00:00:00 EST 1991}
}

Book:
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