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Title: Front end processing for a 100 MHZ Flash-ADC-System

Journal Article · · IEEE Trans. Nucl. Sci.; (United States)

An intelligent interface for readout of a high speed (100 MHz), multichannel Flash-ADC System is described. 3072 FADC channels are controlled and read by a system of 34 microprocessors M68000 placed at two different hierarchical levels. In addition to the readout itself, the processors perform a detailed pulse shape analysis necessary for a compact and manageable data format. The purpose of the system is to exploit the good double tract separation and time resolution provided by Flash-ADCs in conjunction with large drift chamber detectors such as JADE at PETRA and OPAL at LEP. Details of the system presently being installed at JADE are reviewed.

Research Organization:
Physikalisches Institut, Universitat Heidelberg, Philosophenweg 12, D-6900 Heidelberg
OSTI ID:
5494483
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Vol. NS-33:3
Country of Publication:
United States
Language:
English