Systolic and semisystolic design
Conference
·
OSTI ID:5170082
Architectural transformation techniques which can be used to help produce efficient systolic and semisystolic architectures for signal processing, image processing, numerical computation and raster graphics are identified. The transformations include: retiming, slowdown, broadcast and census elimination, coalescing, interlacing, code motion, resetting, register elimination and parallel/serial compromises. All the transformations are at the architectural or algorithmic level, as distinct from the electrical circuit level, and provide high-level tools for a designer. In addition, they provide a step toward automatic compilation of systolic and semisystolic systems. 12 references.
- OSTI ID:
- 5170082
- Resource Relation:
- Conference: Sponsored by IEEE, Port Chester, NY, USA, 31 Oct 1983
- Country of Publication:
- United States
- Language:
- English
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