Effective reduction of trap density at the Y{sub 2}O{sub 3}/Ge interface by rigorous high-temperature oxygen annealing
- Institute for Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Vienna (Austria)
- USTEM, Vienna University of Technology, Wiedner Hauptstraße 8-10, 10 40 Vienna (Austria)
- Integrated Devices and Circuits, KTH - School of ICT, Valhallavägen 79, Stockholm (Sweden)
The impact of thermal post deposition annealing in oxygen at different temperatures on the Ge/Y{sub 2}O{sub 3} interface is investigated using metal oxide semiconductor capacitors, where the yttrium oxide was grown by atomic layer deposition from tris(methylcyclopentadienyl)yttrium and H{sub 2}O precursors on n-type (100)-Ge substrates. By performing in-situ X-ray photoelectron spectroscopy, the growth of GeO during the first cycles of ALD was proven and interface trap densities just below 1 × 10{sup 11} eV{sup −1 }cm{sup −2} were achieved by oxygen annealing at high temperatures (550 °C–600 °C). The good interface quality is most likely driven by the growth of interfacial GeO{sub 2} and thermally stabilizing yttrium germanate.
- OSTI ID:
- 22402733
- Journal Information:
- Journal of Applied Physics, Vol. 116, Issue 21; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0021-8979
- Country of Publication:
- United States
- Language:
- English
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