Suspended InAs nanowire gate-all-around field-effect transistors
- Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871 (China)
- State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China)
Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs nanowires grown by molecular beam epitaxy. At room temperature, the transistors show a desired high on-state current I{sub on} of ∼10 μA and an on-off current ratio I{sub on}/I{sub off} of as high as 10{sup 6} at source-drain bias voltage of 50 mV and gate length of 1 μm with a gate underlap spacing of 1 μm from the source and from the drain. At low temperatures, the on-state current I{sub on} is only slightly reduced, while the ratio I{sub on}/I{sub off} is increased to 10{sup 7}. The field-effect mobility in the nanowire channels is also investigated and found to be ∼1500 cm{sup 2}/V s at room temperature and ∼2000 cm{sup 2}/V s at low temperatures. The excellent performance of the transistors is explained in terms of strong electrostatic and quantum confinements of carriers in the nanowires.
- OSTI ID:
- 22303532
- Journal Information:
- Applied Physics Letters, Vol. 105, Issue 11; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
Similar Records
Double-gate SnO{sub 2} nanowire electric-double-layer transistors with tunable threshold voltage
Encapsulated gate-all-around InAs nanowire field-effect transistors