Fourier spectrum based extraction of an equivalent trap state density in indium gallium zinc oxide transistors
- Department of Instrumentation and Applied Physics, Indian Institute of Science, Bangalore 560075 (India)
- Electrical Engineering Division, Department of Engineering, University of Cambridge, Cambridge CB3 0FA (United Kingdom)
- School of Physics, University of Melbourne, Parkville 3010 VIC (Australia)
- Department of Applied Physics, Korea University, 2511 Sejong-ro, Sejong-si 339-700 (Korea, Republic of)
Segregating the dynamics of gate bias induced threshold voltage shift, and in particular, charge trapping in thin film transistors (TFTs) based on time constants provides insight into the different mechanisms underlying TFTs instability. In this Letter we develop a representation of the time constants and model the magnitude of charge trapped in the form of an equivalent density of created trap states. This representation is extracted from the Fourier spectrum of the dynamics of charge trapping. Using amorphous In-Ga-Zn-O TFTs as an example, the charge trapping was modeled within an energy range of ΔE{sub t}≈ 0.3 eV and with a density of state distribution as D{sub t}(E{sub t−j})=D{sub t0}exp(−ΔE{sub t}/kT)with D{sub t0} = 5.02 × 10{sup 11} cm{sup −2} eV{sup −1}. Such a model is useful for developing simulation tools for circuit design.
- OSTI ID:
- 22300183
- Journal Information:
- Applied Physics Letters, Vol. 104, Issue 20; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
Similar Records
A thermalization energy analysis of the threshold voltage shift in amorphous indium gallium zinc oxide thin film transistors under simultaneous negative gate bias and illumination
Effects of low-temperature (120 °C) annealing on the carrier concentration and trap density in amorphous indium gallium zinc oxide thin film transistors