Achieving clean epitaxial graphene surfaces suitable for device applications by improved lithographic process
- George Mason University, 4400 University Dr., Fairfax, Virginia 22030 (United States)
- U.S. Naval Research Laboratory, 4555 Overlook Ave. SW, Washington, D.C. 20375 (United States)
- Sotera Defense Solutions, 2200 Defense Hwy. Suite 405, Crofton, Maryland 21114 (United States)
It is well-known that the performance of graphene electronic devices is often limited by extrinsic scattering related to resist residue from transfer, lithography, and other processes. Here, we report a polymer-assisted fabrication procedure that produces a clean graphene surface following device fabrication by a standard lithography process. The effectiveness of this improved lithography process is demonstrated by examining the temperature dependence of epitaxial graphene-metal contact resistance using the transfer length method for Ti/Au (10 nm/50 nm) metallization. The Landauer-Buttiker model was used to explain carrier transport at the graphene-metal interface as a function of temperature. At room temperature, a contact resistance of 140 Ω-μm was obtained after a thermal anneal at 523 K for 2 hr under vacuum, which is comparable to state-of-the-art values.
- OSTI ID:
- 22300110
- Journal Information:
- Applied Physics Letters, Vol. 104, Issue 22; Other Information: (c) 2014 AIP Publishing LLC; Country of input: International Atomic Energy Agency (IAEA); ISSN 0003-6951
- Country of Publication:
- United States
- Language:
- English
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