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Title: Zinc-oxide charge trapping memory cell with ultra-thin chromium-oxide trapping layer

Journal Article · · AIP Advances
DOI:https://doi.org/10.1063/1.4832237· OSTI ID:22251458
; ;  [1];  [2]
  1. Institute Center for Microsystems – iMicro, Department of Electrical Engineering and Computer Science (EECS), Masdar Institute of Science and Technology Abu Dhabi (United Arab Emirates)
  2. Department of Electrical and Electronics Engineering, Bilkent University, 06800 Ankara (Turkey)

A functional zinc-oxide based SONOS memory cell with ultra-thin chromium oxide trapping layer was fabricated. A 5 nm CrO{sub 2} layer is deposited between Atomic Layer Deposition (ALD) steps. A threshold voltage (V{sub t}) shift of 2.6V was achieved with a 10V programming voltage. Also for a 2V V{sub t} shift, the memory with CrO{sub 2} layer has a low programming voltage of 7.2V. Moreover, the deep trapping levels in CrO{sub 2} layer allows for additional scaling of the tunnel oxide due to an increase in the retention time. In addition, the structure was simulated using Physics Based TCAD. The results of the simulation fit very well with the experimental results providing an understanding of the charge trapping and tunneling physics.

OSTI ID:
22251458
Journal Information:
AIP Advances, Vol. 3, Issue 11; Other Information: (c) 2013 Author(s); Country of input: International Atomic Energy Agency (IAEA); ISSN 2158-3226
Country of Publication:
United States
Language:
English