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Title: Worst case total dose radiation response of 0.35 {micro}m SOI CMOSFETs

Journal Article · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers)
DOI:https://doi.org/10.1109/23.819159· OSTI ID:20014746

Through experimental results and analysis by TSUPREM4/MEDICI simulations, the worst case back gate total dose bias condition is established for body tied SOI NMOSFETs. Utilizing the worst-case bias condition, a recently proposed model that describes the back n-channel threshold voltage shift as a function of total dose, TSUPREM4/MEDICI simulations, and circuit level SPICE simulations, a methodology to model post-rad standby current is developed and presented. This methodology requires the extraction of fundamental starting material/material preparation constants, and then can be utilized to examine post-rad stand-by current at the device and circuit level as function of total dose. Good agreement between experimental results and simulations is demonstrated.

Research Organization:
Honeywell Solid State Electronics Center, Plymouth, MN (US)
OSTI ID:
20014746
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers), Vol. 46, Issue 6Pt1; Conference: 1999 IEEE Nuclear and Space Radiation Effects Conference, Norfolk, VA (US), 07/12/1999--07/16/1999; Other Information: PBD: Dec 1999; ISSN 0018-9499
Country of Publication:
United States
Language:
English