The impact of software and CAE tools on SEU in field programmable gate arrays

Journal Article · Wed Dec 01 00:00:00 EST 1999 · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers)

DOI:https://doi.org/10.1109/23.819108· OSTI ID:20014700

Katz, R; Wang, J; McCollum, J; Cronquist, B

Field programmable gate array (FPGA) devices, heavily used in spacecraft electronics, have grown substantially in size over the past few years, causing designers to work at a higher conceptual level, with computer aided engineering (CAE) tools synthesizing and optimizing the logic from a description. It is shown that the use of commercial-off-the-shelf (COTS) CAE tools can produce unreliable circuit designs when the device is used in a radiation environment and a flip-flop is upset. At a lower level, software can be used to improve the SEU performance of a flip-flop, exploiting the configurable nature of FPGA technology and on-chip delay, parasitic resistive, and capacitive circuit elements.

• Research Organization: National Aeronautics and Space Administration, Goddard Space Flight Center, Greenbelt, MD (US)
• OSTI ID: 20014700
• Journal Information: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers), Vol. 46, Issue 6Pt1; Conference: 1999 IEEE Nuclear and Space Radiation Effects Conference, Norfolk, VA (US), 07/12/1999--07/16/1999; Other Information: PBD: Dec 1999; ISSN 0018-9499
• Country of Publication: United States
• Language: English

Related Subjects

44 INSTRUMENTATION
42 ENGINEERING
PHYSICAL RADIATION EFFECTS
FAILURES
GATING CIRCUITS
COMPUTER-AIDED DESIGN
COMPUTER CODES