GaN Initiative for Grid Applications (GIGA)
- MIT Lincoln Lab., Lexington, MA (United States)
For nearly 4 ½ years, MIT Lincoln Laboratory (MIT/LL) led a very successful, DoE-funded team effort to develop GaN-on-Si materials and devices, targeting high-voltage (>1 kV), high-power, cost-effective electronics for grid applications. This effort, called the GaN Initiative for Grid Applications (GIGA) program, was initially made up of MIT/LL, the MIT campus group of Prof. Tomas Palacios (MIT), and the industrial partner M/A Com Technology Solutions (MTS). Later in the program a 4th team member was added (IQE MA) to provide commercial-scale GaN-on-Si epitaxial materials. A basic premise of the GIGA program was that power electronics, for ubiquitous utilization -even for grid applications - should be closer in cost structure to more conventional Si-based power electronics. For a number of reasons, more established GaN-on-SiC or even SiC-based power electronics are not likely to reach theses cost structures, even in higher manufacturing volumes. An additional premise of the GIGA program was that the technical focus would be on materials and devices suitable for operating at voltages > 1 kV, even though there is also significant commercial interest in developing lower voltage (< 1 kV), cost effective GaN-on-Si devices for higher volume applications, like consumer products. Remarkable technical progress was made during the course of this program. Advances in materials included the growth of high-quality, crack-free epitaxial GaN layers on large-diameter Si substrates with thicknesses up to ~5 μm, overcoming significant challenges in lattice mismatch and thermal expansion differences between Si and GaN in the actual epitaxial growth process. Such thick epilayers are crucial for high voltage operation of lateral geometry devices such as Schottky barrier (SB) diodes and high electron mobility transistors (HEMTs). New “Normally-Off” device architectures were demonstrated – for safe operation of power electronics circuits. The trade-offs between lateral and vertical devices were explored, with the conclusion that lateral devices are superior for fundamental thermal reasons, as well as for the demonstration of future generations of monolithic power circuits. As part of the materials and device investigations breakdown mechanisms in GaN-on-Si structures were fully characterized and effective electric field engineering was recognized as critical for achieving even higher voltage operation. Improved device contact technology was demonstrated, including the first gold-free metallizations (to enable processing in CMOS foundries) while maintaining low specific contact resistance needed for high-power operation and 5-order-of magnitude improvement in device leakage currents (essential for high power operation). In addition, initial GaN-on-Si epitaxial growth was performed on 8”/200 mm Si starting substrates.
- Research Organization:
- MIT Lincoln Lab., Lexington, MA (United States). Air Force Electronic System Ctr
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- OE0000121
- OSTI ID:
- 1214270
- Country of Publication:
- United States
- Language:
- English
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