A 4H Silicon Carbide Gate Buffer for Integrated Power Systems

Journal Article · Sat Feb 01 00:00:00 EST 2014 · IEEE Transactions on Power Electronics

DOI:https://doi.org/10.1109/TPEL.2013.2271906· OSTI ID:1211434

Ericson, N; Frank, S; Britton, C; Marlino, L; Ryu, SH; Grider, D; Mantooth, A; Francis, M; Lamichhane, R; Mudholkar, M; Shepherd, P; Glover, M; Valle-Mayorga, J; McNutt, T; Barkley, A; Whitaker, B; Cole, Z; Passmore, B; Lostetter, A

A gate buffer fabricated in a 2-mu m 4H silicon carbide (SiC) process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics, simulation results, and directions for future improvement of this buffer are presented. In addition, plans for its incorporation into an isolated high-side/low-side gate-driver architecture, fully integrated with power switching devices in a SiC process, are briefly discussed. This letter represents the first reported MOSFET-based gate buffer fabricated in 4H SiC.

• Sponsoring Organization: USDOE Advanced Research Projects Agency - Energy (ARPA-E)
• DOE Contract Number: DE-AR-0000111
• OSTI ID: 1211434
• Journal Information: IEEE Transactions on Power Electronics, Vol. 29, Issue 2; ISSN 0885-8993
• Country of Publication: United States
• Language: English