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Title: Register file soft error recovery

Patent ·
OSTI ID:1176530
; ; ; ;

Register file soft error recovery including a system that includes a first register file and a second register file that mirrors the first register file. The system also includes an arithmetic pipeline for receiving data read from the first register file, and error detection circuitry to detect whether the data read from the first register file includes corrupted data. The system further includes error recovery circuitry to insert an error recovery instruction into the arithmetic pipeline in response to detecting the corrupted data. The inserted error recovery instruction replaces the corrupted data in the first register file with a copy of the data from the second register file.

Research Organization:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
B554331
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Number(s):
8,560,924
Application Number:
12/652,360
OSTI ID:
1176530
Resource Relation:
Patent File Date: 2010 Jan 05
Country of Publication:
United States
Language:
English

References (10)

Method, system, and computer program product for handling errors in a cache without processor core recovery patent July 2011
Fault recovery processing for supercomputer patent January 1994
Replay mechanism for correcting soft errors patent March 2008
Memory correction scheme using spare arrays patent April 1986
On-board scrubbing of soft errors memory module patent February 2002
Methods and structure for error correction in a processor pipeline patent May 2008
Bidirectional authentication for HTML form processing patent January 2011
Using hardware or firmware for cache tag and data ECC soft error correction patent October 2004
Firmware mechanism for correcting soft errors patent September 2003
Soft error handling in microprocessors patent March 2009

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Related Subjects

97 MATHEMATICS AND COMPUTING