I/O control system using buffer full/empty and zero words signals to control DMA read/write commands
|
patent
|
June 1990 |
Network communications adapter with dual interleaved memory banks servicing multiple processors
|
patent
|
June 1990 |
Congestion free packet network
|
patent
|
September 1991 |
Bulk-synchronous parallel computer
|
patent
|
January 1992 |
Memory management system and method for network controller
|
patent
|
August 1992 |
Activity monitor system non-obtrusive statistical monitoring of operations on a shared bus of a multiprocessor system
|
patent
|
March 1993 |
Dynamic routing system for a multinode communications network
|
patent
|
June 1993 |
Link-by-link congestion control for packet transmission systems
|
patent
|
June 1994 |
Message routing in a multiprocessor computer system
|
patent
|
September 1994 |
Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system
|
patent
|
July 1995 |
Inter-processor communication system in which messages are stored at locations specified by the sender
|
patent
|
September 1995 |
Technique for accomplishing deadlock free routing through a multi-stage cross-point packet switch
|
patent
|
September 1995 |
Method and system for routing packets in a packet communication network using locally constructed routing tables
|
patent
|
January 1996 |
Message passing system for distributed shared memory multiprocessor system and message passing method using the same
|
patent
|
April 1997 |
Static routing system
|
patent
|
October 1997 |
Apparatus and method for packetizing and segmenting MPEG packets
|
patent
|
November 1997 |
Barrier and eureka synchronization architecture for multiprocessors
|
patent
|
February 1998 |
Multimedia communication apparatus and methods
|
patent
|
May 1998 |
Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer
|
patent
|
July 1998 |
Message-passing multiprocessor system
|
patent
|
August 1998 |
System and method for transmission rate control in a segmentation and reassembly (SAR) circuit under ATM protocol
|
patent
|
August 1998 |
Bridge/router architecture for high performance scalable networking
|
patent
|
September 1998 |
Parallel I/O network file server architecture
|
patent
|
September 1998 |
Communication system and method providing optimal restoration of failed paths
|
patent
|
November 1998 |
Parallel computer system with communications network for selecting computer nodes for barrier synchronization
|
patent
|
July 1999 |
Source routing for connection-oriented network with repeated call attempts for satisfying user-specified QOS parameters
|
patent
|
August 1999 |
Computer system data I/O by reference among I/O devices and multiple memory units
|
patent
|
September 1999 |
Asynchronous packet switching
|
patent
|
September 1999 |
Independent simultaneous queueing of message descriptors
|
patent
|
October 1999 |
Method and apparatus for providing quality of service routing in a network
|
patent
|
November 1999 |
Signaling communication events in a computer network
|
patent
|
May 2000 |
Multi-tasking adapter for parallel network applications
|
patent
|
June 2000 |
Integrating switching and facility networks using ATM
|
patent
|
June 2000 |
Seralized race-free virtual barrier network
|
patent
|
July 2000 |
I/O protocol for highly configurable multi-node processing system
|
patent
|
August 2000 |
System for providing transaction indivisibility in a transaction processing system upon recovery from a host processor failure by monitoring source message sequencing
|
patent
|
December 2000 |
Flow control system using control information of a message for initiating retransmission of data portion when buffer is available
|
patent
|
January 2002 |
System for parsing a packet for conformity with a predetermined protocol using mask and comparison values included in a parsing instruction
|
patent
|
March 2002 |
Agile optical-core distributed packet switch
|
patent
|
November 2002 |
Hardware event based flow control of counters
|
patent
|
February 2003 |
Method of responding to I/O request and associated reply descriptor
|
patent
|
July 2003 |
System and method for allocating buffers for message passing in a shared-memory computer system
|
patent
|
July 2003 |
Method and apparatus for write-back caching with minimal interrupts
|
patent
|
March 2004 |
Method and apparatus for improving bus efficiency given an array of frames to transmit
|
patent
|
May 2004 |
Mechanism for completing messages in memory
|
patent
|
June 2004 |
Method and apparatus for load balancing of parallel servers in a network environment
|
patent
|
June 2004 |
System and method for efficient data transfer management
|
patent
|
June 2004 |
Network adaptor card with reverse proxy and cache and method implemented therewith
|
patent
|
October 2004 |
Method and apparatus for temperature throttling the access frequency of an integrated circuit
|
patent
|
January 2005 |
Data communication among processes of a network component
|
patent
|
January 2005 |
Methods, system and article of manufacture for pre-fetching descriptors
|
patent
|
February 2005 |
System and method for policing multiple data flows and multi-protocol data flows
|
patent
|
May 2005 |
Method and apparatus for discarding data packets through the use of descriptors
|
patent
|
December 2005 |
Descriptor-based load balancing
|
patent
|
December 2005 |
Apparatus and method for programmable memory access slot assignment
|
patent
|
April 2006 |
Apparatus and method for responding to a interruption of a packet flow to a high level data link controller in a signal processing system
|
patent
|
May 2006 |
Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices
|
patent
|
August 2006 |
Buffer management technique for a hypertransport data path protocol
|
patent
|
September 2006 |
Protocol agnostic web listener
|
patent
|
October 2006 |
Tables with direct memory access descriptor lists for distributed direct memory access
|
patent
|
December 2006 |
Method and apparatus for storing data in flash memory
|
patent
|
December 2006 |
Fast-path apparatus for receiving data corresponding a TCP connection
|
patent
|
June 2007 |
Deficit-based striping algorithm
|
patent
|
January 2008 |
Multiprocessor node controller circuit and method
|
patent
|
July 2008 |
Parallel processing systems and method
|
patent
|
August 2008 |
Mirror queue in a shared queue environment
|
patent
|
December 2008 |
System and method for remote direct memory access without page locking by the operating system
|
patent
|
May 2009 |
Identifying messaging completion in a parallel computer by checking for change in message received and transmitted count at each node
|
patent
|
June 2009 |
Chaining direct memory access data transfer operations for compute nodes in a parallel computer
|
patent
|
September 2010 |
Low latency, high bandwidth data communications between compute nodes in a parallel computer
|
patent
|
November 2010 |
Message communications of particular message types between compute nodes using DMA shadow buffers
|
patent
|
November 2010 |
Direct memory access transfer completion notification
|
patent
|
February 2011 |
Query performance data on parallel computer system having compute nodes
|
patent
|
August 2012 |
Method and apparatus for advanced interprocess communication
|
patent
|
October 2012 |
Method and system for scheduled streaming of best effort data
|
patent-application
|
May 2003 |
Communications system using rings architecture
|
patent-application
|
October 2003 |
DMA controller and method for checking address of data to be transferred with DMA
|
patent-application
|
December 2003 |
Method and system for transmitting data in a packet based communication network
|
patent-application
|
January 2004 |
Controlling flow of data between data processing systems via a memory
|
patent-application
|
March 2004 |
Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer
|
patent-application
|
April 2004 |
Method and apparatus for implementing packet work area accesses and buffer sharing
|
patent-application
|
November 2004 |
Packet sequence maintenance with load balancing, and head-of-line blocking avoidance in a switch
|
patent-application
|
January 2005 |
Systems and methods for processing packets
|
patent-application
|
January 2005 |
Direct memory access using memory descriptor list
A
|
patent-application
|
February 2005 |
Multi-dimensional lattice network
|
patent-application
|
March 2005 |
Exponential channelized timer
|
patent-application
|
April 2005 |
System and method for high performance message passing
|
patent-application
|
April 2005 |
Adaptive source routing and packet processing
|
patent-application
|
May 2005 |
Software configurable cluster-based router using heterogeneous nodes as cluster nodes
|
patent-application
|
May 2005 |
Method for performing DMA transfers with dynamic descriptor structure
|
patent-application
|
May 2005 |
Lightweight input/output protocol
|
patent-application
|
September 2005 |
Hardware filtering support for denial-of-service attacks
|
patent-application
|
September 2005 |
Information display apparatus, information display method, and computer program
|
patent-application
|
December 2005 |
Multiple instances of the same type of processing module within a layered communication stack
|
patent-application
|
January 2006 |
Failover mechanisms in RDMA operations
|
patent-application
|
March 2006 |
Early interrupt notification in RDMA and in DMA operations
|
patent-application
|
March 2006 |
RDMA server (OSI) global TCE tables
|
patent-application
|
March 2006 |
Interface internet protocol fragmentation of large broadcast packets in an environment with an unaccommodating maximum transfer unit
|
patent-application
|
March 2006 |
Message queue tuning
|
patent-application
|
March 2006 |
Remote direct memory access system and method
|
patent-application
|
April 2006 |
Memory-controller-embedded apparatus and procedure for achieving system-directed checkpointing without operating-system kernel support
|
patent-application
|
July 2006 |
Host buffer queues
|
patent-application
|
July 2006 |
Concurrency technique for shared objects
|
patent-application
|
July 2006 |
Data transfer system and data transfer method
|
patent-application
|
August 2006 |
Methods and systems for dynamic parallel processing
|
patent-application
|
August 2006 |
DMA engine for protocol processing
|
patent-application
|
September 2006 |
Method and system for configuring a timer
|
patent-application
|
September 2006 |
Collective network routing
|
|
October 2006 |
Apparatus and method for packet transmission over a high speed network supporting remote direct memory access operations
|
patent-application
|
October 2006 |
Virtualization for device sharing
|
patent-application
|
November 2006 |
Third party node initiated remote direct memory access
|
patent-application
|
February 2007 |
Apparatus and method for stateless CRC calculation
|
patent-application
|
July 2007 |
Methods and systems for providing a secure electronic mailbox
|
patent-application
|
July 2007 |
Tightly Coupled Scalar And Boolean Processor
|
patent-application
|
July 2007 |
Methods and apparatus to implement parallel transactions
|
patent-application
|
August 2007 |
Recoverable error detection for concurrent computing programs
|
patent-application
|
January 2008 |
Executing an Allgather Operation with an Alltoallv Operation in a Parallel Computer
|
patent-application
|
January 2008 |
Packet transferring/transmitting method and mobile communication system
|
patent-application
|
May 2008 |
RDMA systems and methods for sending commands from a source node to a target node for local execution of commands at the target node
|
patent-application
|
May 2008 |
Data Flow Control Within and Between DMA Channels
|
patent-application
|
September 2008 |
Remote Direct Memory Access
|
patent-application
|
October 2008 |
Message Communications of Particular Message Types Between Compute Nodes Using DMA Shadow Buffers
|
patent-application
|
October 2008 |
Signaling Completion of a Message Transfer from an Origin Compute Node to a Target Compute Node
|
patent-application
|
November 2008 |
Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
|
patent-application
|
November 2008 |
Direct Memory Access Transfer Completion Notification
|
patent-application
|
November 2008 |
Direct Memory Access Transfer Completion Notification
|
patent-application
|
December 2008 |
Controlling Data Transfers from an Origin Compute Node to a Target Compute Node
|
patent-application
|
December 2008 |
Data Communications
|
patent-application
|
December 2008 |
Optimized Collectives Using a DMA on a Parallel Computer
|
patent-application
|
January 2009 |
Ultrascalable Petaflop Parallel Supercomputer
|
patent-application
|
January 2009 |
Mechanism to Support Generic Collective Communication Across a Variety of Programming Models
|
patent-application
|
January 2009 |
Message Passing with a Limited Number of DMA Byte Counters
|
patent-application
|
January 2009 |
Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Pacing a Data Transfer Operation Between Compute Nodes on a Parallel Computer
|
patent-application
|
January 2009 |
Repeating Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Self-Pacing Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Chaining Direct Memory Access Data Transfer Operations for Compute Nodes in a Parallel Computer
|
patent-application
|
January 2009 |
Third Party, Broadcast, Multicast and Conditional RDMA Operations
|
patent-application
|
May 2009 |
Tracking Network Contention
|
patent-application
|
June 2009 |
Communication control device, information processing device and computer program product
|
patent-application
|
August 2009 |
Determining A Path For Network Traffic Between Nodes In A Parallel Computer
|
patent-application
|
October 2009 |
Determining A Path For Network Traffic Between Nodes In A Parallel Computer
|
patent-application
|
October 2009 |
Extended dynamic optimization of connection establishment and message progress processing in a multi-fabric message passing interface implementation
|
patent-application
|
October 2009 |
External Memory Controller Node
|
patent-application
|
November 2009 |
Pacing Network Traffic Among A Plurality Of Compute Nodes Connected Using A Data Communications Network
|
patent-application
|
January 2010 |
Data Processing In A Hybrid Computing Environment
|
patent-application
|
February 2010 |
Increasing Available FIFO Space to Prevent Messaging Queue Deadlocks in a DMA Environment
|
patent-application
|
April 2010 |
Scalable Interface for Connecting Multiple Computer Systems Which Performs Parallel MPI Header Matching
|
patent-application
|
September 2010 |
Replenishing Data Descriptors in a DMA Injection FIFO Buffer
|
patent-application
|
October 2010 |
Processing data communications messages with input/output control blocks
|
patent-application
|
August 2011 |
Message passing with queues and channels
|
patent-application
|
October 2011 |
Administering truncated receive functions in a parallel messaging interface
|
patent-application
|
March 2012 |
Routing data communications packets in a parallel computer
|
patent-application
|
March 2012 |
Fencing Data Transfers In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
May 2012 |
Fencing Network Direct Memory Access Data Transfers In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
May 2012 |
Fencing Data Transfers In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
May 2012 |
Fencing Direct Memory Access Data Transfers In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
May 2012 |
Data Communications in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
May 2012 |
Data Communications In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
June 2012 |
Data Communications For A Collective Operation In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
June 2012 |
Data Communications In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
June 2012 |
Completion Processing For Data Communications Instructions
|
patent-application
|
July 2012 |
Completion Processing For Data Communications Instructions
|
patent-application
|
July 2012 |
Endpoint-Based Parallel Data Processing With Non-Blocking Collective Instructions In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
July 2012 |
Data Communications In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
July 2012 |
Data Communications In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
August 2012 |
Endpoint-Based Parallel Data Processing In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
October 2012 |
Performing Collective Operations In A Distributed Processing System
|
patent-application
|
January 2013 |
Data Communications in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
March 2013 |
Data Communications for a Collective Operation in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
March 2013 |
Processing Data Communications Messages with Input/Output Control Blocks
|
patent-application
|
March 2013 |
Performing Collective Operations in a Distributed Processing System
|
patent-application
|
March 2013 |
Routing Data Communications Packets in a Parallel Computer
|
patent-application
|
March 2013 |
Endpoint-Based Parallel Data Processing In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
March 2013 |
Fencing Network Direct Memory Access Data Transfers in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
March 2013 |
Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
|
patent-application
|
March 2013 |
Endpoint-Based Parallel Data Processing with Non-Blocking Collective Instructions in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
March 2013 |
Data Communications in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
March 2013 |
Data Communications in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
April 2013 |
Completion Processing for Data Communications Instructions
|
patent-application
|
April 2013 |
Data Communications in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
April 2013 |
Fencing Data Transfers in a Parallel Active Messaging Interface of a Parallel Computer
|
patent-application
|
April 2013 |
Completion Processing for Data Communications Instructions
|
patent-application
|
May 2013 |
Managing Internode Data Communications For An Uninitialized Process In A Parallel Computer
|
patent-application
|
May 2013 |
Intranode Data Communications In A Parallel Computer
|
patent-application
|
May 2013 |
Internode Data Communications In A Parallel Computer
|
patent-application
|
May 2013 |
Managing Internode Data Communications for an Uninitialized Process in a Parallel Computer
|
patent-application
|
May 2013 |
Intranode Data Communications in a Parallel Computer
|
patent-application
|
May 2013 |
Intranode Data Communications in a Parallel Computer
|
patent-application
|
May 2013 |
Fencing Data Transfers in a Parallel Active Messaging Interface of Parallel Computer
|
patent-application
|
July 2013 |
Fencing Direct Memory Access Data Transfers In A Parallel Active Messaging Interface Of A Parallel Computer
|
patent-application
|
July 2013 |
A network on chip architecture and design methodology
|
conference
|
January 2002 |
An analysis of NIC resource usage for offloading MPI
|
conference
|
January 2004 |
The impact of MPI queue usage on message latency
|
conference
|
January 2004 |
A Hardware Acceleration Unit for MPI Queue Processing
|
conference
|
January 2005 |
Optimizing MPI Collectives Using Efficient Intra-node Communication Techniques over the Blue Gene/P Supercomputer
- Mamidala, Amith R.; Faraj, Daniel; Kumar, Sameer
-
Distributed Processing, Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum
https://doi.org/10.1109/IPDPS.2011.220
|
conference
|
May 2011 |
The deep computing messaging framework: generalized scalable message passing on the blue gene/P supercomputer
|
conference
|
January 2008 |
MPI-LAPI: an efficient implementation of MPI for IBM RS/6000 SP systems
|
journal
|
January 2001 |
Hybrid parallel programming with MPI and unified parallel C
|
conference
|
January 2010 |
Enabling Concurrent Multithreaded MPI Communication on Multicore Petascale Systems
|
book
|
January 2010 |
Managing Multiple Communication Methods in High-Performance Networked Computing Systems
|
journal
|
January 1997 |
A task migration implementation of the Message-Passing Interface
|
conference
|
January 1996 |
Architecture and Performance of the BlueGene/L Message Layer
|
book
|
January 2004 |
Integrating MPI Components into Metacomputing Applications
|
book
|
January 2000 |
The Blue Gene/L Supercomputer: A Hardware and Software Story
|
journal
|
May 2007 |
The Autopilot performance-directed adaptive control system
|
journal
|
September 2001 |
Automatic Performance Tuning for J2EE Application Server Systems
|
book
|
January 2005 |
Automated cluster-based web service performance tuning
|
conference
|
January 2004 |
An empirically derived framework for classifying parallel program performance tuning problems
|
conference
|
January 1998 |
Overview of the Blue Gene/L system architecture
|
journal
|
March 2005 |
Blue Gene/L torus interconnection network
|
journal
|
March 2005 |
Broadcasting on Meshes with Wormhole Routing
|
journal
|
June 1996 |