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Title: Matrix multiplication operations with data pre-conditioning in a high performance computing architecture

Mechanisms for performing matrix multiplication operations with data pre-conditioning in a high performance computing architecture are provided. A vector load operation is performed to load a first vector operand of the matrix multiplication operation to a first target vector register. A load and splat operation is performed to load an element of a second vector operand and replicating the element to each of a plurality of elements of a second target vector register. A multiply add operation is performed on elements of the first target vector register and elements of the second target vector register to generate a partial product of the matrix multiplication operation. The partial product of the matrix multiplication operation is accumulated with other partial products of the matrix multiplication operation.
Authors:
; ;
Publication Date:
OSTI Identifier:
1107797
Report Number(s):
8,577,950
12/542,255
DOE Contract Number:
B554331
Resource Type:
Patent
Research Org:
International Business Machines Corporation (Armonk, NY)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English