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Title: Low Latency Messages on Distributed Memory Multiprocessors

This article describes many of the issues in developing an efficient interface for communication on distributed memory machines. Although the hardware component of message latency is less than 1 ws on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 μs. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. This article describes several tests performed and many of the issues involved in supporting low latency messages on distributed memory machines.
Authors:
 [1] ;  [2]
  1. Pacific Northwest Laboratory, Richland, WA 99352, USA
  2. University of Maryland, USA
Publication Date:
OSTI Identifier:
1198060
Grant/Contract Number:
AC06-76RLO1830
Type:
Published Article
Journal Name:
Scientific Programming
Additional Journal Information:
Journal Volume: 4; Journal Issue: 1; Related Information: CHORUS Timestamp: 2016-08-23 06:51:02; Journal ID: ISSN 1058-9244
Publisher:
Hindawi Publishing Corporation
Sponsoring Org:
USDOE
Country of Publication:
Egypt
Language:
English