National Library of Energy BETA

Sample records for grande-empire double circuit

  1. BLOCKING OSCILLATOR DOUBLE PULSE GENERATOR CIRCUIT

    DOE Patents [OSTI]

    Haase, J.A.

    1961-01-24

    A double-pulse generator, particuiarly a double-pulse generator comprising a blocking oscillator utilizing a feedback circuit to provide means for producing a second pulse within the recovery time of the blocking oscillator, is described. The invention utilized a passive network which permits adjustment of the spacing between the original pulses derived from the blocking oscillator and further utilizes the original pulses to trigger a circuit from which other pulses are initiated. These other pulses are delayed and then applied to the input of the blocking oscillator, with the result that the output from the oscillator circuit contains twice the number of pulses originally initiated by the blocking oscillator itself.

  2. Count-doubling time safety circuit

    DOE Patents [OSTI]

    Rusch, Gordon K.; Keefe, Donald J.; McDowell, William P.

    1981-01-01

    There is provided a nuclear reactor count-factor-increase time monitoring circuit which includes a pulse-type neutron detector, and means for counting the number of detected pulses during specific time periods. Counts are compared and the comparison is utilized to develop a reactor scram signal, if necessary.

  3. Double sided circuit board and a method for its manufacture

    DOE Patents [OSTI]

    Lindenmeyer, C.W.

    1988-04-14

    Conductance between the sides of a large double sided printed circuit board is provided using a method which eliminates the need for chemical immersion or photographic exposure of the entire large board. A plurality of through-holes are drilled or punched in a substratum according to the desired pattern, conductive laminae are made to adhere to both sides of the substratum covering the holes and the laminae are pressed together and permanently joined within the holes, providing conductive paths. 4 figs.

  4. Double sided circuit board and a method for its manufacture

    DOE Patents [OSTI]

    Lindenmeyer, Carl W.

    1989-01-01

    Conductance between the sides of a large double sided printed circuit board is provided using a method which eliminates the need for chemical immersion or photographic exposure of the entire large board. A plurality of through-holes are drilled or punched in a substratum according to the desired pattern, conductive laminae are made to adhere to both sides of the substratum covering the holes and the laminae are pressed together and permanently joined within the holes, providing conductive paths.

  5. CX-004876: Categorical Exclusion Determination

    Broader source: Energy.gov [DOE]

    Casa Grande-Empire (Double Circuit Upgrade)CX(s) Applied: B4.13Date: 09/15/2010Location(s): Pinal County, ArizonaOffice(s): Bonneville Power Administration

  6. CX-007132: Categorical Exclusion Determination

    Broader source: Energy.gov [DOE]

    Casa Grande-Empire Double Circuit Upgrade AmendmentCX(s) Applied: B4.13Date: 04/28/2011Location(s): Pinal County, ArizonaOffice(s): Western Area Power Administration-Desert Southwest Region

  7. CX-004888: Categorical Exclusion Determination

    Broader source: Energy.gov [DOE]

    Casa Grande-Empire (Double Circuit Upgrade)CX(s) Applied: B4.13Date: 09/15/2010Location(s): Pinal County, ArizonaOffice(s): Western Area Power Administration-Desert Southwest Region

  8. Squishy Circuits

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Squishy Circuits Squishy Circuits Inspire your inner Ben Franklin Children of all ages create circuits and explore electronics-even making electricity flow with their own doughy...

  9. Measuring circuit

    DOE Patents [OSTI]

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  10. ADDER CIRCUIT

    DOE Patents [OSTI]

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  11. GATING CIRCUITS

    DOE Patents [OSTI]

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  12. MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  13. Arizona RECORD OF CATEGORICAL EXCLUSION DETERMINATION

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    a double circuit upgrade and structure replacement along the existing Casa Grande-Empire 11~-kV transmission line, Pinal County, Arizona RECORD OF CATEGORICAL EXCLUSION DETERMINATION A. Proposed Action: Western proposes to replace structures and upgrade to a double circuit 230-kV transmission line on its Casa Grande-Empire115-kV transmission line, from Thornton Road to its Empire Substation, within Western's existing right-of-way. This will include the rebuild of 13.2 miles of transmission line,

  14. CX-007131: Categorical Exclusion Determination | Department of Energy

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    31: Categorical Exclusion Determination CX-007131: Categorical Exclusion Determination Casa Grande-Empire Double Circuit Upgrade and Structure Replacement CX(s) Applied: B1.3 Date: 03/08/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region Western proposes to replace structures and upgrade to a double circuit 230- kilovolt (kV) transmission line on its Casa Grande-Empire 115-kV transmission line, from Thornton Road to its Empire Substation,

  15. MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  16. Federated Testbed Circuits

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Testbed Circuits Network R&D Overview Experimental Network Testbeds 100G SDN Testbed Dark Fiber Testbed Federated Testbed Circuits Test Circuit Service Performance (perfSONAR)...

  17. Commutation circuit for an HVDC circuit breaker

    DOE Patents [OSTI]

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  18. Commutation circuit for an HVDC circuit breaker

    DOE Patents [OSTI]

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  19. Dual-circuit, multiple-effect refrigeration system and method

    DOE Patents [OSTI]

    DeVault, Robert C.

    1995-01-01

    A dual circuit absorption refrigeration system comprising a high temperature single-effect refrigeration loop and a lower temperature double-effect refrigeration loop separate from one another and provided with a double-condenser coupling therebetween. The high temperature condenser of the single-effect refrigeration loop is double coupled to both of the generators in the double-effect refrigeration loop to improve internal heat recovery and a heat and mass transfer additive such as 2-ethyl-1-hexanol is used in the lower temperature double-effect refrigeration loop to improve the performance of the absorber in the double-effect refrigeration loop.

  20. Charge regulation circuit

    DOE Patents [OSTI]

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  1. Piezoelectric drive circuit

    DOE Patents [OSTI]

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  2. Electrical Circuit Simulation Code

    Energy Science and Technology Software Center (OSTI)

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  3. Piezoelectric drive circuit

    DOE Patents [OSTI]

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  4. CIRCUITS FOR CURRENT MEASUREMENTS

    DOE Patents [OSTI]

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  5. Remote reset circuit

    DOE Patents [OSTI]

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  6. Regenerative feedback resonant circuit

    DOE Patents [OSTI]

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  7. Remote reset circuit

    DOE Patents [OSTI]

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  8. Laser energy control circuit

    SciTech Connect (OSTI)

    Howie, J.B.; Mcleod, J.

    1982-08-17

    A laser energy control circuit for a gas-discharge excited laser includes an energy source psu to supply energy to the gas discharge. First circuit means tr1, tr2 operate to limit the energy supplied to a first value for a first time interval, after which second circuit means a1, a2 allow the energy to rise to a maximum value and then decrease gradually to a second value over a second time interval. Subsequently, third circuit means including amplifiers a3 to a6 operate to maintain the light output of the laser at a desired value.

  9. Liquid detection circuit

    DOE Patents [OSTI]

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  10. Compensated gain control circuit for buck regulator command charge circuit

    DOE Patents [OSTI]

    Barrett, David M.

    1996-01-01

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

  11. Compensated gain control circuit for buck regulator command charge circuit

    DOE Patents [OSTI]

    Barrett, D.M.

    1996-11-05

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

  12. Sensor readout detector circuit

    DOE Patents [OSTI]

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  13. Sensor readout detector circuit

    DOE Patents [OSTI]

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  14. Approximate circuits for increased reliability

    DOE Patents [OSTI]

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  15. Approximate circuits for increased reliability

    DOE Patents [OSTI]

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  16. DIFFERENTIAL FAULT SENSING CIRCUIT

    DOE Patents [OSTI]

    Roberts, J.H.

    1961-09-01

    A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

  17. CALUTRON PROTECTIVE CIRCUIT

    DOE Patents [OSTI]

    Schmidt, F.H.

    1959-05-26

    A switch and relay circuit is described for protection of calutrons. By means of this arrangement no arc can be established in the arc chamber unless cooling water flow is established. (T.R.H.)

  18. CALUTRON CATHODE INTERLOCK CIRCUIT

    DOE Patents [OSTI]

    Baldwin, L.W.

    1959-05-26

    A circuit arrangement is described which prevents application of the arc voltage to an ion source of a calutron before the cathode has been heated to operating temperature. (T.R.H.)

  19. Test Circuit Service

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Test Circuit Service Network R&D Software-Defined Networking (SDN) Experimental Network Testbeds 100G SDN Testbed Dark Fiber Testbed Test Circuit Service Testbed Results Current Testbed Research Previous Testbed Research Performance (perfSONAR) Software & Tools Development Data for Researchers Partnerships Publications Workshops Contact Us Technical Assistance: 1 800-33-ESnet (Inside US) 1 800-333-7638 (Inside US) 1 510-486-7600 (Globally) 1 510-486-7607 (Globally) Report Network

  20. Superconducting flux flow digital circuits

    DOE Patents [OSTI]

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  1. Superconducting flux flow digital circuits

    DOE Patents [OSTI]

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  2. ELECTRONIC TRIGGER CIRCUIT

    DOE Patents [OSTI]

    Russell, J.A.G.

    1958-01-01

    An electronic trigger circuit is described of the type where an output pulse is obtained only after an input voltage has cqualed or exceeded a selected reference voltage. In general, the invention comprises a source of direct current reference voltage in series with an impedance and a diode rectifying element. An input pulse of preselected amplitude causes the diode to conduct and develop a signal across the impedance. The signal is delivered to an amplifier where an output pulse is produced and part of the output is fed back in a positive manner to the diode so that the amplifier produces a steep wave front trigger pulsc at the output. The trigger point of the described circuit is not subject to variation due to the aging, etc., of multi-electrode tabes, since the diode circuit essentially determines the trigger point.

  3. ELECTRONIC MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Thomas, R.E.

    1959-08-25

    An electronic multiplier circuit is described in which an output voltage having an amplitude proportional to the product or quotient of the input signals is accomplished in a novel manner which facilitates simplicity of circuit construction and a high degree of accuracy in accomplishing the multiplying and dividing function. The circuit broadly comprises a multiplier tube in which the plate current is proportional to the voltage applied to a first control grid multiplied by the difference between voltage applied to a second control grid and the voltage applied to the first control grid. Means are provided to apply a first signal to be multiplied to the first control grid together with means for applying the sum of the first signal to be multiplied and a second signal to be multiplied to the second control grid whereby the plate current of the multiplier tube is proportional to the product of the first and second signals to be multiplied.

  4. ELECTRONIC PHASE CONTROL CIRCUIT

    DOE Patents [OSTI]

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  5. Electrical Circuit Tester

    DOE Patents [OSTI]

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  6. Magnetic switches and circuits

    SciTech Connect (OSTI)

    Nunnally, W.C.

    1982-05-01

    This report outlines the use of saturable inductors as switches in lumped-element, magnetic-pulse compression circuits is discussed and the characteristic use of each is defined. In addition, the geometric constraints and magnetic pulse compression circuits used in short-pulse, low-inductance systems are considered. The scaling of presaturation leakage currents, magnetic energy losses, and switching times with geometrical and material parameters are developed to aid in evaluating magnetic pulse compression systems in a particular application. Finally, a scheme for increasing the couping coefficient in saturable stripline transformers is proposed to enable their use in the short-pulse, high-voltage regime.

  7. Small circuits for cryptography.

    SciTech Connect (OSTI)

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  8. Circuit breaker lockout device

    DOE Patents [OSTI]

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1992-01-01

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

  9. Circuit breaker lockout device

    DOE Patents [OSTI]

    Kozlowski, L.J.; Shirey, L.A.

    1992-11-24

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker. 2 figs.

  10. Bioluminescent bioreporter integrated circuit

    DOE Patents [OSTI]

    Simpson, Michael L.; Sayler, Gary S.; Paulus, Michael J.

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  11. Automatic sweep circuit

    DOE Patents [OSTI]

    Keefe, Donald J.

    1980-01-01

    An automatically sweeping circuit for searching for an evoked response in an output signal in time with respect to a trigger input. Digital counters are used to activate a detector at precise intervals, and monitoring is repeated for statistical accuracy. If the response is not found then a different time window is examined until the signal is found.

  12. Method for double-sided processing of thin film transistors

    DOE Patents [OSTI]

    Yuan, Hao-Chih; Wang, Guogong; Eriksson, Mark A.; Evans, Paul G.; Lagally, Max G.; Ma, Zhenqiang

    2008-04-08

    This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

  13. Methods of fabricating applique circuits

    DOE Patents [OSTI]

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  14. High voltage MOSFET switching circuit

    DOE Patents [OSTI]

    McEwan, T.E.

    1994-07-26

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

  15. High voltage MOSFET switching circuit

    DOE Patents [OSTI]

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  16. GAS PHOTOTUBE CIRCUIT

    DOE Patents [OSTI]

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  17. PARTICLE BEAM TRACKING CIRCUIT

    DOE Patents [OSTI]

    Anderson, O.A.

    1959-05-01

    >A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)

  18. Power system with an integrated lubrication circuit

    DOE Patents [OSTI]

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  19. Integrated coherent matter wave circuits

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Ryu, C.; Boshier, M. G.

    2015-09-21

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmore »electric polarizability. Moreover, the source of coherent matter waves is a Bose–Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.« less

  20. Base drive circuit

    DOE Patents [OSTI]

    Lange, A.C.

    1995-04-04

    An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.

  1. Base drive circuit

    DOE Patents [OSTI]

    Lange, Arnold C.

    1995-01-01

    An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

  2. Dynamic pulse difference circuit

    DOE Patents [OSTI]

    Erickson, Gerald L.

    1978-01-01

    A digital electronic circuit of especial use for subtracting background activity pulses in gamma spectrometry comprises an up-down counter connected to count up with signal-channel pulses and to count down with background-channel pulses. A detector responsive to the count position of the up-down counter provides a signal when the up-down counter has completed one scaling sequence cycle of counts in the up direction. In an alternate embodiment, a detector responsive to the count position of the up-down counter provides a signal upon overflow of the counter.

  3. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    DOE Patents [OSTI]

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  4. Jitter compensation circuit

    DOE Patents [OSTI]

    Sullivan, J.S.; Ball, D.G.

    1997-09-09

    The instantaneous V{sub co} signal on a charging capacitor is sampled and the charge voltage on capacitor C{sub o} is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V{sub co} signal is split between a gain stage (G = 0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V{sub co} signal is applied to the negative input of a differential amplifier gain stage (G = 10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V{sub co} signal from the instantaneous value of sampled V{sub co} signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V{sub co} values squared divided by the total volt-second product of the magnetic compression circuit. 11 figs.

  5. Jitter compensation circuit

    DOE Patents [OSTI]

    Sullivan, James S.; Ball, Don G.

    1997-01-01

    The instantaneous V.sub.co signal on a charging capacitor is sampled and the charge voltage on capacitor C.sub.o is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V.sub. co signal is split between a gain stage (G=0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V.sub.co signal is applied to the negative input of a differential amplifier gain stage (G=10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V.sub.co signal from the instantaneous value of sampled V.sub.co signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V.sub.co values squared divided by the total volt-second product of the magnetic compression circuit.

  6. Push-pull radio frequency circuit with integral transistion to waveguide output

    DOE Patents [OSTI]

    Bennett, Wilfred P.

    1987-01-01

    A radio frequency circuit for ICRF heating includes a resonant push-pull circuit, a double ridged rectangular waveguide, and a coupling transition which joins the waveguide to the resonant circuit. The resonant circuit includes two cylindrical conductors mounted side by side and two power vacuum tubes attached to respective ends of a cylindrical conductor. A conductive yoke is located at the other end of the cylindrical conductors to short circuit the two cylindrical conductors. The coupling transition includes two relatively flat rectangular conductors extending perpendicular to the longitudinal axes of a respective cylindrical conductor to which the flat conductor is attached intermediate the ends thereof. Conductive side covers and end covers are also provided for forming pockets in the waveguide into which the flat conductors extend when the waveguide is attached to a shielding enclosure surrounding the resonant circuit.

  7. Magnetic compression laser driving circuit

    DOE Patents [OSTI]

    Ball, Don G.; Birx, Dan; Cook, Edward G.

    1993-01-01

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 Kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 Kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  8. Magnetic compression laser driving circuit

    DOE Patents [OSTI]

    Ball, D.G.; Birx, D.; Cook, E.G.

    1993-01-05

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  9. PRECISION TIME-DELAY CIRCUIT

    DOE Patents [OSTI]

    Creveling, R.

    1959-03-17

    A tine-delay circuit which produces a delay time in d. The circuit a capacitor, an te back resistance, connected serially with the anode of the diode going to ground. At the start of the time delay a negative stepfunction is applied to the series circuit and initiates a half-cycle transient oscillatory voltage terminated by a transient oscillatory voltage of substantially higher frequency. The output of the delay circuit is taken at the junction of the inductor and diode where a sudden voltage rise appears after the initiation of the higher frequency transient oscillations.

  10. ELECTRONIC INTEGRATING CIRCUIT

    DOE Patents [OSTI]

    Englemann, R.H.

    1963-08-20

    An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

  11. Photoconductive circuit element reflectometer

    DOE Patents [OSTI]

    Rauscher, C.

    1987-12-07

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a determinable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line. 4 figs.

  12. Photoconductive circuit element reflectometer

    DOE Patents [OSTI]

    Rauscher, Christen (Alexandria, VA)

    1990-01-01

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

  13. ELECTRONIC PULSE SCALING CIRCUITS

    DOE Patents [OSTI]

    Cooke-Yarborough, E.H.

    1958-11-18

    Electronic pulse scaling circults of the klnd comprlsing a serles of bi- stable elements connected ln sequence, usually in the form of a rlng so as to be cycllcally repetitive at the highest scallng factor, are described. The scaling circuit comprises a ring system of bi-stable elements each arranged on turn-off to cause, a succeeding element of the ring to be turned-on, and one being arranged on turn-off to cause a further element of the ring to be turned-on. In addition, separate means are provided for applying a turn-off pulse to all the elements simultaneously, and for resetting the elements to a starting condition at the end of each cycle.

  14. Modeling cortical circuits.

    SciTech Connect (OSTI)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  15. Demultiplexer circuit for neural stimulation

    DOE Patents [OSTI]

    Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean

    2012-10-09

    A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.

  16. PHOTOSENSITIVE RELAY CONTROL CIRCUIT

    DOE Patents [OSTI]

    Martin, C.F.

    1958-01-14

    adapted for the measurement of the time required for an oscillating member to pass through a preselected number of oscillations, after being damped to a certain maximum amplitude of oscillation. A mirror is attached to the moving member and directs light successively to a photocell which is part of a trigger unit and to first and second photocells which are part of a starter unit, as the member swings to its maximum amplitude. The starter and trigger units comprise thyratrons and relays so interconnected that the trigger circuit, although generating a counter pulse, does not register a count in the counter when the light traverses both photocells of the starter unit. When the amplitude of oscillation of the member decreases to where the second photocell is not transversed, the triggei pulse is received by the counter. The counter taen operates to register the desired number of oscillations and initiates and terminates a timer for measuring the time irterval for the preselected number of oscillations.

  17. Picture of the Week: Circuits of light

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    5 Circuits of light This artistic conceptualization of circuits made of light represents a new capability that could lead to advanced sensor systems, quantum information processing technology, and more. March 25, 2016 circuits of light artist's conception Circuits of light: artist's conception View a super-large 300 dpi version of this image on our Lab Flickr site. Circuits of light This artistic conceptualization of circuits made of light represents a new capability that could lead to advanced

  18. Integrated circuits, and design and manufacture thereof

    DOE Patents [OSTI]

    Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

    2006-04-18

    A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

  19. Counterpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  20. Overpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  1. printed-circuit heat exchanger PCHE

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    printed-circuit heat exchanger PCHE - Sandia Energy Energy Search Icon Sandia Home ... SunShot Grand Challenge: Regional Test Centers printed-circuit heat exchanger PCHE Home...

  2. Reverse engineering of integrated circuits

    DOE Patents [OSTI]

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  3. Tunable circuit for tunable capacitor devices

    DOE Patents [OSTI]

    Rivkina, Tatiana; Ginley, David S.

    2006-09-19

    A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.

  4. ADJUSTABLE DOUBLE PULSE GENERATOR

    DOE Patents [OSTI]

    Gratian, J.W.; Gratian, A.C.

    1961-08-01

    >A modulator pulse source having adjustable pulse width and adjustable pulse spacing is described. The generator consists of a cross coupled multivibrator having adjustable time constant circuitry in each leg, an adjustable differentiating circuit in the output of each leg, a mixing and rectifying circuit for combining the differentiated pulses and generating in its output a resultant sequence of negative pulses, and a final amplifying circuit for inverting and square-topping the pulses. (AEC)

  5. Nuclear sensor signal processing circuit

    DOE Patents [OSTI]

    Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.

    2007-02-20

    An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

  6. Vertically Integrated Circuits at Fermilab

    SciTech Connect (OSTI)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  7. Circuit breaker lock out assembly

    DOE Patents [OSTI]

    Gordy, Wade T.

    1984-01-01

    A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly "S" shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

  8. Circuit breaker lock out assembly

    DOE Patents [OSTI]

    Gordy, W.T.

    1983-05-18

    A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly S shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

  9. Sensor/source electrometer circuit

    SciTech Connect (OSTI)

    Hughes, W.J.

    1991-12-31

    A multiple decade electrometer circuit is claimed which can measure low input currents or act as a current source and is comprised of a microprocessor controlled digital to analog converters to derive individual decades. A plurality of decades are created by multiple D-A voltage sources which generate electrometer currents through scaled resistors. After a first series of decades of current are successively produced, the converters are 10 cycled to generate current through new resistors scaled to produce another series decades of current. In this manner, the electrometer circuit generates or senses a plurality of decades of current without significant scale change.

  10. A double-double/double-single computation package

    Energy Science and Technology Software Center (OSTI)

    2004-12-01

    The DDFUNIDSFUN software permits a new or existing Fortran-90 program to utilize double-double precision (approx. 31 digits) or double-single precision (approx. 14 digits) arithmetic. Double-double precision is required by a rapidly expandirtg body of scientific computations in physics and mathematics, for which the conventional 64-bit IEEE computer arithmetic (about 16 decimal digit accuracy) is not sufficient. Double-single precision permits users of systems that do not have hardware 64-bit IEEE arithmetic (such as some game systems)more » to perform arithmetic at a precision nearly as high as that of systems that do. Both packages run significantly faster Than using multiple precision or arbitrary precision software for this purpose. The package includes an extensive set of low-level routines to perform high-precision arithmetic, including routines to calculate various algebraic and transcendental functions, such as square roots, sin, ccc, exp, log and others. In addition, the package includes high-level translation facilities, so that Fortran programs can utilize these facilities by making only a few changes to conventional Fortran programs. In most cases, the only changes that are required are to change the type statements of variables that one wishes to be treated as multiple precision, plus a few other minor changes. The DDFUN package is similar in functionality to the double-double part of the GD package, which was previously written at LBNL. However, the DDFUN package is written exclusively in Fortran-90, thus avoidIng difficulties that some users experience when using GD, which includes both Fortran-90 and C++ code.« less

  11. Chromosome doubling method

    DOE Patents [OSTI]

    Kato, Akio

    2006-11-14

    The invention provides methods for chromosome doubling in plants. The technique overcomes the low yields of doubled progeny associated with the use of prior techniques for doubling chromosomes in plants such as grasses. The technique can be used in large scale applications and has been demonstrated to be highly effective in maize. Following treatment in accordance with the invention, plants remain amenable to self fertilization, thereby allowing the efficient isolation of doubled progeny plants.

  12. Conceptual studies for a mercury target circuit

    SciTech Connect (OSTI)

    Sigg, B.

    1996-06-01

    For the now favored target design of the European Spallation Source project, i.e. the version using mercury as target material, a basic concept of the primary system has been worked out. It does not include a detailed design of the various components of the target circuit, but tries to outline a feasible solution for the system. Besides the removal of the thermal power of about 3MW produced in the target by the proton beam, the primary system has to satisfy a number of other requirements related to processing, safety, and operation. The basic proposal uses an electromagnetic pump and a mercury-water intermediate heat excanger, but other alternatives are also being discussed. Basic safety requirements, i.e. protection against radiation and toxic mercury vapours, are satisfied by a design using an air-tight primary system containment, double-walled tubes in the intermediate heat exchanger, a fail-safe system for decay heat removal, and a remote handling facility for the active part of the system. Much engineering work has still to be done, because many details of the design of the mercury and gas processing systems remain to be clarified, the thermal-hydraulic components need further optimisation, the system for control and instrumentation is only known in outline and a through safety analysis will be required.

  13. Driver circuit for solid state light sources

    DOE Patents [OSTI]

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  14. Post regulation circuit with energy storage

    DOE Patents [OSTI]

    Ball, Don G.; Birx, Daniel L.; Cook, Edward G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply and provides energy storage. The charge regulation circuit according to the present invention provides energy storage without unnecessary dissipation of energy through a resistor as in prior art approaches.

  15. Double Flash | Open Energy Information

    Open Energy Info (EERE)

    Double Flash Jump to: navigation, search Retrieved from "http:en.openei.orgwindex.php?titleDoubleFlash&oldid599606...

  16. Delta connected resonant snubber circuit

    DOE Patents [OSTI]

    Lai, Jih-Sheng; Peng, Fang Zheng; Young, Sr., Robert W.; Ott, Jr., George W.

    1998-01-01

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter.

  17. Ionization tube simmer current circuit

    DOE Patents [OSTI]

    Steinkraus, R.F. Jr.

    1994-12-13

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current. 6 figures.

  18. Ionization tube simmer current circuit

    DOE Patents [OSTI]

    Steinkraus, Jr., Robert F.

    1994-01-01

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

  19. Delta connected resonant snubber circuit

    DOE Patents [OSTI]

    Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

    1998-01-20

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

  20. Overpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, Emanuel M.

    1989-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  1. Counterpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, Emanuel M.

    1986-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  2. Photoconductive circuit element pulse generator

    DOE Patents [OSTI]

    Rauscher, Christen

    1989-01-01

    A pulse generator for characterizing semiconductor devices at millimeter wavelength frequencies where a photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test.

  3. CONTROL AND FAULT DETECTOR CIRCUIT

    DOE Patents [OSTI]

    Winningstad, C.N.

    1958-04-01

    A power control and fault detectcr circuit for a radiofrequency system is described. The operation of the circuit controls the power output of a radio- frequency power supply to automatically start the flow of energizing power to the radio-frequency power supply and to gradually increase the power to a predetermined level which is below the point where destruction occurs upon the happening of a fault. If the radio-frequency power supply output fails to increase during such period, the control does not further increase the power. On the other hand, if the output of the radio-frequency power supply properly increases, then the control continues to increase the power to a maximum value. After the maximumn value of radio-frequency output has been achieved. the control is responsive to a ''fault,'' such as a short circuit in the radio-frequency system being driven, so that the flow of power is interrupted for an interval before the cycle is repeated.

  4. Additive manufacturing of hybrid circuits

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David M.; Hirschfeld, Deidre; Hall, Aaron Christopher

    2016-03-26

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

  5. Method of determining the open circuit voltage of a battery in a closed circuit

    DOE Patents [OSTI]

    Brown, William E.

    1980-01-01

    The open circuit voltage of a battery which is connected in a closed circuit is determined without breaking the circuit or causing voltage upsets therein. The closed circuit voltage across the battery and the current flowing through it are determined under normal load and then a fractional change is made in the load and the new current and voltage values determined. The open circuit voltage is then calculated, according to known principles, from the two sets of values.

  6. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, R.B.; Bowman, D.R.

    1989-04-11

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response. 6 figs.

  7. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, Robert B.; Bowman, Douglas R.

    1989-01-01

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response.

  8. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, Robert B.; Bowman, Douglas R.

    1990-01-01

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response.

  9. Printed circuit dispersive transmission line

    DOE Patents [OSTI]

    Ikezi, H.; Lin-Liu, Y.R.; DeGrassie, J.S.

    1991-08-27

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other. 5 figures.

  10. Inductive storage pulse circuit device

    DOE Patents [OSTI]

    Parsons, William M.; Honig, Emanuel M.

    1984-01-01

    Inductive storage pulse circuit device which is capable of delivering a series of electrical pulses to a load in a sequential manner. Silicon controlled rectifiers as well as spark gap switches can be utilized in accordance with the present invention. A commutation switching array is utilized to produce a reverse current to turn-off the main opening switch. A commutation capacitor produces the reverse current and is initially charged to a predetermined voltage and subsequently charged in alternating directions by the inductive storage current.

  11. Printed circuit dispersive transmission line

    DOE Patents [OSTI]

    Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; DeGrassie, John S.

    1991-01-01

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

  12. MULTI-ELECTRODE TUBE PULSE MEMORY CIRCUIT

    DOE Patents [OSTI]

    Gundlach, J.C.; Reeves, J.B.

    1958-05-20

    Control circuits are described for pulse memory devices for scalers and the like, and more particularly to a driving or energizing circuit for a polycathode gaseous discharge tube having an elongated anode and a successive series of cathodes spaced opposite the anode along its length. The circuit is so arranged as to utilize an arc discharge between the anode and a cathode to count a series of pulses. Upon application of an input pulse the discharge is made to occur between the anode and the next successive cathode, and an output pulse is produced when a particular subsequent cathode is reached. The circuit means for transfering the discharge by altering the anode potential and potential of the cathodes and interconnecting the cathodes constitutes the novel aspects of the invention. A low response time and reduced number of circuit components are the practical advantages of the described circuit.

  13. Realizing a supercapacitor in an electrical circuit

    SciTech Connect (OSTI)

    Fukuhara, Mikio Kuroda, Tomoyuki; Hasegawa, Fumihiko

    2014-11-17

    Capacitors are commonly used in electronic resonance circuits; however, capacitors have not been used for storing large amounts of electrical energy in electrical circuits. Here, we report a superior RC circuit which serves as an electrical storage system characterized by quick charging and long-term discharging of electricity. The improved energy storage characteristics in this mixed electric circuit (R{sub 1}?+?R{sub 2}C{sub 1}) with small resistor R{sub 1}, large resistor R{sub 2}, and large capacitor C{sub 1} are derived from the damming effect by large R{sub 2} in simple parallel R{sub 2}C{sub 1} circuit. However, no research work has been carried out previously on the use of capacitors as electrical energy storage devices in circuits. Combined with nanotechnology, we hope that our finding will play a remarkable role in a variety of applications such as hybrid electric vehicles and backup power supplies.

  14. Monitoring transients in low inductance circuits

    DOE Patents [OSTI]

    Guilford, R.P.; Rosborough, J.R.

    1985-10-21

    The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.

  15. Multiplexer and time duration measuring circuit

    DOE Patents [OSTI]

    Gray, Jr., James

    1980-01-01

    A multiplexer device is provided for multiplexing data in the form of randomly developed, variable width pulses from a plurality of pulse sources to a master storage. The device includes a first multiplexer unit which includes a plurality of input circuits each coupled to one of the pulse sources, with all input circuits being disabled when one input circuit receives an input pulse so that only one input pulse is multiplexed by the multiplexer unit at any one time.

  16. Hybrid stretchable circuits on silicone substrate

    SciTech Connect (OSTI)

    Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk [Nanoscience Centre, University of Cambridge, Cambridge CB01FF (United Kingdom); Liu, Q.; Suo, Z. [School of Engineering and Applied Sciences and Kavli Institute for Bionano Science and Technology, Harvard University, Cambridge, Massachusetts 02138 (United States); Lacour, S. P., E-mail: stephanie.lacour@epfl.ch [Centre for Neuroprosthetics and Laboratory for Soft Bioelectronics Interfaces, School of Engineering, Ecole Polytechnique Fédérale de Lausanne, Lausanne 1015 (Switzerland)

    2014-04-14

    When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

  17. Predicting the reliability of electronic circuits.

    SciTech Connect (OSTI)

    Loescher, Douglas H.

    2004-06-01

    Procedures to predict the reliability of electrical circuits are discussed. Three cases are introduced and discussed. In Case 1, an analyst predicts the probability of any failure in the intended relations between circuit inputs and circuit outputs. In Case 2, an analyst predicts the probability that specified unintended outputs would occur. In Case 3, an analyst considers coupling between circuits. Logic models are given for the three cases, and sources of failure probabilities of components are mentioned. Methods of analysis are given, software tools are mentioned, and recommendations for presentation and review of results are discussed.

  18. Jabil Circuit Inc | Open Energy Information

    Open Energy Info (EERE)

    Florida Zip: 33716 Sector: Services Product: Florida-based company offering manufacturing and product management services for electronic goods. References: Jabil Circuit...

  19. Circuits of Atoms on Wires of Light

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Circuits of Atoms on Wires of Light 1663 Los Alamos science and technology magazine Latest Issue:July 2016 past issues All Issues » submit Circuits of Atoms on Wires of Light A new kind of circuitry-with electrons on conducting wires replaced by atoms on paths of laser light-is ushering in an era of "atomtronic" technology. March 8, 2016 Artist visualization of atomic circuits Los Alamos scientists have developed a reliable new way to create atomtronic circuits with waves of

  20. Modeling of transformers using circuit simulators

    SciTech Connect (OSTI)

    Archer, W.E.; Deveney, M.F.; Nagel, R.L.

    1994-07-01

    Transformers of two different designs; and unencapsulated pot core and an encapsulated toroidal core have been modeled for circuit analysis with circuit simulation tools. We selected MicroSim`s PSPICE and Anology`s SABER as the simulation tools and used experimental BH Loop and network analyzer measurements to generate the needed input data. The models are compared for accuracy and convergence using the circuit simulators. Results are presented which demonstrate the effects on circuit performance from magnetic core losses, eddy currents, and mechanical stress on the magnetic cores.

  1. Vertical Circuits Inc | Open Energy Information

    Open Energy Info (EERE)

    and intellectual property for the manufacture of low cost ultra high-speedhigh-density semiconductor components. References: Vertical Circuits, Inc.1 This article is a...

  2. Demultiplexer circuit for neural stimulation (Patent) | DOEPatents

    Office of Scientific and Technical Information (OSTI)

    all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. ...

  3. Shapeable short circuit resistant capacitor

    DOE Patents [OSTI]

    Taylor, Ralph S.; Myers, John D.; Baney, William J.

    2015-10-06

    A ceramic short circuit resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The capacitor that exhibits a benign failure mode in which a multitude of discrete failure events result in a gradual loss of capacitance. Each event is a localized event in which localized heating causes an adjacent portion of one or both of the electrodes to vaporize, physically cleaning away electrode material from the failure site. A first metal electrode, a second metal electrode, and a ceramic dielectric layer between the electrodes are thin enough to be formed in a serpentine-arrangement with gaps between the first electrode and the second electrode that allow venting of vaporized electrode material in the event of a benign failure.

  4. Beta-gamma discriminator circuit

    SciTech Connect (OSTI)

    Erkkila, B.H.; Wolf, M.A.; Eisen, Y.; Unruh, W.P.; Brake, R.J.

    1984-01-01

    The major difficulty encountered in the determination of beta-ray dose in field conditions is generally the presence of a relatively high gamma-ray component. Conventional dosimetry instruments use a shield on the detector to estimate the gamma-ray component in comparison with the beta-ray component. More accurate dosimetry information can be obtained from the measured beta spectrum itself. At Los Alamos, a detector and discriminator circuit suitable for use in a portable spectrometer have been developed. This instrument will discriminate between gammas and betas in a mixed field. The portable package includes a 256-channel MCA which can be programmed to give a variety of outputs, including a spectral display, and may be programmed to read dose directly.

  5. Sequential power-up circuit

    DOE Patents [OSTI]

    Kronberg, James W.

    1992-01-01

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable.

  6. Sequential power-up circuit

    DOE Patents [OSTI]

    Kronberg, J.W.

    1992-06-02

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable. 2 figs.

  7. TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT

    DOE Patents [OSTI]

    Smith, V.L.; Carstensen, H.K.

    1959-11-24

    An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.

  8. Reusable vibration resistant integrated circuit mounting socket

    DOE Patents [OSTI]

    Evans, Craig N.

    1995-01-01

    This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

  9. Overload protection circuit for output driver

    DOE Patents [OSTI]

    Stewart, Roger G.

    1982-05-11

    A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.

  10. Industrial Circuit Breakers |GE Global Research

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Journey Inside the Complex and Powerful World of Industrial Circuit Breakers Click to email this to a friend (Opens in new window) Share on Facebook (Opens in new window) Click to share (Opens in new window) Click to share on LinkedIn (Opens in new window) Click to share on Tumblr (Opens in new window) A Journey Inside the Complex and Powerful World of Industrial Circuit Breakers Kathleen O'Brien 2015.04.21 Most of us only think about circuit breakers when one trips because we plugged in too

  11. Legos for the Fabrication of Atomically Precise Electronic Circuits...

    Office of Science (SC) Website

    circuits for faster, more energy efficient electronics and advanced solar cells. ... used to produce high performance circuits for use in future electronics and solar cells. ...

  12. Unitech Printed Circuit Board Corp UPCB | Open Energy Information

    Open Energy Info (EERE)

    Sector: Solar Product: Taiwan-based printed-circuit board maker with intent to enter into solar cell manufacturing industry. References: Unitech Printed Circuit Board Corp....

  13. Serpentine and corduroy circuits to enhance the stretchability...

    Office of Scientific and Technical Information (OSTI)

    The apparatus comprises a stretchable polymer body, and at least one circuit line operatively connected to the stretchable polymer body, the at least one circuit line extending in ...

  14. Serpentine and corduroy circuits to enhance the stretchablity...

    Office of Scientific and Technical Information (OSTI)

    The apparatus comprises a stretchable polymer body, and at least one circuit line operatively connected to the stretchable polymer body, the at least one circuit line extending in ...

  15. Demultiplexer circuit for neural stimulation (Patent) | DOEPatents

    Office of Scientific and Technical Information (OSTI)

    to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array ...

  16. Analog circuit for controlling acoustic transducer arrays

    SciTech Connect (OSTI)

    Drumheller, Douglas S.

    1991-01-01

    A simplified ananlog circuit is presented for controlling electromechanical transducer pairs in an acoustic telemetry system. The analog circuit of this invention comprises a single electrical resistor which replaces all of the digital components in a known digital circuit. In accordance with this invention, a first transducer in a transducer pair of array is driven in series with the resistor. The voltage drop across this resistor is then amplified and used to drive the second transducer. The voltage drop across the resistor is proportional and in phase with the current to the transducer. This current is approximately 90 degrees out of phase with the driving voltage to the transducer. This phase shift replaces the digital delay required by the digital control circuit of the prior art.

  17. Venezuela to double Supermetanol

    SciTech Connect (OSTI)

    1997-04-23

    Pequiven, the petrochemical arm of Venezuelan state oil company PDVSA, is conducting feasibility studies to double the size of its 750,000-m.t./year Supermetanol methanol joint venture with Ecofuel at Jose. The twin unit would be onstream by the end of the decade and would increase Pequiven`s capacity to 2.3 million m.t./year.

  18. Double resonator cantilever accelerometer

    DOE Patents [OSTI]

    Koehler, D.R.

    1982-09-23

    A digital quartz accelerometer includes a pair of spaced double-ended tuning forks fastened at one end to a base and at the other end through a spacer mass. Transverse movement of the resonator members stresses one and compresses the other, providing a differential frequency output which is indicative of acceleration.

  19. Double resonator cantilever accelerometer

    DOE Patents [OSTI]

    Koehler, Dale R.

    1984-01-01

    A digital quartz accelerometer includes a pair of spaced double-ended tuning forks fastened at one end to a base and at the other end through a spacer mass. Transverse movement of the resonator members stresses one and compresses the other, providing a differential frequency output which is indicative of acceleration.

  20. Circuit level modeling of inductive elements

    SciTech Connect (OSTI)

    Muyshondt, G.P.; Portnoy, W.M.

    1989-01-01

    Design and analysis of spacecraft power systems have been difficult to perform because of the lack of circuit level models for nonlinear inductive elements. This paper reviews some of the models which have been proposed, their limitations, and applications. An improved saturation dependent model will be described. The model has been implemented in SPICE and with a commercial circuit program and demonstrated to be satisfactory in both implementations. 3 refs., 9 figs.

  1. Electrochemically controlled charging circuit for storage batteries

    DOE Patents [OSTI]

    Onstott, E.I.

    1980-06-24

    An electrochemically controlled charging circuit for charging storage batteries is disclosed. The embodiments disclosed utilize dc amplification of battery control current to minimize total energy expended for charging storage batteries to a preset voltage level. The circuits allow for selection of Zener diodes having a wide range of reference voltage levels. Also, the preset voltage level to which the storage batteries are charged can be varied over a wide range.

  2. Communications circuit including a linear quadratic estimator

    DOE Patents [OSTI]

    Ferguson, Dennis D.

    2015-07-07

    A circuit includes a linear quadratic estimator (LQE) configured to receive a plurality of measurements a signal. The LQE is configured to weight the measurements based on their respective uncertainties to produce weighted averages. The circuit further includes a controller coupled to the LQE and configured to selectively adjust at least one data link parameter associated with a communication channel in response to receiving the weighted averages.

  3. Dynamical Systems in Circuit Designer's Eyes

    SciTech Connect (OSTI)

    Odyniec, M.

    2011-05-09

    Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)

  4. Equivalent Circuit Modeling of Hysteresis Motors

    SciTech Connect (OSTI)

    Nitao, J J; Scharlemann, E T; Kirkendall, B A

    2009-08-31

    We performed a literature review and found that many equivalent circuit models of hysteresis motors in use today are incorrect. The model by Miyairi and Kataoka (1965) is the correct one. We extended the model by transforming it to quadrature coordinates, amenable to circuit or digital simulation. 'Hunting' is an oscillatory phenomenon often observed in hysteresis motors. While several works have attempted to model the phenomenon with some partial success, we present a new complete model that predicts hunting from first principles.

  5. Active shunt capacitance cancelling oscillator circuit

    DOE Patents [OSTI]

    Wessendorf, Kurt O.

    2003-09-23

    An oscillator circuit is disclosed which can be used to produce oscillation using a piezoelectric crystal, with a frequency of oscillation being largely independent of any shunt capacitance associated with the crystal (i.e. due to electrodes on the surfaces of the crystal and due to packaging and wiring for the crystal). The oscillator circuit is based on a tuned gain stage which operates the crystal at a frequency, f, near a series resonance frequency, f.sub.S. The oscillator circuit further includes a compensation circuit that supplies all the ac current flow through the shunt resistance associated with the crystal so that this ac current need not be supplied by the tuned gain stage. The compensation circuit uses a current mirror to provide the ac current flow based on the current flow through a reference capacitor that is equivalent to the shunt capacitance associated with the crystal. The oscillator circuit has applications for driving piezoelectric crystals for sensing of viscous, fluid or solid media by detecting a change in the frequency of oscillation of the crystal and a resonator loss which occur from contact of an exposed surface of the crystal by the viscous, fluid or solid media.

  6. Triple effect absorption chiller utilizing two refrigeration circuits

    DOE Patents [OSTI]

    DeVault, Robert C.

    1988-01-01

    A triple effect absorption method and apparatus having a high coefficient of performance. Two single effect absorption circuits are combined with heat exchange occurring between a condenser and absorber of a high temperature circuit, and a generator of a low temperature circuit. The evaporators of both the high and low temperature circuits provide cooling to an external heat load.

  7. Differential transimpedance amplifier circuit for correlated differential amplification

    DOE Patents [OSTI]

    Gresham, Christopher A.; Denton, M. Bonner; Sperline, Roger P.

    2008-07-22

    A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

  8. Double Beta Decay Experiments

    SciTech Connect (OSTI)

    Nanal, Vandana [Dept. of Nuclear and Atomic Physics, Tata Institute of Fundamental Research, Mumbai 400 005 (India)

    2011-11-23

    At present, neutrinoless double beta decay is perhaps the only experiment that can tell us whether the neutrino is a Dirac or a Majorana particle. Given the significance of the 0{nu}{beta}{beta}, there is a widespread interest for these rare event studies employing a variety of novel techniques. This paper describes the current status of DBD experiments. The Indian effort for an underground NDBD experiment at the upcoming INO laboratory is also presented.

  9. Double hull grounding experiments

    SciTech Connect (OSTI)

    Rodd, J.L.; Sikora, J.P.

    1995-12-31

    In the last few years the public and governments of many nations have become increasingly aware of the need for improving oil tanker safety. The requirements for double hull tankers are an attempt to address this need through legislation. Even though a number of investigations on the mechanics of collisions have been done in the past, until recently very little research supported the development of structural improvements to reduce oil tanker damage during grounding and stranding accidents. An aggressive evaluation of double hull tanker crashworthiness in stranding and grounding accidents is underway at CD/NSWC (formerly the David Taylor Research Center). The ability to predict damage from grounding accidents accurately is not currently available. The objective of this paper is to present qualitatively the structural failure mechanisms associated with stranding and grounding events for candidate double hull tanker structures and to present some simple methods for comparing damage scenarios. A comparison of the structural performance of key features in several very different designs will provide useful information toward this understanding.

  10. Protective circuit for thyristor controlled systems and thyristor converter embodying such protective circuit

    DOE Patents [OSTI]

    Downhower, Jr., Francis H.; Finlayson, Paul T.

    1984-04-10

    A snubber circuit coupled across each thyristor to be gated in a chain of thyristors determines the critical output of a NOR LATCH whenever one snubber circuit could not be charged and discharged under normal gating conditions because of a short failure.

  11. Lockout device for high voltage circuit breaker

    DOE Patents [OSTI]

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1993-01-01

    An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the repsective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

  12. Dual circuit embossed sheet heat transfer panel

    DOE Patents [OSTI]

    Morgan, G.D.

    1984-02-21

    A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet. 6 figs.

  13. Dual circuit embossed sheet heat transfer panel

    DOE Patents [OSTI]

    Morgan, Grover D.

    1984-01-01

    A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet.

  14. Lockout device for high voltage circuit breaker

    DOE Patents [OSTI]

    Kozlowski, L.J.; Shirey, L.A.

    1993-01-26

    An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the respective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

  15. Adjustable direct current and pulsed circuit fault current limiter

    DOE Patents [OSTI]

    Boenig, Heinrich J.; Schillig, Josef B.

    2003-09-23

    A fault current limiting system for direct current circuits and for pulsed power circuit. In the circuits, a current source biases a diode that is in series with the circuits' transmission line. If fault current in a circuit exceeds current from the current source biasing the diode open, the diode will cease conducting and route the fault current through the current source and an inductor. This limits the rate of rise and the peak value of the fault current.

  16. Package for integrated optic circuit and method

    DOE Patents [OSTI]

    Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

    1998-08-04

    A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

  17. Package for integrated optic circuit and method

    DOE Patents [OSTI]

    Kravitz, Stanley H.; Hadley, G. Ronald; Warren, Mial E.; Carson, Richard F.; Armendariz, Marcelino G.

    1998-01-01

    A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

  18. Lithium Circuit Test Section Design and Fabrication

    SciTech Connect (OSTI)

    Godfroy, Thomas; Garber, Anne; Martin, James

    2006-01-20

    The Early Flight Fission -- Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper discusses the overall system design and build and the component testing findings.

  19. Radiation-hardened transistor and integrated circuit

    DOE Patents [OSTI]

    Ma, Kwok K.

    2007-11-20

    A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

  20. Circuit electromechanics with single photon strong coupling

    SciTech Connect (OSTI)

    Xue, Zheng-Yuan Yang, Li-Na; Zhou, Jian

    2015-07-13

    In circuit electromechanics, the coupling strength is usually very small. Here, replacing the capacitor in circuit electromechanics by a superconducting flux qubit, we show that the coupling among the qubit and the two resonators can induce effective electromechanical coupling which can attain the strong coupling regime at the single photon level with feasible experimental parameters. We use dispersive couplings among two resonators and the qubit while the qubit is also driven by an external classical field. These couplings form a three-wave mixing configuration among the three elements where the qubit degree of freedom can be adiabatically eliminated, and thus results in the enhanced coupling between the two resonators. Therefore, our work constitutes the first step towards studying quantum nonlinear effect in circuit electromechanics.

  1. Hybrid high direct current circuit interrupter

    DOE Patents [OSTI]

    Rockot, Joseph H.; Mikesell, Harvey E.; Jha, Kamal N.

    1998-01-01

    A device and a method for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens.

  2. Up-and-down chopper circuit

    DOE Patents [OSTI]

    Goffeau, Jacques R.

    1979-01-01

    An improved Up-and-Down Chopper Circuit is provided which is useful for voltage regulation in a bi-directional DC power system. In the down mode, power is switched from a DC power source to a lower voltage energy storing load while in the up mode stored energy in the load is transferred to the higher voltage source. The system uses Darlington transistor switches in a conventional connection. The improvement relates to circuit additions to eliminate the effects of inter-electrode capacitance inherent with this Darlington transistor switching arrangement.

  3. Circuit for measuring time differences among events

    DOE Patents [OSTI]

    Romrell, Delwin M.

    1977-01-01

    An electronic circuit has a plurality of input terminals. Application of a first input signal to any one of the terminals initiates a timing sequence. Later inputs to the same terminal are ignored but a later input to any other terminal of the plurality generates a signal which can be used to measure the time difference between the later input and the first input signal. Also, such time differences may be measured between the first input signal and an input signal to any other terminal of the plurality or the circuit may be reset at any time by an external reset signal.

  4. Hybrid high direct current circuit interrupter

    DOE Patents [OSTI]

    Rockot, J.H.; Mikesell, H.E.; Jha, K.N.

    1998-08-11

    A device and a method are disclosed for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens. 7 figs.

  5. Superconducting-semiconducting circuits, devices and systems

    SciTech Connect (OSTI)

    Kroger, H.; Ghoshal, U.S.

    1991-06-18

    This paper describes a superconducting-semiconducting electrical circuit element. It comprises: a superconducting charge controlled three-terminal device, having a device control terminal, a second terminal and a third terminal, wherein the output current between the second and third terminals is controlled by the voltage applied to the control terminal, and wherein the output current exhibits superconducting characteristics as a function of temperature and input charge conditions; and a cryogenic semiconducting interconnect circuit, adapted to receive as an input an output signal from the superconducting device, and to provide a semiconductor switching voltage level output signal modulated by the input signal from the superconducting device.

  6. Internal cooling circuit for gas turbine bucket

    DOE Patents [OSTI]

    Hyde, Susan Marie; Davis, Richard Mallory

    2005-10-25

    In a gas turbine bucket having a shank portion and an airfoil portion having leading and trailing edges and pressure and suction sides, an internal cooling circuit, the internal cooling circuit having a serpentine configuration including plural radial outflow passages and plural radial inflow passages, and wherein a coolant inlet passage communicates with a first of the radial outflow passages along the trailing edge, the first radial outflow passage having a plurality of radially extending and radially spaced elongated rib segments extending between and connecting the pressure and suction sides in a middle region of the first passage to prevent ballooning of the pressure and suction sides at the first radial outflow passage.

  7. Triple effect absorption chiller utilizing two refrigeration circuits

    SciTech Connect (OSTI)

    DeVault, R.C.

    1988-03-22

    This patent describes a heat absorption method for an absorption chiller. It comprises: providing a firs absorption system circuit for operation within a first temperature range, providing a second absorption system circuit for operation within a second temperature range; heat exchanging refrigerant and absorber solution; thermal communication with an external heat load. This patent describes a heat absorption apparatus for use as an absorption chiller. It includes: a first absorption system circuit for operation within a first temperature range; a second absorption system circuit for operation within a second temperature range which has a lower maximum temperature relative to the first temperature range; the first circuit having generator means, condenser means, evaporator means, and absorber means operatively connected together; the second circuit having generator means condenser means, evaporator means, and absorber means operative connected together; and the first circuit condenser means and the first circuit absorber means being in heat exchange communication with the second circuit generator means.

  8. Bioluminescent bioreporter integrated circuit detection methods

    DOE Patents [OSTI]

    Simpson, Michael L.; Paulus, Michael J.; Sayler, Gary S.; Applegate, Bruce M.; Ripp, Steven A.

    2005-06-14

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for detection of particular analytes, including ammonia and estrogen compounds.

  9. Integrated Circuit Failure Analysis Hypertext Help System

    Energy Science and Technology Software Center (OSTI)

    1995-02-23

    This software assists a failure analyst performing failure analysis on integrated circuits. The software can also be used to train inexperienced failure analysts. The software also provides a method for storing information and making it easily available to experienced failure analysts.

  10. Integrated Circuit Failure Analysis Expert System

    Energy Science and Technology Software Center (OSTI)

    1995-10-03

    The software assists a failure analyst performing failure anaysis on intergrated circuits. The software can also be used to train inexperienced failure analysts. The software also provides a method for storing information and making it easily available to experienced failure analysts.

  11. Pulse circuit apparatus for gas discharge laser

    DOE Patents [OSTI]

    Bradley, Laird P.

    1980-01-01

    Apparatus and method using a unique pulse circuit for a known gas discharge laser apparatus to provide an electric field for preconditioning the gas below gas breakdown and thereafter to place a maximum voltage across the gas which maximum voltage is higher than that previously available before the breakdown voltage of that gas laser medium thereby providing greatly increased pumping of the laser.

  12. Electronic circuit for measuring series connected electrochemical cell voltages

    DOE Patents [OSTI]

    Ashtiani, Cyrus N.; Stuart, Thomas A.

    2000-01-01

    An electronic circuit for measuring voltage signals in an energy storage device is disclosed. The electronic circuit includes a plurality of energy storage cells forming the energy storage device. A voltage divider circuit is connected to at least one of the energy storage cells. A current regulating circuit is provided for regulating the current through the voltage divider circuit. A voltage measurement node is associated with the voltage divider circuit for producing a voltage signal which is proportional to the voltage across the energy storage cell.

  13. Noise isolation system for high-speed circuits

    DOE Patents [OSTI]

    McNeilly, D.R.

    1983-12-29

    A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

  14. Noise isolation system for high-speed circuits

    DOE Patents [OSTI]

    McNeilly, David R.

    1986-01-01

    A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

  15. Dual-circuit segmented rail phased induction motor

    DOE Patents [OSTI]

    Marder, Barry M.; Cowan, Jr., Maynard

    2002-01-01

    An improved linear motor utilizes two circuits, rather that one circuit and an opposed plate, to gain efficiency. The powered circuit is a flat conductive coil. The opposed segmented rail circuit is either a plurality of similar conductive coils that are shorted, or a plurality of ladders formed of opposed conductive bars connected by a plurality of spaced conductors. In each embodiment, the conductors are preferably cables formed from a plurality of intertwined insulated wires to carry current evenly.

  16. Technique for extending the range of a signal measuring circuit

    DOE Patents [OSTI]

    Chaprnka, Anthony G.; Sun, Shan C.; Vercellotti, Leonard C.

    1978-01-01

    An input signal supplied to a signal measuring circuit is either amplified or attenuated as necessary to establish the magnitude of the input signal within the defined dynamic range of the measuring circuit and the output signal developed by the measuring circuit is subsequently readjusted through amplification or attenuation to develop an output signal which corresponds to the magnitude of the initial input signal.

  17. Triple-effect absorption refrigeration system with double-condenser coupling

    DOE Patents [OSTI]

    DeVault, R.C.; Biermann, W.J.

    1993-04-27

    A triple effect absorption refrigeration system is provided with a double-condenser coupling and a parallel or series circuit for feeding the refrigerant-containing absorbent solution through the high, medium, and low temperature generators utilized in the triple-effect system. The high temperature condenser receiving vaporous refrigerant from the high temperature generator is double coupled to both the medium temperature generator and the low temperature generator to enhance the internal recovery of heat within the system and thereby increase the thermal efficiency thereof.

  18. Triple-effect absorption refrigeration system with double-condenser coupling

    DOE Patents [OSTI]

    DeVault, Robert C.; Biermann, Wendell J.

    1993-01-01

    A triple effect absorption refrigeration system is provided with a double-condenser coupling and a parallel or series circuit for feeding the refrigerant-containing absorbent solution through the high, medium, and low temperature generators utilized in the triple-effect system. The high temperature condenser receiving vaporous refrigerant from the high temperature generator is double coupled to both the medium temperature generator and the low temperature generator to enhance the internal recovery of heat within the system and thereby increase the thermal efficiency thereof.

  19. TRIAC/SCR proportional control circuit

    DOE Patents [OSTI]

    Hughes, Wallace J.

    1999-01-01

    A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the "reset" input of a R-S flip flop, while an "0" crossing detector controls the "set" input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the "reset" and "set" inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.

  20. Vacuum die attach for integrated circuits

    DOE Patents [OSTI]

    Schmitt, Edward H.; Tuckerman, David B.

    1991-01-01

    A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required.

  1. Single event upset protection circuit and method

    DOE Patents [OSTI]

    Wallner, John; Gorder, Michael

    2016-03-22

    An SEU protection circuit comprises first and second storage means for receiving primary and redundant versions, respectively, of an n-bit wide data value that is to be corrected in case of an SEU occurrence; the correction circuit requires that the data value be a 1-hot encoded value. A parity engine performs a parity operation on the n bits of the primary data value. A multiplexer receives the primary and redundant data values and the parity engine output at respective inputs, and is arranged to pass the primary data value to an output when the parity engine output indicates `odd` parity, and to pass the redundant data value to the output when the parity engine output indicates `even` parity. The primary and redundant data values are suitably state variables, and the parity engine is preferably an n-bit wide XOR or XNOR gate.

  2. TRIAC/SCR proportional control circuit

    DOE Patents [OSTI]

    Hughes, W.J.

    1999-04-06

    A power controller device is disclosed which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the ``reset`` input of a R-S flip flop, while an ``0`` crossing detector controls the ``set`` input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the ``reset`` and ``set`` inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations. 9 figs.

  3. Nanoeletromechanical switch and logic circuits formed therefrom

    SciTech Connect (OSTI)

    Nordquist, Christopher D.; Czaplewski, David A.

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  4. Custom VLSI circuits for high energy physics

    SciTech Connect (OSTI)

    Parker, S.

    1998-06-01

    This article provides a brief guide to integrated circuits, including their design, fabrication, testing, radiation hardness, and packaging. It was requested by the Panel on Instrumentation, Innovation, and Development of the International Committee for Future Accelerators, as one of a series of articles on instrumentation for future experiments. Their original request emphasized a description of available custom circuits and a set of recommendations for future developments. That has been done, but while traps that stop charge in solid-state devices are well known, those that stop physicists trying to develop the devices are not. Several years spent dodging the former and developing the latter made clear the need for a beginner`s guide through the maze, and that is the main purpose of this text.

  5. TRIAC/SCR proportional control circuit

    SciTech Connect (OSTI)

    Hughes, Wallace J.

    1997-12-01

    A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage to frequency converter controls the reset input of a R-S flip flop, while an 0 crossing detector controls the set input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the reset and set inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.

  6. Vacuum die attach for integrated circuits

    DOE Patents [OSTI]

    Schmitt, E.H.; Tuckerman, D.B.

    1991-09-10

    A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required. 1 figure.

  7. A Docking Casette For Printed Circuit Boards

    DOE Patents [OSTI]

    Barringer, Dennis R. (Wallkill, NY); Seminaro, Edward J. (Milton, NY); Toffler, Harold M. (Newburgh, NY)

    2003-08-19

    A docking apparatus for printed circuit boards including a cassette housing, having a housing base, a housing cover and a housing wall, wherein the housing base and the housing wall are disposed relative to each other so as to define a housing cavity for containing a printed circuit board and wherein the housing wall includes a cable opening disposed so as to be communicated with the housing cavity, a linkage mechanism, wherein the linkage mechanism includes an engagement configuration and a disengagement configuration and wherein the linkage mechanism is disposed so as to be associated with the cassette housing and a housing bezel, wherein the housing bezel is disposed relative to the cassette housing so as to be associated with the cable opening.

  8. Base drive and overlap protection circuit

    DOE Patents [OSTI]

    Gritter, David J.

    1983-01-01

    An inverter (34) which provides power to an A. C. machine (28) is controlled by a circuit (36) employing PWM control strategy whereby A. C. power is supplied to the machine at a preselectable frequency and preselectable voltage. This is accomplished by the technique of waveform notching in which the shapes of the notches are varied to determine the average energy content of the overall waveform. Through this arrangement, the operational efficiency of the A. C. machine is optimized. The control circuit includes a microcomputer and memory element which receive various parametric inputs and calculate optimized machine control data signals therefrom. The control data is asynchronously loaded into the inverter through an intermediate buffer (38). A base drive and overlap protection circuit is included to insure that both transistors of a complimentary pair are not conducting at the same time. In its preferred embodiment, the present invention is incorporated within an electric vehicle (10) employing a 144 VDC battery pack (32) and a three-phase induction motor (18).

  9. Double acting bit holder

    DOE Patents [OSTI]

    Morrell, Roger J.; Larson, David A.; Ruzzi, Peter L.

    1994-01-01

    A double acting bit holder that permits bits held in it to be resharpened during cutting action to increase energy efficiency by reducing the amount of small chips produced. The holder consist of: a stationary base portion capable of being fixed to a cutter head of an excavation machine and having an integral extension therefrom with a bore hole therethrough to accommodate a pin shaft; a movable portion coextensive with the base having a pin shaft integrally extending therefrom that is insertable in the bore hole of the base member to permit the moveable portion to rotate about the axis of the pin shaft; a recess in the movable portion of the holder to accommodate a shank of a bit; and a biased spring disposed in adjoining openings in the base and moveable portions of the holder to permit the moveable portion to pivot around the pin shaft during cutting action of a bit fixed in a turret to allow front, mid and back positions of the bit during cutting to lessen creation of small chip amounts and resharpen the bit during excavation use.

  10. High density printed electrical circuit board card connection system

    DOE Patents [OSTI]

    Baumbaugh, A.E.

    1997-05-06

    A zero insertion/extraction force printed circuit board card connection system comprises a cam-operated locking mechanism disposed along an edge portion of the printed circuit board. The extrusions along the circuit board mate with an extrusion fixed to the card cage having a plurality of electrical connectors. The card connection system allows the connectors to be held away from the circuit board during insertion/extraction and provides a constant mating force once the circuit board is positioned. The card connection system provides a simple solution to the need for a greater number of electrical signal connections. 12 figs.

  11. High density printed electrical circuit board card connection system

    DOE Patents [OSTI]

    Baumbaugh, Alan E.

    1997-01-01

    A zero insertion/extraction force printed circuit board card connection system comprises a cam-operated locking mechanism disposed along an edge portion of the printed circuit board. The extrusions along the circuit board mate with an extrusion fixed to the card cage having a plurality of electrical connectors. The card connection system allows the connectors to be held away from the circuit board during insertion/extraction and provides a constant mating force once the circuit board is positioned. The card connection system provides a simple solution to the need for a greater number of electrical signal connections.

  12. Accelerating functional verification of an integrated circuit

    DOE Patents [OSTI]

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G

    2015-11-05

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  13. Accelerating functional verification of an integrated circuit

    SciTech Connect (OSTI)

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

    2015-10-27

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  14. Simplified fabrication of magnetically coupled Josephson circuits

    SciTech Connect (OSTI)

    Smith, L.N.; Jillie, D.W.; Kroger, H.

    1985-03-01

    The authors describe a technique for fabricating magnetically coupled Josephson logic and memory circuits and SQUIDs which uses only two superconducting layers. These two layers perform multiple functions as the base and counterelectrodes of the tunnel junctions, the SQUID inductance and control lines, and the signal lines and groundplane between gates. This technique is illustrated by the specific example of a two junction, resistively damped SQUID designed to be fabricated using an all-refractory process which employs a total of five masking levels.

  15. Circuit model of the ITER-like antenna for JET and simulation of its control algorithms

    SciTech Connect (OSTI)

    Durodié, Frédéric Křivská, Alena; Helou, Walid; Collaboration: EUROfusion Consortium

    2015-12-10

    The ITER-like Antenna (ILA) for JET [1] is a 2 toroidal by 2 poloidal array of Resonant Double Loops (RDL) featuring in-vessel matching capacitors feeding RF current straps in conjugate-T manner, a low impedance quarter-wave impedance transformer, a service stub allowing hydraulic actuator and water cooling services to reach the aforementioned capacitors and a 2nd stage phase-shifter-stub matching circuit allowing to correct/choose the conjugate-T working impedance. Toroidally adjacent RDLs are fed from a 3dB hybrid splitter. It has been operated at 33, 42 and 47MHz on plasma (2008-2009) while it presently estimated frequency range is from 29 to 49MHz. At the time of the design (2001-2004) as well as the experiments the circuit models of the ILA were quite basic. The ILA front face and strap array Topica model was relatively crude and failed to correctly represent the poloidal central septum, Faraday Screen attachment as well as the segmented antenna central septum limiter. The ILA matching capacitors, T-junction, Vacuum Transmission Line (VTL) and Service Stubs were represented by lumped circuit elements and simple transmission line models. The assessment of the ILA results carried out to decide on the repair of the ILA identified that achieving routine full array operation requires a better understanding of the RF circuit, a feedback control algorithm for the 2nd stage matching as well as tighter calibrations of RF measurements. The paper presents the progress in modelling of the ILA comprising a more detailed Topica model of the front face for various plasma Scrape Off Layer profiles, a comprehensive HFSS model of the matching capacitors including internal bellows and electrode cylinders, 3D-EM models of the VTL including vacuum ceramic window, Service stub, a transmission line model of the 2nd stage matching circuit and main transmission lines including the 3dB hybrid splitters. A time evolving simulation using the improved circuit model allowed to design and

  16. Circuit for monitoring temperature of high-voltage equipment

    DOE Patents [OSTI]

    Jacobs, Martin E.

    1976-01-01

    This invention relates to an improved circuit for measuring temperature in a region at high electric potential and generating a read-out of the same in a region at lower potential. The circuit is specially designed to combine high sensitivity, stability, and accuracy. A major portion of the circuit situated in the high-potential region can take the form of an integrated circuit. The preferred form of the circuit includes an input section which is situated in the high-potential region and comprises a temperature-compensated thermocouple circuit for sensing temperature, an oscillator circuit for generating a train of ramp voltages whose rise time varies inversely with the thermocouple output, a comparator and switching circuit for converting the oscillator output to pulses whose frequency is proportional to the thermocouple output, and a light-emitting diode which is energized by these pulses. An optical coupling transmits the light pulses generated by the diode to an output section of the circuit, situated in a region at ground. The output section comprises means for converting the transmitted pulses to electrical pulses of corresponding frequency, means for amplifying the electrical pulses, and means for displaying the frequency of the same. The preferred embodiment of the overall circuit is designed so that the frequency of the output signal in hertz and tenths of hertz is equal to the sensed temperature in degrees and tenths of degrees.

  17. Capacitive charge generation apparatus and method for testing circuits

    DOE Patents [OSTI]

    Cole, E.I. Jr.; Peterson, K.A.; Barton, D.L.

    1998-07-14

    An electron beam apparatus and method for testing a circuit are disclosed. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 {micro}m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits. 7 figs.

  18. Capacitive charge generation apparatus and method for testing circuits

    DOE Patents [OSTI]

    Cole, Jr., Edward I.; Peterson, Kenneth A.; Barton, Daniel L.

    1998-01-01

    An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.

  19. Interrogator system for identifying electrical circuits

    DOE Patents [OSTI]

    Jatko, W.B.; McNeilly, D.R.

    1988-04-12

    A system for interrogating electrical leads to correctly ascertain the identity of equipment attached to remote ends of the leads is disclosed. The system includes a source of a carrier signal generated in a controller/receiver to be sent over the leads and an identifier unit at the equipment. The identifier is activated by command of the carrier and uses a portion of the carrier to produce a supply voltage. Each identifier is uniquely programmed for a specific piece of equipment, and causes the impedance of the circuit to be modified whereby the carrier signal is modulated according to that program. The modulation can be amplitude, frequency or phase modulation. A demodulator in the controller/receiver analyzes the modulated carrier signal, and if a verified signal is recognized displays and/or records the information. This information can be utilized in a computer system to prepare a wiring diagram of the electrical equipment attached to specific leads. Specific circuit values are given for amplitude modulation, and the system is particularly described for use with thermocouples. 6 figs.

  20. Interrogator system for identifying electrical circuits

    DOE Patents [OSTI]

    Jatko, William B.; McNeilly, David R.

    1988-01-01

    A system for interrogating electrical leads to correctly ascertain the identity of equipment attached to remote ends of the leads. The system includes a source of a carrier signal generated in a controller/receiver to be sent over the leads and an identifier unit at the equipment. The identifier is activated by command of the carrier and uses a portion of the carrier to produce a supply voltage. Each identifier is uniquely programmed for a specific piece of equipment, and causes the impedance of the circuit to be modified whereby the carrier signal is modulated according to that program. The modulation can be amplitude, frequency or phase modulation. A demodulator in the controller/receiver analyzes the modulated carrier signal, and if a verified signal is recognized displays and/or records the information. This information can be utilized in a computer system to prepare a wiring diagram of the electrical equipment attached to specific leads. Specific circuit values are given for amplitude modulation, and the system is particularly described for use with thermocouples.

  1. Hydraulic actuator for an electric circuit breaker

    DOE Patents [OSTI]

    Imam, Imdad

    1983-01-01

    This actuator comprises a fluid motor having a piston, a breaker-opening space at one side of the piston, and a breaker-closing space at its opposite side. An accumulator freely communicates with the breaker-opening space for supplying pressurized fluid thereto during a circuit breaker opening operation. The breaker-opening space and the breaker-closing space are connected by an impeded flow passage. A pilot valve opens to allow the pressurized liquid in the breaker-closing space to flow to a back chamber of a normally closed main valve to cause the main valve to be opened during a circuit breaker opening operation to release the pressurized liquid from the breaker-closing space. An impeded passage affords communication between the back chamber and a sump located on the opposite side of the main valve from the back chamber. The pilot valve and impeded passage allow rapid opening of the main valve with pressurized liquid from the breaker closing side of the piston.

  2. Hydraulic actuator for an electric circuit breaker

    DOE Patents [OSTI]

    Imam, I.

    1983-05-17

    This actuator comprises a fluid motor having a piston, a breaker-opening space at one side of the piston, and a breaker-closing space at its opposite side. An accumulator freely communicates with the breaker-opening space for supplying pressurized fluid thereto during a circuit breaker opening operation. The breaker-opening space and the breaker-closing space are connected by an impeded flow passage. A pilot valve opens to allow the pressurized liquid in the breaker-closing space to flow to a back chamber of a normally closed main valve to cause the main valve to be opened during a circuit breaker opening operation to release the pressurized liquid from the breaker-closing space. An impeded passage affords communication between the back chamber and a sump located on the opposite side of the main valve from the back chamber. The pilot valve and impeded passage allow rapid opening of the main valve with pressurized liquid from the breaker closing side of the piston. 3 figs.

  3. Safety and performance enhancement circuit for primary explosive detonators

    DOE Patents [OSTI]

    Davis, Ronald W.

    2006-04-04

    A safety and performance enhancement arrangement for primary explosive detonators. This arrangement involves a circuit containing an energy storage capacitor and preset self-trigger to protect the primary explosive detonator from electrostatic discharge (ESD). The circuit does not discharge into the detonator until a sufficient level of charge is acquired on the capacitor. The circuit parameters are designed so that normal ESD environments cannot charge the protection circuit to a level to achieve discharge. When functioned, the performance of the detonator is also improved because of the close coupling of the stored energy.

  4. DSOPilot project Automatic receipt of short circuiting indicators...

    Open Energy Info (EERE)

    project Automatic receipt of short circuiting indicators Country Denmark Coordinates 56.26392, 9.501785 Loading map... "minzoom":false,"mappingservice":"googlemaps3","type...

  5. High Temperature, High Voltage Fully Integrated Gate Driver Circuit...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    D.C. PDF icon ape003tolbert2010p.pdf More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Wide Bandgap Materials Smart ...

  6. High Temperature, High Voltage Fully Integrated Gate Driver Circuit...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    -- Washington D.C. PDF icon ape03marlino.pdf More Documents & Publications High Temperature, High Voltage Fully Integrated Gate Driver Circuit Smart Integrated Power Module ...

  7. Automatic ranging circuit for a digital panel meter

    DOE Patents [OSTI]

    Mueller, Theodore R.; Ross, Harley H.

    1976-01-01

    This invention relates to a range changing circuit that operates in conjunction with a digital panel meter of fixed sensitivity. The circuit decodes the output of the panel meter and uses that information to change the gain of an input amplifier to the panel meter in order to insure that the maximum number of significant figures is always displayed in the meter. The circuit monitors five conditions in the meter and responds to any of four combinations of these conditions by means of logic elements to carry out the function of the circuit.

  8. Numerical and Experimental Investigation of Internal Short Circuit...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Battery Thermal Modeling and Testing Implantation, Activation, Characterization and PreventionMitigation of Internal Short Circuits in Lithium-Ion Cells Progress of DOE Materials, ...

  9. ELECTRICAL CIRCUITS USING COLD-CATHODE TRIODE VALVES

    DOE Patents [OSTI]

    Goulding, F.S.

    1957-11-26

    An electrical circuit which may be utilized as a pulse generator or voltage stabilizer is presented. The circuit employs a cold-cathode triode valve arranged to oscillate between its on and off stages by the use of selected resistance-capacitance time constant components in the plate and trigger grid circuits. The magnitude of the d-c voltage applied to the trigger grid circuit effectively controls the repetition rate of the output pulses. In the voltage stabilizer arrangement the d-c control voltage is a portion of the supply voltage and the rectified output voltage is substantially constant.

  10. High performance protection circuit for power electronics applications

    SciTech Connect (OSTI)

    Tudoran, Cristian D. Dădârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-23

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a “sensor” or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  11. High speed, long distance, data transmission multiplexing circuit

    DOE Patents [OSTI]

    Mariotti, Razvan

    1991-01-01

    A high speed serial data transmission multiplexing circuit, which is operable to accurately transmit data over long distances (up to 3 Km), and to multiplex, select and continuously display real time analog signals in a bandwidth from DC to 100 Khz. The circuit is made fault tolerant by use of a programmable flywheel algorithm, which enables the circuit to tolerate one transmission error before losing synchronization of the transmitted frames of data. A method of encoding and framing captured and transmitted data is used which has a low overhead and prevents some particular transmitted data patterns from locking an included detector/decoder circuit.

  12. Double field theory inspired cosmology

    SciTech Connect (OSTI)

    Wu, Houwen; Yang, Haitang E-mail: hyanga@scu.edu.cn

    2014-07-01

    Double field theory proposes a generalized spacetime action possessing manifest T-duality on the level of component fields. We calculate the cosmological solutions of double field theory with vanishing Kalb-Ramond field. It turns out that double field theory provides a more consistent way to construct cosmological solutions than the standard string cosmology. We construct solutions for vanishing and non-vanishing symmetry preserving dilaton potentials. The solutions assemble the pre- and post-big bang evolutions in one single line element. Our results show a smooth evolution from an anisotropic early stage to an isotropic phase without any special initial conditions in contrast to previous models. In addition, we demonstrate that the contraction of the dual space automatically leads to both an inflation phase and a decelerated expansion of the ordinary space during different evolution stages.

  13. Timing control by redundant inhibitory neuronal circuits

    SciTech Connect (OSTI)

    Tristan, I. Rulkov, N. F.; Huerta, R.; Rabinovich, M.

    2014-03-15

    Rhythms and timing control of sequential activity in the brain is fundamental to cognition and behavior. Although experimental and theoretical studies support the understanding that neuronal circuits are intrinsically capable of generating different time intervals, the dynamical origin of the phenomenon of functionally dependent timing control is still unclear. Here, we consider a new mechanism that is related to the multi-neuronal cooperative dynamics in inhibitory brain motifs consisting of a few clusters. It is shown that redundancy and diversity of neurons within each cluster enhances the sensitivity of the timing control with the level of neuronal excitation of the whole network. The generality of the mechanism is shown to work on two different neuronal models: a conductance-based model and a map-based model.

  14. Attosecond Double-Slit Experiment

    SciTech Connect (OSTI)

    Lindner, F.; Schaetzel, M.G.; Baltuska, A.; Goulielmakis, E.; Walther, H.; Krausz, F.; Milosevic, D.B.; Bauer, D.; Becker, W.; Paulus, G.G.

    2005-07-22

    A new scheme for a double-slit experiment in the time domain is presented. Phase-stabilized few-cycle laser pulses open one to two windows (slits) of attosecond duration for photoionization. Fringes in the angle-resolved energy spectrum of varying visibility depending on the degree of which-way information are measured. A situation in which one and the same electron encounters a single and a double slit at the same time is observed. The investigation of the fringes makes possible interferometry on the attosecond time scale. From the number of visible fringes, for example, one derives that the slits are extended over about 500 as.

  15. Double stranded nucleic acid biochips

    DOE Patents [OSTI]

    Chernov, Boris; Golova, Julia

    2006-05-23

    This invention describes a new method of constructing double-stranded DNA (dsDNA) microarrays based on the use of pre-synthesized or natural DNA duplexes without a stem-loop structure. The complementary oligonucleotide chains are bonded together by a novel connector that includes a linker for immobilization on a matrix. A non-enzymatic method for synthesizing double-stranded nucleic acids with this novel connector enables the construction of inexpensive and robust dsDNA/dsRNA microarrays. DNA-DNA and DNA-protein interactions are investigated using the microarrays.

  16. High Resolution PV Power Modeling for Distribution Circuit Analysis

    SciTech Connect (OSTI)

    Norris, B. L.; Dise, J. H.

    2013-09-01

    NREL has contracted with Clean Power Research to provide 1-minute simulation datasets of PV systems located at three high penetration distribution feeders in the service territory of Southern California Edison (SCE): Porterville, Palmdale, and Fontana, California. The resulting PV simulations will be used to separately model the electrical circuits to determine the impacts of PV on circuit operations.

  17. Developing 300°C Ceramic Circuit Boards

    SciTech Connect (OSTI)

    Normann, Randy A

    2015-02-15

    This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C. Discussion on producing this type of board is outlined along with areas needing improvement.

  18. Short-Circuit Modeling of a Wind Power Plant: Preprint

    SciTech Connect (OSTI)

    Muljadi, E.; Gevorgian, V.

    2011-03-01

    This paper investigates the short-circuit behavior of a WPP for different types of wind turbines. The short-circuit behavior will be presented. Both the simplified models and detailed models are used in the simulations and both symmetrical faults and unsymmetrical faults are discussed.

  19. The double well mass filter

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Gueroult, Renaud; Rax, Jean -Marcel; Fisch, Nathaniel J.

    2014-02-03

    Various mass filter concepts based on rotating plasmas have been suggested with the specific purpose of nuclear waste remediation. We report on a new rotating mass filter combining radial separation with axial extraction. Lastly, the radial separation of the masses is the result of a “double-well” in effective radial potential in rotating plasma with a sheared rotation profile.

  20. Multi-channel detector readout method and integrated circuit

    DOE Patents [OSTI]

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2004-05-18

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  1. Multi-channel detector readout method and integrated circuit

    DOE Patents [OSTI]

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2006-12-12

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  2. Leaky insulating paint for preventing discharge anomalies on circuit boards

    SciTech Connect (OSTI)

    Frederickson, A.R.; Enloe, C.L.; Mullen, E.G. ); Nanevicz, J.E.; Thayer, J.S. )

    1989-12-01

    This paper reports on a semi-insulating paint formulated and tested for preventing pulse discharges from causing damage to circuits on heavily irradiated circuit boards. The paint is tin oxide filled phenoxy resin with a bulk resistivity of 10{sup 8} ohm-cm. A typical coating is then 10{sup 10} ohms per square. It is applied over the finished, conformally coated circuit board and connected to ground where possible on the board. It works by minimizing the stored electric field energy prior to the discharge. With such high resistivity it can not load down most circuits. Tests were performed on circuit boards with and without the paint using energetic electron beams to simulate very high space exposure levels. Many potentially damaging pulses were seen without the paint, but application of the paint removed all large pulses and only a few small pulses were seen.

  3. Improved analysis techniques for cylindrical and spherical double probes

    SciTech Connect (OSTI)

    Beal, Brian; Brown, Daniel; Bromaghim, Daron; Johnson, Lee; Blakely, Joseph

    2012-07-15

    A versatile double Langmuir probe technique has been developed by incorporating analytical fits to Laframboise's numerical results for ion current collection by biased electrodes of various sizes relative to the local electron Debye length. Application of these fits to the double probe circuit has produced a set of coupled equations that express the potential of each electrode relative to the plasma potential as well as the resulting probe current as a function of applied probe voltage. These equations can be readily solved via standard numerical techniques in order to determine electron temperature and plasma density from probe current and voltage measurements. Because this method self-consistently accounts for the effects of sheath expansion, it can be readily applied to plasmas with a wide range of densities and low ion temperature (T{sub i}/T{sub e} Much-Less-Than 1) without requiring probe dimensions to be asymptotically large or small with respect to the electron Debye length. The presented approach has been successfully applied to experimental measurements obtained in the plume of a low-power Hall thruster, which produced a quasineutral, flowing xenon plasma during operation at 200 W on xenon. The measured plasma densities and electron temperatures were in the range of 1 Multiplication-Sign 10{sup 12}-1 Multiplication-Sign 10{sup 17} m{sup -3} and 0.5-5.0 eV, respectively. The estimated measurement uncertainty is +6%/-34% in density and +/-30% in electron temperature.

  4. Screening technology reduces ash in spiral circuits

    SciTech Connect (OSTI)

    Brodzik, P.

    2007-05-15

    In 2006, the James River Coal Co. selected the Stack Sizer to remove the minus 100 mesh high ash clay fraction from the clean coal spiral product circuits at the McCoy-Elkhorn Bevins Branch prep plant and at the Blue Diamond Leatherwood prep plant in Kentucky. The Stack Sizer is a multi-deck, high-frequency vibrating screen capable of separations as fine as 75 microns when fitted with Derrick Corp.'s patented high open area urethane screen panels. Full-scale lab tests and more than 10 months of continuous production have confirmed that the Stack Sizer fitted with Derrick 100 micron urethane screen panels consistently produces a clean coal fraction that ranges from 8 to 10% ash. Currently, each five-deck Stack Sizer operating at the Bevins Branch and Leatherwood prep plants is producing approximately 33 tons per hour of clean coal containing about 9% ash. This represents a clean coal yield of about 75% and an ash reduction of about 11% from the feed slurry. 3 figs. 2 tabs.

  5. Engine lubrication circuit including two pumps

    DOE Patents [OSTI]

    Lane, William H.

    2006-10-03

    A lubrication pump coupled to the engine is sized such that the it can supply the engine with a predetermined flow volume as soon as the engine reaches a peak torque engine speed. In engines that operate predominately at speeds above the peak torque engine speed, the lubrication pump is often producing lubrication fluid in excess of the predetermined flow volume that is bypassed back to a lubrication fluid source. This arguably results in wasted power. In order to more efficiently lubricate an engine, a lubrication circuit includes a lubrication pump and a variable delivery pump. The lubrication pump is operably coupled to the engine, and the variable delivery pump is in communication with a pump output controller that is operable to vary a lubrication fluid output from the variable delivery pump as a function of at least one of engine speed and lubrication flow volume or system pressure. Thus, the lubrication pump can be sized to produce the predetermined flow volume at a speed range at which the engine predominately operates while the variable delivery pump can supplement lubrication fluid delivery from the lubrication pump at engine speeds below the predominant engine speed range.

  6. Thermally-induced voltage alteration for integrated circuit analysis

    DOE Patents [OSTI]

    Cole, Jr., Edward I.

    2000-01-01

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  7. Measurements of the Effects of Smoke on Active Circuits

    SciTech Connect (OSTI)

    Tanaka, T.J.

    1999-02-09

    Smoke has long been recognized as the most common source of fire damage to electrical equipment; however, most failures have been analyzed after the fire was out and the smoke vented. The effects caused while the smoke is still in the air have not been explored. Such effects have implications for new digital equipment being installed in nuclear reactors. The U.S. Nuclear Regulatory Commission is sponsoring work to determine the impact of smoke on digital instrumentation and control. As part of this program, Sandia National Laboratories has tested simple active circuits to determine how smoke affects them. These tests included the study of three possible failure modes on a functional board: (1) circuit bridging, (2) corrosion (metal loss), and (3) induction of stray capacitance. The performance of nine different circuits was measured continuously on bare and conformably coated boards during smoke exposures lasting 1 hour each and continued for 24 hours after the exposure started. The circuit that was most affected by smoke (100% change in measured values) was the one most sensitive to circuit bridging. Its high impedance (50 M{Omega}) was shorted during the exposure, but in some cases recovered after the smoke was vented. The other two failure modes, corrosion and induced stray capacitance, caused little change in the function of the circuits. The smoke permanently increased resistance of the circuit tested for corrosion, implying that the cent acts were corroded. However, the change was very small (< 2%). The stray-capacitance test circuit showed very little change after a smoke exposure in either the short or long term. The results of the tests suggest that conformal coatings and type of circuit are major considerations when designing digital circuitry to be used in critical control systems.

  8. Minimal Doubling and Point Splitting

    SciTech Connect (OSTI)

    Creutz, M.

    2010-06-14

    Minimally-doubled chiral fermions have the unusual property of a single local field creating two fermionic species. Spreading the field over hypercubes allows construction of combinations that isolate specific modes. Combining these fields into bilinears produces meson fields of specific quantum numbers. Minimally-doubled fermion actions present the possibility of fast simulations while maintaining one exact chiral symmetry. They do, however, introduce some peculiar aspects. An explicit breaking of hyper-cubic symmetry allows additional counter-terms to appear in the renormalization. While a single field creates two different species, spreading this field over nearby sites allows isolation of specific states and the construction of physical meson operators. Finally, lattice artifacts break isospin and give two of the three pseudoscalar mesons an additional contribution to their mass. Depending on the sign of this mass splitting, one can either have a traditional Goldstone pseudoscalar meson or a parity breaking Aoki-like phase.

  9. Green Future Double Barrel House

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    University Green Future Double Barrel House DOE Race to Zero Student Competition 2016 Sean Benson Team Leader - Net Zero Energy Design I & II Bachelor of Science in Architecture, Dec 2016 Alexis Borman Net Zero Energy Design II Bachelor of Science in Architecture, May 2016 Christopher Brown AIA COTE, Net Zero Energy Design I & II Bachelor of Science in Architecture, May 2016 Devonta Magee Net Zero Energy Design II Bachelor of Science in Architecture, Aug 2016 Yasmine Parker Net Zero

  10. Biasing and fast degaussing circuit for magnetic materials

    DOE Patents [OSTI]

    Dress, Jr., William B.; McNeilly, David R.

    1984-01-01

    A dual-function circuit is provided which may be used to both magnetically bias and alternately, quickly degauss a magnetic device. The circuit may be magnetically coupled or directly connected electrically to a magnetic device, such as a magnetostrictive transducer, to magnetically bias the device by applying a d.c. current and alternately apply a selectively damped a.c. current to the device to degauss the device. The circuit is of particular value in many systems which use magnetostrictive transducers for ultrasonic transmission in different propagation modes over very short time periods.

  11. Apparatus for mounting a diode in a microwave circuit

    DOE Patents [OSTI]

    Liu, Shing-gong

    1976-07-27

    Apparatus for mounting a diode in a microwave circuit for making electrical contact between the circuit and ground and for dissipation of heat between the diode and a heat sink. The diode, supported on a thermally and electrically conductive member, is resiliently pressed in electrical contact with the microwave circuit. A tapered collar on the member is elastically deformably wedged into a tapered aperture formed in a heat sink. The wedged collar tightens firmly around the member establishing good thermal and electrical conduction from the diode to the heat sink and ground. Disassembly is facilitated because of the elastically deformed collar.

  12. Compact fluid cooled power converter supporting multiple circuit boards

    DOE Patents [OSTI]

    Radosevich, Lawrence D.; Meyer, Andreas A.; Beihoff, Bruce C.; Kannenberg, Daniel G.

    2005-03-08

    A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

  13. High density electronic circuit and process for making

    DOE Patents [OSTI]

    Morgan, W.P.

    1999-06-29

    High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

  14. High density electronic circuit and process for making

    DOE Patents [OSTI]

    Morgan, William P.

    1999-01-01

    High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.

  15. Biasing and fast degaussing circuit for magnetic materials

    DOE Patents [OSTI]

    Dress, W.B. Jr.; McNeilly, D.R.

    1983-10-04

    A dual-function circuit is provided which may be used to both magnetically bias and alternately, quickly degauss a magnetic device. The circuit may be magnetically coupled or directly connected electrically to a magnetic device, such as a magnetostrictive transducer, to magnetically bias the device by applying a dc current and alternately apply a selectively damped ac current to the device to degauss the device. The circuit is of particular value in many systems which use magnetostrictive transducers for ultrasonic transmission in different propagation modes over very short time periods.

  16. Doubling Geothermal Generation Capacity by 2020: A Strategic...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Doubling Geothermal Generation Capacity by 2020: A Strategic Analysis Doubling Geothermal Generation Capacity by 2020: A Strategic Analysis PDF icon NREL Doubling Geothermal ...

  17. Pair extended coupled cluster doubles

    SciTech Connect (OSTI)

    Henderson, Thomas M.; Scuseria, Gustavo E.; Bulik, Ireneusz W.

    2015-06-07

    The accurate and efficient description of strongly correlated systems remains an important challenge for computational methods. Doubly occupied configuration interaction (DOCI), in which all electrons are paired and no correlations which break these pairs are permitted, can in many cases provide an accurate account of strong correlations, albeit at combinatorial computational cost. Recently, there has been significant interest in a method we refer to as pair coupled cluster doubles (pCCD), a variant of coupled cluster doubles in which the electrons are paired. This is simply because pCCD provides energies nearly identical to those of DOCI, but at mean-field computational cost (disregarding the cost of the two-electron integral transformation). Here, we introduce the more complete pair extended coupled cluster doubles (pECCD) approach which, like pCCD, has mean-field cost and reproduces DOCI energetically. We show that unlike pCCD, pECCD also reproduces the DOCI wave function with high accuracy. Moreover, pECCD yields sensible albeit inexact results even for attractive interactions where pCCD breaks down.

  18. High-Temperature Circuit Boards for Use in Geothermal Well Monitoring...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    High-Temperature Circuit Boards for Use in Geothermal Well Monitoring Applications Project objective: Develop and demonstrate high-temperature; multilayer electronic circuits ...

  19. Triple inverter pierce oscillator circuit suitable for CMOS

    DOE Patents [OSTI]

    Wessendorf; Kurt O.

    2007-02-27

    An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.

  20. Design and Modeling of Pulsed Power Accelerators Via Circuit Analysis

    Energy Science and Technology Software Center (OSTI)

    1996-12-05

    SCREAMER simulates electrical circuits which may contain elements of variable resistance, capacitance and inductance. The user may add variable circuit elements in a simulation by choosing from a library of models or by writing a subroutine describing the element. Transmission lines, magnetically insulated transmission lines (MITLs) and arbitrary voltage and current sources may also be included. Transmission lines are modeled using pi-sections connected in series. Many models of switches and loads are included.

  1. Low Power Photomultiplier Tube Circuit And Method Thereor

    DOE Patents [OSTI]

    Bochenski, Edwin B.; Skinner, Jack L.; Dentinger, Paul M.; Lindblom, Scott C.

    2006-04-18

    An electrical circuit for a photomultiplier tube (PMT) is disclosed that reduces power consumption to a point where the PMT may be powered for extended periods with a battery. More specifically, the invention concerns a PMT circuit comprising a low leakage switch and a high voltage capacitor positioned between a resistive divider and each of the PMT dynodes, and a low power control scheme for recharging the capacitors.

  2. DOE - Office of Legacy Management -- Electro Circuits Inc - CA 08

    Office of Legacy Management (LM)

    Electro Circuits Inc - CA 08 FUSRAP Considered Sites Site: Electro Circuits, Inc. (CA.08 ) Eliminated from consideration under FUSRAP Designated Name: Not Designated Alternate Name: None Location: 401 East Green Street , Pasadena , California CA.08-1 Evaluation Year: 1994 CA.08-2 Site Operations: Conducted ultrasonic tests on uranium ingots in the early 1950s. CA.08-3 CA.08-4 Site Disposition: Eliminated - Potential for contamination remote based on limited operations at the site CA.08-2

  3. Cooling circuit for a gas turbine bucket and tip shroud

    DOE Patents [OSTI]

    Willett, Fred Thomas; Itzel, Gary Michael; Stathopoulos, Dimitrios; Plemmons, Larry Wayne; Plemmons, Helen M.; Lewis, Doyle C.

    2002-01-01

    An open cooling circuit for a gas turbine bucket wherein the bucket has an airfoil portion, and a tip shroud, the cooling circuit including a plurality of radial cooling holes extending through the airfoil portion and communicating with an enlarged internal area within the tip shroud before exiting the tip shroud such that a cooling medium used to cool the airfoil portion is subsequently used to cool the tip shroud.

  4. Ultra-low power microwave CHFET integrated circuit development

    SciTech Connect (OSTI)

    Baca, A.G.; Hietala, V.M.; Greenway, D.; Sloan, L.R.; Shul, R.J.; Muyshondt, G.P.; Dubbert, D.F.

    1998-04-01

    This report summarizes work on the development of ultra-low power microwave CHFET integrated circuit development. Power consumption of microwave circuits has been reduced by factors of 50--1,000 over commercially available circuits. Positive threshold field effect transistors (nJFETs and PHEMTs) have been used to design and fabricate microwave circuits with power levels of 1 milliwatt or less. 0.7 {micro}m gate nJFETs are suitable for both digital CHFET integrated circuits as well as low power microwave circuits. Both hybrid amplifiers and MMICs were demonstrated at the 1 mW level at 2.4 GHz. Advanced devices were also developed and characterized for even lower power levels. Amplifiers with 0.3 {micro}m JFETs were simulated with 8--10 dB gain down to power levels of 250 microwatts ({mu}W). However 0.25 {micro}m PHEMTs proved superior to the JFETs with amplifier gain of 8 dB at 217 MHz and 50 {mu}W power levels but they are not integrable with the digital CHFET technology.

  5. Booster double harmonic setup notes

    SciTech Connect (OSTI)

    Gardner, C. J.

    2015-02-17

    The motivation behind implementing a booster double harmonic include the reduced transverse space charge force from a reduced peak beam current and reduced momentum spread of the beam, both of which can be achieved from flattening the RF bucket. RF capture and acceleration of polarized protons (PP) is first set up in the single harmonic mode with RF harmonic h=1. Once capture and acceleration have been set up in the single harmonic mode, the second harmonic system is brought on and programmed to operate in concert with the single harmonic system.

  6. Double distributions and evolution equations

    SciTech Connect (OSTI)

    A.V. Radyushkin

    1998-05-01

    Applications of perturbative QCD to deeply virtual Compton scattering and hard exclusive meson electroproduction processes require a generalization of usual parton distributions for the case when long-distance information is accumulated in nonforward matrix elements < p{prime} {vert_bar}O(0,z){vert_bar}p > of quark and gluon light-cone operators. In their previous papers the authors used two types of nonperturbative functions parameterizing such matrix elements: double distributions F(x,y;t) and nonforward distribution functions F{sub {zeta}}(X;t). Here they discuss in more detail the double distributions (DD's) and evolution equations which they satisfy. They propose simple models for F(x,y;t=0) DD's with correct spectral and symmetry properties which also satisfy the reduction relations connecting them to the usual parton densities f(x). In this way, they obtain self-consistent models for the {zeta}-dependence of nonforward distributions. They show that, for small {zeta}, one can easily obtain nonforward distributions (in the X > {zeta} region) from the parton densities: F{sub {zeta}} (X;t=0) {approx} f(X{minus}{zeta}/2).

  7. Attachment method for stacked integrated circuit (IC) chips

    DOE Patents [OSTI]

    Bernhardt, A.F.; Malba, V.

    1999-08-03

    An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

  8. Dual-circuit embossed-sheet heat-transfer panel

    DOE Patents [OSTI]

    Morgan, G.D.

    1982-08-23

    A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed for form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet.

  9. Attachment method for stacked integrated circuit (IC) chips

    DOE Patents [OSTI]

    Bernhardt, Anthony F.; Malba, Vincent

    1999-01-01

    An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

  10. Double perovskite catalysts for oxidative coupling

    DOE Patents [OSTI]

    Campbell, Kenneth D.

    1991-01-01

    Alkali metal doped double perovskites containing manganese and at least one of cobalt, iron and nickel are useful in the oxidative coupling of alkane to higher hydrocarbons.