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Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


1

Evaluation of Suspected Steady-State Magnetic Induction by a 345-kV Double-Circuit Transmission Line onto Railroad Track  

Science Conference Proceedings (OSTI)

CenterPoint Energy operates a double circuit 345-kV transmission line north of Houston that parallels the Burlington Northern Santa Fe Railroad (BNSF) for approximately 15 miles. The railroad is experiencing elevated steady-state 60-Hz voltage in the parallel exposure. AC voltages and currents in railroad track can come from many sources. And, railroad systems can withstand reasonable amounts of this electromagnetic interference (EMI) without problems. When problems with EMI on a railroad do appear, it i...

2008-11-12T23:59:59.000Z

2

Improved performance of Li-ion cells under pulsed load using double-layer capacitors in a hybrid circuit mode  

DOE Green Energy (OSTI)

Electrical characteristics of hybrid power sources consisting of Li-ion cells and double-layer capacitors were studied at 25 C and {minus}20 C. The cells were initially evaluated for pulse performance and then measured in hybrid modes of operation where they were coupled with the high-power capacitors. Cells manufactured by Panasonic measured at 25 C delivered full capacities of 0.76 Ah for pulses up to 3A and cells from A and T delivered full capacities of 0.73 Ah for pulses up to 4A. Measured cell resistances were 0.15 ohms and 0.12 ohms, respectively. These measurements were repeated at {minus}20 C. Direct coupling of the cells and capacitors (coupled hybrid) using 10F Panasonic capacitors in a 8F series/parallel combination extended the full capacity pulse limits (3.0V threshold) to 5.6A for the Panasonic cells and to 9A for the A and T cells. A similar arrangement using 100F capacitors from Elna in a 60F combination increased the Panasonic cell limit to 10 A. Operation in an uncoupled hybrid mode using uncoupled cell/capacitor discharge allowed fill cell capacity usage at 25 C up to the capacitor discharge limit and showed a factor of 5 improvement in delivered capacity at {minus}20 C.

ROTH,EMANUEL P.; NAGASUBRAMANIAN,GANESAN

2000-02-07T23:59:59.000Z

3

CX-007132: Categorical Exclusion Determination  

Energy.gov (U.S. Department of Energy (DOE))

Casa Grande-Empire Double Circuit Upgrade AmendmentCX(s) Applied: B4.13Date: 04/28/2011Location(s): Pinal County, ArizonaOffice(s): Western Area Power Administration-Desert Southwest Region

4

CX-004888: Categorical Exclusion Determination  

Energy.gov (U.S. Department of Energy (DOE))

Casa Grande-Empire (Double Circuit Upgrade)CX(s) Applied: B4.13Date: 09/15/2010Location(s): Pinal County, ArizonaOffice(s): Western Area Power Administration-Desert Southwest Region

5

Categorical Exclusion Determinations: Western Area PowerAdministratio...  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

Grande-Empire (Double Circuit Upgrade) CX(s) Applied: B4.13 Date: 09152010 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region...

6

Measuring circuit  

DOE Patents (OSTI)

An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

Sun, Shan C. (Pittsburgh, PA); Chaprnka, Anthony G. (Cockeysville, MD)

1977-01-11T23:59:59.000Z

7

Record of Decision for the Interconnection of the Sutter Power Project With the Western Area Power Administration's Keswick-Elverta/Olinda-Elverta 230-Kilovolt Double-Circuit Transmission Line, June 15, 1999  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

41 41 Federal Register / Vol. 64, No. 114 / Tuesday, June 15, 1999 / Notices DEPARTMENT OF ENERGY Western Area Power Administration Record of Decision for the Interconnection of the Sutter Power Project With the Western Area Power Administration's Keswick-Elverta/ Olinda-Elverta 230-Kilovolt Double- Circuit Transmission Line AGENCY: Western Area Power Administration, DOE. ACTION: Record of decision. SUMMARY: The Western Area Power Administration (Western) prepared this Record of Decision in response to a request submitted to Western for a direct interconnection of Calpine Corporation's (Calpine) proposed Sutter Power Project (SPP) with Western's electric transmission system. In response to this request, Western completed an Interconnection Feasibility Study that determined that

8

ADDER CIRCUIT  

DOE Patents (OSTI)

An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

Jacobsohn, D.H.; Merrill, L.C.

1959-01-20T23:59:59.000Z

9

MULTIPLIER CIRCUIT  

DOE Patents (OSTI)

An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

Thomas, R.E.

1959-01-20T23:59:59.000Z

10

GATING CIRCUITS  

DOE Patents (OSTI)

Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

Merrill, L.C.

1958-10-14T23:59:59.000Z

11

MULTIPLIER CIRCUIT  

DOE Patents (OSTI)

An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

Chase, R.L.

1963-05-01T23:59:59.000Z

12

TIMING CIRCUIT  

DOE Patents (OSTI)

An electronic circuit is described for precisely controlling the power delivered to a load from an a-c source, and is particularly useful as a welder timer. The power is delivered in uniform pulses, produced by a thyratron, the number of pulses being controlled by a one-shot multivibrator. The starting pulse is synchronized with the a-c line frequency so that each multivlbrator cycle begins at about the same point in the a-c cycle.

Heyd, J.W.

1959-07-14T23:59:59.000Z

13

LOGIC CIRCUIT  

DOE Patents (OSTI)

A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

Strong, G.H.; Faught, M.L.

1963-12-24T23:59:59.000Z

14

Commutation circuit for an HVDC circuit breaker  

DOE Patents (OSTI)

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

Premerlani, William J. (Scotia, NY)

1981-01-01T23:59:59.000Z

15

Commutation circuit for an HVDC circuit breaker  

DOE Patents (OSTI)

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

Premerlani, W.J.

1981-11-10T23:59:59.000Z

16

Dual-circuit, multiple-effect refrigeration system and method  

DOE Patents (OSTI)

A dual circuit absorption refrigeration system comprising a high temperature single-effect refrigeration loop and a lower temperature double-effect refrigeration loop separate from one another and provided with a double-condenser coupling therebetween. The high temperature condenser of the single-effect refrigeration loop is double coupled to both of the generators in the double-effect refrigeration loop to improve internal heat recovery and a heat and mass transfer additive such as 2-ethyl-1-hexanol is used in the lower temperature double-effect refrigeration loop to improve the performance of the absorber in the double-effect refrigeration loop.

DeVault, Robert C. (Knoxville, TN)

1995-01-01T23:59:59.000Z

17

LABORATORY V ELECTRIC CIRCUITS  

E-Print Network (OSTI)

are inside materials such as wires or light bulbs. Even though the interactions of electrons inside materials your track lighting uses. So, you decide to build a model of circuits using two bulbs and compare bulbs are as bright as your reference circuit is equivalent to the circuit that your track lighting uses

Minnesota, University of

18

Piezoelectric drive circuit  

DOE Patents (OSTI)

A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

Treu, Jr., Charles A. (Raymore, MO)

1999-08-31T23:59:59.000Z

19

Piezoelectric drive circuit  

DOE Patents (OSTI)

A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

Treu, C.A. Jr.

1999-08-31T23:59:59.000Z

20

CIRCUITS FOR CURRENT MEASUREMENTS  

DOE Patents (OSTI)

Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

Cox, R.J.

1958-11-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


21

Virtual Circuits (OSCARS)  

NLE Websites -- All DOE Office Websites (Extended Search)

Virtual Circuits (OSCARS) Virtual Circuits (OSCARS) Services Overview ECS Audio/Video Conferencing Fasterdata IPv6 Network Network Performance Tools (perfSONAR) ESnet OID Registry PGP Key Service Virtual Circuits (OSCARS) OSCARS Case Study Documentation Links Hardware Requirements DOE Grids Service Transition Contact Us Technical Assistance: 1 800-33-ESnet (Inside the US) 1 800-333-7638 (Inside the US) 1 510-486-7600 (Globally) 1 510-486-7607 (Globally) Report Network Problems: trouble@es.net Provide Web Site Feedback: info@es.net Virtual Circuits (OSCARS) ESnet's On-Demand Secure Circuits and Advance Reservation System (OSCARS) provides multi-domain, high-bandwidth virtual circuits that guarantee end-to-end network data transfer performance. Originally a research concept, OSCARS has grown into a robust production service. Currently

22

Remote reset circuit  

SciTech Connect

A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

Gritzo, Russell E. (West Melbourne, FL)

1987-01-01T23:59:59.000Z

23

Remote reset circuit  

DOE Patents (OSTI)

A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

Gritzo, R.E.

1985-09-12T23:59:59.000Z

24

Gas pressure reduction circuits  

Science Conference Proceedings (OSTI)

This note describes passive pressure reduction devices for use with sensitive instruments. Two gas circuits are developed which not only provide a pressure reduction under flow demand

D. W. Guillaume; D. DeVries

1989-01-01T23:59:59.000Z

25

Environmental Assessment and Finding of No Significant Impact: Western's Hoover Dam Bypass Project Phase II (Double-Circuiting a Portion of the Hoover-Mead No.5 and No.7 230-kV Transmission Lines with the Henderson-Mead No.1 230-kV Transmission Line, Clark County, Nevada)  

SciTech Connect

The U.S. Highway 93 (U.S. 93) Hoover Dam Bypass Project calls for the U.S. Department of Energy (DOE) Western Area Power Administration (Western) to remove its Arizona and Nevada (A&N) Switchyard. As a result of this action, Western must reconfigure its existing electrical transmission system in the Hoover Dam area. Western proposes to double-circuit a portion of the Hoover-Mead No.5 and No.7 230-kV Transmission Lines with the Henderson-Mead No.1 Transmission Line (see Figure 1-1). Double-circuiting is the placement of two separate electrical circuits, typically in the form of three separate conductors or bundles of conductors, on the same set of transmission line structures. The old Henderson-Hoover 230-kV Transmission Line would become the new Henderson-Mead No.1 and would extend approximately eight miles to connect with the Mead Substation. Western owns, operates, and maintains the Hoover-Mead No.5 and No.7, and Henderson-Hoover electrical power transmission lines. Additionally, approximately 0.25 miles of new right-of-way (ROW) would be needed for the Henderson-Mead No.1 when it transfers from double-circuiting with the Hoover-Mead No.7 to the Hoover-Mead No.5 at the Boulder City Tap. The proposed project would also involve a new transmission line ROW and structures where the Henderson-Mead No.1 will split from the Hoover-Mead No.5 and enter the northeast corner of the Mead Substation. Lastly, Western has proposed adding fiber optic overhead ground wire from the Hoover Power Plant to the Mead Substation on to the Henderson-Mead No.1, Hoover-Mead No.5 and No.7 Transmission Lines. The proposed project includes replacing existing transmission line tower structures, installing new structures, and adding new electrical conductors and fiber optic cables. As a consequence of these activities, ground disturbance may result from grading areas for structure placement, constructing new roads, improving existing roads for vehicle and equipment access, and from installing structures, conductors, and fiber optic cables. Project construction activities would be conducted within the existing 200-foot transmission line ROW and 50-foot access road ROW, although new spur access roads could occur outside of existing ROWs. As lead Federal agency for this action under National Environmental Policy Act (NEPA), Western must ensure that adverse environmental effects on Federal and non-Federal lands and resources are avoided or minimized. This Environmental Assessment (EA) is intended to be a concise public document that assesses the probable and known impacts to the environment from Western's Proposed Action and alternatives, and reaches a conclusion about the significance of the impacts. This EA was prepared in compliance with NEPA regulations published by the Council on Environmental Quality (40 CFR 1500-1508) and implementing procedures of the Department of Energy (10 CFR 1021).

N /A

2003-10-27T23:59:59.000Z

26

LABORATORY IV ELECTRIC CIRCUITS  

E-Print Network (OSTI)

familiar electric curren ts are inside materials such as wires or light bulbs. Even though the interactions your track lighting uses. You decide to build models of circuits with two bulbs connected across, bulbs, and batteries. Use the accompanying legend to build the circuits. Legend: light bulb ba

Minnesota, University of

27

Compensated gain control circuit for buck regulator command charge circuit  

DOE Patents (OSTI)

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

Barrett, David M. (Albuquerque, NM)

1996-01-01T23:59:59.000Z

28

Sensor readout detector circuit  

DOE Patents (OSTI)

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

Chu, D.D.; Thelen, D.C. Jr.

1998-08-11T23:59:59.000Z

29

Sensor readout detector circuit  

DOE Patents (OSTI)

A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

Chu, Dahlon D. (Albuquerque, NM); Thelen, Jr., Donald C. (Bozeman, MT)

1998-01-01T23:59:59.000Z

30

DIFFERENTIAL FAULT SENSING CIRCUIT  

DOE Patents (OSTI)

A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

Roberts, J.H.

1961-09-01T23:59:59.000Z

31

Bioluminescent Bioreporter Integrated Circuits  

To address the need for fieldable real-time biological recognition systems, ORNL researchers developed a "laboratory on a chip" using genetically engineered whole cell biosensors attached to integrated circuits (ICs). These bioluminescent ...

32

Optical dynamic circuit services  

Science Conference Proceedings (OSTI)

IP service, leased-line service and POTS service have been the three long-standing communication service offerings of providers. Recently, both commercial and research-andeducation network providers have started offering optical dynamic circuit services. ...

Malathi Veeraraghavan; Mark Karol; George Clapp

2010-11-01T23:59:59.000Z

33

Circuit simulation: some humbling thoughts  

Science Conference Proceedings (OSTI)

A short, very personal note on circuit simulation is presented. It does neither include theoretical background on circuit simulation, nor offers an overview of available software, but just gives some general remarks for a discussion on circuit simulator needs in context to the design and development of accelerator beam instrumentation circuits and systems.

Wendt, Manfred; /Fermilab

2006-01-01T23:59:59.000Z

34

Quantum Circuit Model Topological Model  

E-Print Network (OSTI)

Quantum Circuit Model Topological Model Comparison of Models Topological Quantum Computation Eric Rowell Texas A&M University October 2010 Eric Rowell Topological Quantum Computation #12;Quantum Circuit Model Topological Model Comparison of Models Outline 1 Quantum Circuit Model Gates, Circuits

Rowell, Eric C.

35

Superconducting flux flow digital circuits  

DOE Patents (OSTI)

A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

1995-02-14T23:59:59.000Z

36

Superconducting flux flow digital circuits  

DOE Patents (OSTI)

A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

Hietala, Vincent M. (Placitas, NM); Martens, Jon S. (Sunnyvale, CA); Zipperian, Thomas E. (Albuquerque, NM)

1995-01-01T23:59:59.000Z

37

ELECTRONIC MULTIPLIER CIRCUIT  

DOE Patents (OSTI)

An electronic multiplier circuit is described in which an output voltage having an amplitude proportional to the product or quotient of the input signals is accomplished in a novel manner which facilitates simplicity of circuit construction and a high degree of accuracy in accomplishing the multiplying and dividing function. The circuit broadly comprises a multiplier tube in which the plate current is proportional to the voltage applied to a first control grid multiplied by the difference between voltage applied to a second control grid and the voltage applied to the first control grid. Means are provided to apply a first signal to be multiplied to the first control grid together with means for applying the sum of the first signal to be multiplied and a second signal to be multiplied to the second control grid whereby the plate current of the multiplier tube is proportional to the product of the first and second signals to be multiplied.

Thomas, R.E.

1959-08-25T23:59:59.000Z

38

ELECTRONIC TRIGGER CIRCUIT  

DOE Patents (OSTI)

An electronic trigger circuit is described of the type where an output pulse is obtained only after an input voltage has cqualed or exceeded a selected reference voltage. In general, the invention comprises a source of direct current reference voltage in series with an impedance and a diode rectifying element. An input pulse of preselected amplitude causes the diode to conduct and develop a signal across the impedance. The signal is delivered to an amplifier where an output pulse is produced and part of the output is fed back in a positive manner to the diode so that the amplifier produces a steep wave front trigger pulsc at the output. The trigger point of the described circuit is not subject to variation due to the aging, etc., of multi-electrode tabes, since the diode circuit essentially determines the trigger point.

Russell, J.A.G.

1958-01-01T23:59:59.000Z

39

Small circuits for cryptography.  

SciTech Connect

This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

2005-10-01T23:59:59.000Z

40

Electrical Circuit Tester  

DOE Patents (OSTI)

An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

Love, Frank (Amarillo, TX)

2006-04-18T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


41

Circuit breaker lockout device  

DOE Patents (OSTI)

An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker. 2 figs.

Kozlowski, L.J.; Shirey, L.A.

1992-11-24T23:59:59.000Z

42

Bioluminescent bioreporter integrated circuit  

DOE Patents (OSTI)

Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)

2000-01-01T23:59:59.000Z

43

Circuit breaker lockout device  

DOE Patents (OSTI)

An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

Kozlowski, Lawrence J. (New Kensington, PA); Shirey, Lawrence A. (North Huntingdon, PA)

1992-01-01T23:59:59.000Z

44

Experiment 2 Meter Circuits  

E-Print Network (OSTI)

1 Experiment 2 Meter Circuits Even in these days of digital circuitry, the d'Arsonval meter to stress a spring. The strain of the spring is read as a deflection of a scale. Most d'Arsonval meter the meter. In this experiment, the basic d'Arsonval meter movement and simple passive circuitry will be used

King, Roger

45

Automatic sweep circuit  

DOE Patents (OSTI)

An automatically sweeping circuit for searching for an evoked response in an output signal in time with respect to a trigger input. Digital counters are used to activate a detector at precise intervals, and monitoring is repeated for statistical accuracy. If the response is not found then a different time window is examined until the signal is found.

Keefe, Donald J. (Lemont, IL)

1980-01-01T23:59:59.000Z

46

Circuit breaker lockout device  

DOE Patents (OSTI)

An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin is installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

Kozlowski, L.J.; Shirey, L.A.

1991-12-31T23:59:59.000Z

47

Short circuit power estimation of static CMOS circuits  

Science Conference Proceedings (OSTI)

This paper presents a simple method to estimate short-circuit power dissipation for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain ...

Seung-Ho Jung; Jong-Humn Baek; Seok-Yoon Kim

2001-01-01T23:59:59.000Z

48

Method for double-sided processing of thin film transistors  

DOE Patents (OSTI)

This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Yuan, Hao-Chih (Madison, WI); Wang, Guogong (Madison, WI); Eriksson, Mark A. (Madison, WI); Evans, Paul G. (Madison, WI); Lagally, Max G. (Madison, WI); Ma, Zhenqiang (Middleton, WI)

2008-04-08T23:59:59.000Z

49

CX-007131: Categorical Exclusion Determination | Department of Energy  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

7131: Categorical Exclusion Determination 7131: Categorical Exclusion Determination CX-007131: Categorical Exclusion Determination Casa Grande-Empire Double Circuit Upgrade and Structure Replacement CX(s) Applied: B1.3 Date: 03/08/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region Western proposes to replace structures and upgrade to a double circuit 230- kilovolt (kV) transmission line on its Casa Grande-Empire 115-kV transmission line, from Thornton Road to its Empire Substation, within Western's existing right-of-way. This will include the rebuild of 13.2 miles of transmission line, replacing the H-frame structures with steel monopole structures with foundations, hardware and insulator replacement and adding a overhead ground-wire over the entire length of the project.

50

CX-007131: Categorical Exclusion Determination | Department of Energy  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

7131: Categorical Exclusion Determination 7131: Categorical Exclusion Determination CX-007131: Categorical Exclusion Determination Casa Grande-Empire Double Circuit Upgrade and Structure Replacement CX(s) Applied: B1.3 Date: 03/08/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region Western proposes to replace structures and upgrade to a double circuit 230- kilovolt (kV) transmission line on its Casa Grande-Empire 115-kV transmission line, from Thornton Road to its Empire Substation, within Western's existing right-of-way. This will include the rebuild of 13.2 miles of transmission line, replacing the H-frame structures with steel monopole structures with foundations, hardware and insulator replacement and adding a overhead ground-wire over the entire length of the project.

51

RECORD OF CATEGORICAL EXCLUSION DETERMINATION  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

upgrading to a upgrading to a double circuit of 3.6 miles of the existing Casa Grande-Empire 11S-kV transmission line located in Pinal County, Arizona RECORD OF CATEGORICAL EXCLUSION DETERMINATION A. Proposed Action: Western proposes to work with Salt River Project on an upgrade to a double circuit on its Casa Grande-Empire 11S-kV transmission line. This project involves the removal of the existing H-frame wooden structures and the installation of new steel monopole structures. This will require auger trucks, bulldozers, bucket trucks and cranes. Existing access roads and the existing right-of-way will be used for vehicles such as pickup trucks, crew trucks, backhoes and bucket trucks to bring personnel and equipment to the work areas. The attached map shows the project area situated within Sections 19, 30 & 31 of

52

CX-004876: Categorical Exclusion Determination | Department of Energy  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

4876: Categorical Exclusion Determination 4876: Categorical Exclusion Determination CX-004876: Categorical Exclusion Determination Casa Grande-Empire (Double Circuit Upgrade) CX(s) Applied: B4.13 Date: 09/15/2010 Location(s): Pinal County, Arizona Office(s): Bonneville Power Administration Western proposes to work with Salt River Project on an upgrade to a double circuit on its Casa Grande-Empire 115 kilowatt transmission line. This project involves the removal of the existing H-frame wooden structures and the installation of new steel monopole structures. This will require auger trucks, bulldozers, bucket trucks and cranes. Existing access roads and the existing right-of-way will be used for vehicles such as pickup trucks, crew trucks, backhoes and bucket trucks to bring personnel and equipment to the

53

Methods of fabricating applique circuits  

DOE Patents (OSTI)

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Dimos, Duane B. (Albuquerque, NM); Garino, Terry J. (Albuquerque, NM)

1999-09-14T23:59:59.000Z

54

GAS PHOTOTUBE CIRCUIT  

DOE Patents (OSTI)

This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

Richardson, J.H.

1958-03-01T23:59:59.000Z

55

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs  

Science Conference Proceedings (OSTI)

This paper presents a set of circuit design approaches to achieve clocked standard logic cell functions with ambipolar double-gate devices such as the Double Gate Carbon Nanotube FET (DG-CNTFET). The cells presented in this work use the infield controllability ... Keywords: CNTFETs, advanced technologies, ambipolar double-gate devices, dynamic logic, standard cells

K. Jabeur; D. Navarro; I. O'Connor; P. E. Gaillardon; M. H. Ben Jamaa; F. Clermidy

2010-06-01T23:59:59.000Z

56

Sequential circuit design for radiation hardened multiple voltage integrated circuits  

DOE Patents (OSTI)

The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

Clark, Lawrence T. (Phoenix, AZ); McIver, III, John K. (Albuquerque, NM)

2009-11-24T23:59:59.000Z

57

Jitter compensation circuit  

DOE Patents (OSTI)

The instantaneous V.sub.co signal on a charging capacitor is sampled and the charge voltage on capacitor C.sub.o is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V.sub. co signal is split between a gain stage (G=0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V.sub.co signal is applied to the negative input of a differential amplifier gain stage (G=10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V.sub.co signal from the instantaneous value of sampled V.sub.co signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V.sub.co values squared divided by the total volt-second product of the magnetic compression circuit.

Sullivan, James S. (Livermore, CA); Ball, Don G. (Livermore, CA)

1997-01-01T23:59:59.000Z

58

Jitter compensation circuit  

DOE Patents (OSTI)

The instantaneous V{sub co} signal on a charging capacitor is sampled and the charge voltage on capacitor C{sub o} is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V{sub co} signal is split between a gain stage (G = 0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V{sub co} signal is applied to the negative input of a differential amplifier gain stage (G = 10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V{sub co} signal from the instantaneous value of sampled V{sub co} signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V{sub co} values squared divided by the total volt-second product of the magnetic compression circuit. 11 figs.

Sullivan, J.S.; Ball, D.G.

1997-09-09T23:59:59.000Z

59

Spike Neuromorphic Carbon Nanotube Circuits  

E-Print Network (OSTI)

plasticity Power consumption per device/circuit Scalabiiltydevice with low power consumption (nW/device), 2) to build athe learning. Fourth, power consumption per device should be

Kim, Kyunghyun

2013-01-01T23:59:59.000Z

60

PRECISION TIME-DELAY CIRCUIT  

DOE Patents (OSTI)

A tine-delay circuit which produces a delay time in d. The circuit a capacitor, an te back resistance, connected serially with the anode of the diode going to ground. At the start of the time delay a negative stepfunction is applied to the series circuit and initiates a half-cycle transient oscillatory voltage terminated by a transient oscillatory voltage of substantially higher frequency. The output of the delay circuit is taken at the junction of the inductor and diode where a sudden voltage rise appears after the initiation of the higher frequency transient oscillations.

Creveling, R.

1959-03-17T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


61

Efficient circuit partitioning to extend cycle simulation beyond synchronous circuits  

Science Conference Proceedings (OSTI)

Cycle simulation techniques, such as levelized compiled code, can ordinarily be applied only to synchronous designs. They usually cannot be applied to designs containing circuit features like combinational paths, multiple clock domains, generated clocks, ... Keywords: logic simulation, cycle simulation, circuit partitioning, levelized compiled code

Charles J. DeVane

1997-11-01T23:59:59.000Z

62

ELECTRONIC INTEGRATING CIRCUIT  

DOE Patents (OSTI)

An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

Englemann, R.H.

1963-08-20T23:59:59.000Z

63

Photoconductive circuit element reflectometer  

DOE Patents (OSTI)

A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

Rauscher, Christen (Alexandria, VA)

1990-01-01T23:59:59.000Z

64

Linear Circuits Designation: Required course  

E-Print Network (OSTI)

circuits. Node and mesh analysis. Operational amplifiers. Signal acquisition and conditioning. Electric, 11k). Objective 4: To acquaint students with the rudiments of electrical-to-mechanical energy) Steady-state and dynamic behavior of linear, lumped-parameter electrical circuits. Kirchoff's laws. RLC

Krstic, Miroslav

65

Online circuit breaker monitoring system  

E-Print Network (OSTI)

Circuit breakers are used in a power system to break or make current flow through power system apparatus. Reliable operation of circuit breakers is very important to the well-being of the power system. Historically this is achieved by regular inspection and maintenance of the circuit breakers. An automated online circuit breaker monitoring system is proposed to monitor condition, operation and status of high and medium voltage circuit breakers. By tracking equipment condition, this system could be used to perform maintenance only when it is needed. This could decrease overall maintenance cost and increase equipment reliability. Using high accurate time synchronization, this system should enable development of system-wide applications that utilize the data recorded by the system. This makes possible tracking sequence of events and making conclusions about their effect on-line. This solution also enables reliable topology analysis, which can be used to improve power flow analysis, state estimation and alarm processing.

Djekic, Zarko

2007-12-01T23:59:59.000Z

66

Resonant Tunneling Device Logic Circuits  

E-Print Network (OSTI)

This report is a summary of the activities in the field of resonant tunneling device circuit design. The presented work has been performed by the Department of Microelectronics of the University of Dortmund (UNIDO) and the Solid-State Electronics Department of the Gerhard-Mercator University of Duisburg (GMUD) during the first year of the Microelectronics Advanced Research Initiative projects ANSWERS (Autonomous Nanoelectronic Systems with Extended Replication and Signalling) and LOCOM (Logic Circuits with Reduced Complexity based on Devices with Higher Functionality). As part of the ANSWERS work-package the principal task of UNIDO is to investigate novel logic circuit architectures for resonant tunneling devices, to perform circuit simulations, and to specify the electrical device parameters. The basic device configuration is a monolithically integrated resonant tunneling diode heterostructure field-effect transistor (RTD-HFET). This device and the demonstrator circuits are fabricated by the LOCOM partner GMUD.

Christian Pacha; Peter Glösekötter; Karl Goser; Werner Prost; Uwe Auer; Franz-J. Tegude

1999-01-01T23:59:59.000Z

67

Overpulse railgun energy recovery circuit  

DOE Patents (OSTI)

The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

Honig, E.M.

1984-09-28T23:59:59.000Z

68

Counterpulse railgun energy recovery circuit  

DOE Patents (OSTI)

The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

Honig, E.M.

1984-09-28T23:59:59.000Z

69

Electronic circuit for measuring series connected ...  

An electronic circuit for measuring voltage signals in an energy storage device is disclosed. The electronic circuit includes a plurality of energy storage cells ...

70

Global Circuit Model with Clouds  

Science Conference Proceedings (OSTI)

Cloud data from the International Satellite Cloud Climatology Project (ISCCP) database have been introduced into the global circuit model developed by Tinsley and Zhou. Using the cloud-top pressure data and cloud type information, the authors ...

Limin Zhou; Brian A. Tinsley

2010-04-01T23:59:59.000Z

71

Battery charging and testing circuit  

SciTech Connect

A constant current battery charging circuit is provided by which the battery receives a full charge until the battery voltage reaches a threshold. When the battery voltage is above the threshold, the battery receives a trickle charge. The actual battery voltage is compared with a reference voltage to determine whether the full charge circuit should be in operation. Hysteresis is provided for preventing a rapid on/off operation around the threshold. The reference voltage is compensated for temperature variations. The hysteresis system and temperature compensation system are independent of each other. A separate test circuit is provided for testing the battery voltage. During testing of the battery, the full charge circuit is inoperative.

Wicnienski, M. F.; Charles, D. E.

1984-01-17T23:59:59.000Z

72

Reverse engineering of integrated circuits  

DOE Patents (OSTI)

Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

Chisholm, Gregory H. (Shorewood, IL); Eckmann, Steven T. (Colorado Springs, CO); Lain, Christopher M. (Pittsburgh, PA); Veroff, Robert L. (Albuquerque, NM)

2003-01-01T23:59:59.000Z

73

Double Crystal Analyzer System  

Science Conference Proceedings (OSTI)

... 2002 Page 2. Bloomberg Center for Physics & Astronomy • Johns Hopkins University • Baltimore • Maryland MACS Double ...

2002-02-25T23:59:59.000Z

74

Faster Quantum Number Factoring via Circuit Synthesis  

E-Print Network (OSTI)

A major obstacle to implementing Shor's quantum number-factoring algorithm is the large size of modular-exponentiation circuits. We reduce this bottleneck by customizing reversible circuits for modular multiplication to individual runs of Shor's algorithm. Our circuit-synthesis procedure exploits spectral properties of multiplication operators and constructs optimized circuits from the traces of the execution of an appropriate GCD algorithm. Empirically, gate counts are reduced by 4-5 times, and circuit latency is reduced by larger factors.

Igor L. Markov; Mehdi Saeedi

2013-01-15T23:59:59.000Z

75

Arizona RECORD OF CATEGORICAL EXCLUSION DETERMINATION  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

and structure replacement and structure replacement along the existing Casa Grande-Empire 11~-kV transmission line, Pinal County, Arizona RECORD OF CATEGORICAL EXCLUSION DETERMINATION A. Proposed Action: Western proposes to replace structures and upgrade to a double circuit 230-kV transmission line on its Casa Grande-Empire115-kV transmission line, from Thornton Road to its Empire Substation, within Western's existing right-of-way. This will include the rebuild of 13.2 miles of transmission line, replacing the H-frame structures with steel monopole structures with foundations, hardware and insulator replacement and adding a overhead ground-wire over the entire length of the project. Western will access the structure using crew trucks along the existing access roads. This work is necessary to maintain the safety and reliability of the bulk

76

Circuit breaker lock out assembly  

DOE Patents (OSTI)

A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly S shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

Gordy, W.T.

1983-05-18T23:59:59.000Z

77

Circuit breaker lock out assembly  

Science Conference Proceedings (OSTI)

A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly "S" shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

Gordy, Wade T. (Jackson, SC)

1984-01-01T23:59:59.000Z

78

Sensor/source electrometer circuit  

DOE Patents (OSTI)

A multiple decade electrometer circuit is claimed which can measure low input currents or act as a current source and is comprised of a microprocessor controlled digital to analog converters to derive individual decades. A plurality of decades are created by multiple D-A voltage sources which generate electrometer currents through scaled resistors. After a first series of decades of current are successively produced, the converters are 10 cycled to generate current through new resistors scaled to produce another series decades of current. In this manner, the electrometer circuit generates or senses a plurality of decades of current without significant scale change.

Hughes, W.J.

1991-12-31T23:59:59.000Z

79

Battery charger polarity circuit control  

SciTech Connect

A normally open polarity sensing circuit is interposed between the charging current output of a battery charger and battery terminal clamps connected with a rechargeable storage battery. Normally open reed switches, closed by battery positive terminal potential, gates silicon controlled recitifiers for battery charging current flow according to the polarity of the battery.

Santilli, R.R.

1982-11-30T23:59:59.000Z

80

Wavelet based analysis of circuit breaker operation  

E-Print Network (OSTI)

Circuit breaker is an important interrupting device in power system network. It usually has a lifetime about 20 to 40 years. During breaker's service time, maintenance and inspection are imperative duties to achieve its reliable operation. To automate the diagnostic practice for circuit breaker operation and reduce the utility company's workload, Wavelet based analysis software of circuit breaker operation is developed here. Combined with circuit breaker monitoring system, the analysis software processes the original circuit breaker information, speeds up the analysis time and provides stable and consistent evaluation for the circuit breaker operation.

Ren, Zhifang Jennifer

2006-05-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


81

Vertical Circuits Inc | Open Energy Information  

Open Energy Info (EERE)

Circuits Inc Circuits Inc Jump to: navigation, search Name Vertical Circuits, Inc. Place Scotts Valley, California Zip 95066 Sector Services Product Vertical Circuits Inc. is a global supplier of advanced die level vertical interconnect packaging technology, products, services and intellectual property for the manufacture of low cost ultra high-speed/high-density semiconductor components. References Vertical Circuits, Inc.[1] LinkedIn Connections CrunchBase Profile No CrunchBase profile. Create one now! This article is a stub. You can help OpenEI by expanding it. Vertical Circuits, Inc. is a company located in Scotts Valley, California . References ↑ "Vertical Circuits, Inc." Retrieved from "http://en.openei.org/w/index.php?title=Vertical_Circuits_Inc&oldid=352802"

82

Post regulation circuit with energy storage  

DOE Patents (OSTI)

A charge regulation circuit provides regulation of an unregulated voltage supply and provides energy storage. The charge regulation circuit according to the present invention provides energy storage without unnecessary dissipation of energy through a resistor as in prior art approaches.

Ball, Don G. (Livermore, CA); Birx, Daniel L. (Oakley, CA); Cook, Edward G. (Livermore, CA)

1992-01-01T23:59:59.000Z

83

Quantum Circuit Simulation, 1st edition  

Science Conference Proceedings (OSTI)

Quantum Circuit Simulation covers the fundamentals of linear algebra and introduces basic concepts of quantum physics needed to understand quantum circuits and algorithms. It requires only basic familiarity with algebra, graph algorithms and computer ...

George F. Viamontes; Igor L. Markov; John P. Hayes

2009-12-01T23:59:59.000Z

84

Dual-circuit segmented rail phased induction motor - Energy ...  

An improved linear motor utilizes two circuits, rather that one circuit and an opposed plate, to gain efficiency. The powered circuit is a flat conductive coil. The ...

85

ENHANCEMENT OF ORGANIC PHOTOVOLTAIC CELL OPEN CIRCUIT ...  

enhancement of organic photovoltaic cell open circuit voltage using electron/hole blocking exciton blocking layers united states patent application

86

NPTEL Syllabus Basic Electrical Circuits -Video course  

E-Print Network (OSTI)

with an introduction to basic linear elements used in electrical circuits. Mesh and node analysis for systematic and energy in circuits will be discussed. Rudiments of three-phase circuits and their analysis; Energy in a mutual inductor and constraint on mutual inductance 5 Nodal analysis of a network

Krishnapura, Nagendra

87

Ionization tube simmer current circuit  

DOE Patents (OSTI)

A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

Steinkraus, Jr., Robert F. (Livermore, CA)

1994-01-01T23:59:59.000Z

88

Ionization tube simmer current circuit  

DOE Patents (OSTI)

A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current. 6 figures.

Steinkraus, R.F. Jr.

1994-12-13T23:59:59.000Z

89

Condition responsive battery charging circuit  

SciTech Connect

A battery charging circuit includes a ferroresonant transformer having a rectified output for providing a constant output voltage to be supplied to a battery to be charged. Battery temperature is sensed providing an input to a control circuit which operates a shunt regulator associated with the ferroresonant transformer to provide battery charge voltage as a function of battery temperature. In response to a high battery temperature the controller functions to lower the output voltage to the battery, and in response to a low battery temperature, operates to provide a higher output voltage, with suitable control for any battery temperature between minus 10* and plus 150* fahrenheit. As the battery approaches full charge and battery acceptance current falls below a predetermined level, a charge cycle termination control allows charging to continue for a period preset by the operator, at the end of which period, line voltage is removed from the charger thereby terminating the charge cycle.

Reidenbach, S.G.

1980-06-24T23:59:59.000Z

90

Delta connected resonant snubber circuit  

SciTech Connect

A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter.

Lai, Jih-Sheng (Knoxville, TN); Peng, Fang Zheng (Oak Ridge, TN); Young, Sr., Robert W. (Oak Ridge, TN); Ott, Jr., George W. (Knoxville, TN)

1998-01-01T23:59:59.000Z

91

Delta connected resonant snubber circuit  

DOE Patents (OSTI)

A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

1998-01-20T23:59:59.000Z

92

Control circuit for combustion systems  

SciTech Connect

A control circuit is described for gas fired burners and the like such as are employed in commercial laundry fabric ironers requiring the energization of a blower motor and the resulting opening of a gas valve and ignition of a gas burner only after an air pressure sensitive switch is actuated through the operation of the blower motor for purging the system of combustible gases.

Kamberg, E.

1981-11-10T23:59:59.000Z

93

Counterpulse railgun energy recovery circuit  

SciTech Connect

In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

Honig, Emanuel M. (Los Alamos, NM)

1986-01-01T23:59:59.000Z

94

Electrical circuit for data reduction  

DOE Patents (OSTI)

This invention is comprised of an electrical circuit for determining characteristic voltages, such as maximum, minimum, average and root mean squared voltages, of a time-varying electrical signal. The circuit comprises a positive and a negative peak detector that feed the positive and negative voltage peaks detected in each of a series of time intervals into a solid-state multiplexer controlled by a process controller. The time intervals are generated by the process controller in combination with a clocking, circuit. The multiplexer applies the positive and negative peak voltages to a set of four capacitors, apply the positive peak to one capacitor during one interval and then the negative peak to that capacitor in a subsequent interval so that each capacitor is alternatingly accumulating a positive peak then a negative peak to obviate the need for resetting each capacitor. After the positive peak voltage is applied to one capacitor, the connection is switched during the next interval for reading the negative peak voltage, then switched again for applying, a negative peak voltage, then switched once more for reading the negative peak voltage, the multiplexer serving, as a solid state commutator for switching the electrical connection. Alternatively, peak maximum and minimum voltage detectors may be replaced with circuitry designed to obtain the additional characteristic voltages desired in each interval.

Kronberg, J.W.

1991-12-31T23:59:59.000Z

95

CONTROL AND FAULT DETECTOR CIRCUIT  

DOE Patents (OSTI)

A power control and fault detectcr circuit for a radiofrequency system is described. The operation of the circuit controls the power output of a radio- frequency power supply to automatically start the flow of energizing power to the radio-frequency power supply and to gradually increase the power to a predetermined level which is below the point where destruction occurs upon the happening of a fault. If the radio-frequency power supply output fails to increase during such period, the control does not further increase the power. On the other hand, if the output of the radio-frequency power supply properly increases, then the control continues to increase the power to a maximum value. After the maximumn value of radio-frequency output has been achieved. the control is responsive to a ''fault,'' such as a short circuit in the radio-frequency system being driven, so that the flow of power is interrupted for an interval before the cycle is repeated.

Winningstad, C.N.

1958-04-01T23:59:59.000Z

96

Method of determining the open circuit voltage of a battery in a closed circuit  

SciTech Connect

The open circuit voltage of a battery which is connected in a closed circuit is determined without breaking the circuit or causing voltage upsets therein. The closed circuit voltage across the battery and the current flowing through it are determined under normal load and then a fractional change is made in the load and the new current and voltage values determined. The open circuit voltage is then calculated, according to known principles, from the two sets of values.

Brown, William E. (Walnut Creek, CA)

1980-01-01T23:59:59.000Z

97

Definition: Automated Distribution Circuit Switches | Open Energy  

Open Energy Info (EERE)

Circuit Switches Circuit Switches Jump to: navigation, search Dictionary.png Automated Distribution Circuit Switches Distribution circuit switches that can be operated automatically in response to control signals from local sensors, distribution automation systems, or grid control systems. Such switches can be installed as automated devices or existing equipment can be retrofitted with controls and communications. The degree of automation depends on the controls and communications system implemented. These switches can be opened or closed to isolate portions of a distribution circuit that has experienced a short circuit (fault), or must be taken out of service for maintenance or other operations. When used in combination, these switches can reroute power from other substations or nearby distribution circuits.[1]

98

Categorical Exclusion Determinations: Western Area Power  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

May 2, 2011 May 2, 2011 CX-007145: Categorical Exclusion Determination Empire-Electrical District 5 Double Circuit Upgrade Amendment CX(s) Applied: B1.3 Date: 05/02/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region April 28, 2011 CX-007144: Categorical Exclusion Determination Empire-Electrical District 5 Double Circuit Upgrade Amendment CX(s) Applied: B1.3 Date: 04/28/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region April 28, 2011 CX-007132: Categorical Exclusion Determination Casa Grande-Empire Double Circuit Upgrade Amendment CX(s) Applied: B4.13 Date: 04/28/2011 Location(s): Pinal County, Arizona Office(s): Western Area Power Administration-Desert Southwest Region

99

Printed circuit dispersive transmission line  

DOE Patents (OSTI)

A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other. 5 figures.

Ikezi, H.; Lin-Liu, Y.R.; DeGrassie, J.S.

1991-08-27T23:59:59.000Z

100

Printed circuit dispersive transmission line  

DOE Patents (OSTI)

A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

Ikezi, Hiroyuki (Rancho Santa Fe, CA); Lin-Liu, Yuh-Ren (San Diego, CA); DeGrassie, John S. (Encinitas, CA)

1991-01-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


101

Printed circuit dispersive transmission line  

DOE Patents (OSTI)

A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission lines between two adjacent periodic intersections to be longer than the other. 5 figs.

Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; deGrassie, J.S.

1990-03-02T23:59:59.000Z

102

Multiplexer and time duration measuring circuit  

DOE Patents (OSTI)

A multiplexer device is provided for multiplexing data in the form of randomly developed, variable width pulses from a plurality of pulse sources to a master storage. The device includes a first multiplexer unit which includes a plurality of input circuits each coupled to one of the pulse sources, with all input circuits being disabled when one input circuit receives an input pulse so that only one input pulse is multiplexed by the multiplexer unit at any one time.

Gray, Jr., James (Downers Grove, IL)

1980-01-01T23:59:59.000Z

103

Green Circuits: Distribution Efficiency Case Studies  

Science Conference Proceedings (OSTI)

The Electric Power Research Institute (EPRI) Green Circuits project was a collaborative effort of 22 utilities. The main goal of the project was to evaluate ways to improve distribution efficiency. Modeling, economic evaluations, and field trials formed the core of the research effort. To evaluate efficiency improvements, 66 circuit case studies were modeled and fine-tuned, based on field data. Field trials of voltage optimization were implemented on nine circuits. Detailed advanced metering infrastructu...

2011-10-14T23:59:59.000Z

104

Asynchronous logic circuits and sheaf obstructions  

E-Print Network (OSTI)

This article exhibits a particular encoding of logic circuits into a sheaf formalism. The central result of this article is that there exists strictly more information available to a circuit designer in this setting than exists in static truth tables, but less than exists in event-level simulation. This information is related to the timing behavior of the logic circuits, and thereby provides a ``bridge'' between static logic analysis and detailed simulation.

Robinson, Michael

2010-01-01T23:59:59.000Z

105

Monitoring transients in low inductance circuits  

DOE Patents (OSTI)

The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.

Guilford, R.P.; Rosborough, J.R.

1985-10-21T23:59:59.000Z

106

Sequential Circuit Testing: From DFT to SFT  

Science Conference Proceedings (OSTI)

Sequential circuit testing is an active research area due to its applicability, its practicality, and its complexity. This paper gives an overview of the sequential automatic test pattern generation approaches and the classical and more recent design-for-testability ... Keywords: logic testing, sequential circuit testing, DFT techniques, automatic test pattern generation, design-for-testability methods, synthesis-for-testability, SFT techniques, large sequential circuits, ATPG

R. M. Chou; K. K. Saluja

1997-01-01T23:59:59.000Z

107

NIST Electromechanical Circuit Sets Record Beating ...  

Science Conference Proceedings (OSTI)

... NIST scientists plan to combine the new circuit ... its "ground state," or lowest-energy state ... could be manipulated for the applications mentioned above. ...

2011-10-14T23:59:59.000Z

108

Optimising Circuit Design for Gravity Gold Recovery  

Science Conference Proceedings (OSTI)

Abstract Scope, To determine the optimal circuit configuration for gravity gold recovery ... Energy Management Planning, Following the ISO 50001 Draft Standard.

109

Enhancing Open Circuit Voltage by Combining Thermoelectric ...  

Science Conference Proceedings (OSTI)

Enhancing Open Circuit Voltage by Combining Thermoelectric Materials and Dye -Sensitized Solar Cell in Series · Estimation of Compressive Strength of High ...

110

Circuit breaker monitoring application using wireless communication  

E-Print Network (OSTI)

Circuit breakers are used in the power system to break or make current flow through power apparatus. Reliable operation of circuit breakers is critical to the well- being of the power system and can be achieved by regular inspection and maintenance. A low-cost automated circuit breaker monitoring system is developed to monitor circuit breaker control signals. An interface is designed on top of which different local and system-wide applications can be developed which utilize the data recorded by the system. Some of the possible applications are proposed. Lab and field evaluation of the designed system is performed and results are presented.

Ved, Nitin

2005-12-01T23:59:59.000Z

111

Conceptual design of a versatile radiation tolerant integrated signal conditioning circuit for resistive sensors  

Science Conference Proceedings (OSTI)

This paper presents the design of a radiation tolerant configurable discrete time CMOS signal conditioning circuit for use with resistive sensors like strain gauge pressure sensors. The circuit is intended to be used for remote handling in harsh environments in the International Thermonuclear Experimental fusion Reactor (ITER). The design features a 5 V differential preamplifier using a Correlated Double Sampling (CDS) architecture at a sample rate of 20 kHz and a 24 V discrete time post amplifier. The gain is digitally controllable between 27 and 400 in the preamplifier and between 1 and 8 in the post amplifier. The nominal input referred noise voltage is only 8.5 {mu}V while consuming only 1 mW. The circuit has a simulated radiation tolerance of more than 1 MGy. (authors)

Leroux, P. [Katholieke Hogeschool Kempen, Kleinhoefstraat 4, B-2440 Geel (Belgium); Katholieke Universiteit Leuven, Dept. ESAT-MICAS, Kasteelpark Arenberg 10, B-3001 Heverlee (Belgium); SCK-CEN, Belgian Nuclear Research Centre, Boeretang 200, B-2400 Mol (Belgium); Sterckx, J. [Katholieke Hogeschool Kempen, Kleinhoefstraat 4, B-2440 Geel (Belgium); Van Uffelen, M.; Damiani, C. [Fusion 4 Energy, Ed. B3, c/Josep, no 2, Torres Diagonal Litoral, 08019 Barcelona (Spain)

2011-07-01T23:59:59.000Z

112

Sequential power-up circuit  

DOE Patents (OSTI)

A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable. 2 figs.

Kronberg, J.W.

1992-06-02T23:59:59.000Z

113

Sequential power-up circuit  

DOE Patents (OSTI)

A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable.

Kronberg, James W. (108 Independent Blvd., Aiken, SC 29801)

1992-01-01T23:59:59.000Z

114

Quantum Interference in Plasmonic Circuits  

E-Print Network (OSTI)

Surface plasmon polaritons (plasmons) are a combination of light and a collective oscillation of the free electron plasma at metal-dielectric interfaces. This interaction allows sub-wavelength confinement of light, beyond the diffraction limit inherent to dielectric structures. The resulting electromagnetic fields are more intense and the strength of optical interactions between metallic structures and light-sources or detectors can be increased. Plasmons maintain non-classical photon statistics and preserve entanglement on plasmon-assisted transmission through thin, patterned metallic films or weakly confining waveguides. For quantum applications it is essential that plasmons behave as indistinguishable quantum particles. Here we report on a quantum interference experiment in a nanoscale plasmonic circuit consisting of an on-chip plasmon beam splitter with integrated superconducting single-photon detectors to allow efficient single plasmon detection. We demonstrate quantum mechanical interaction between pair...

Heeres, Reinier W; Zwiller, Valery

2013-01-01T23:59:59.000Z

115

Quantum transducer in circuit optomechanics  

E-Print Network (OSTI)

Mechanical resonators are macroscopic quantum objects with great potential. They couple to many different quantum systems such as spins, optical photons, cold atoms, and Bose Einstein condensates. It is however difficult to measure and manipulate the phonon state due to the tiny motion in the quantum regime. On the other hand, microwave resonators are powerful quantum devices since arbitrary photon state can be synthesized and measured with a quantum tomography. We show that a linear coupling, strong and controlled with a gate voltage, between the mechanical and the microwave resonators enables to create quantum phonon states, manipulate hybrid entanglement between phonons and photons and generate entanglement between two mechanical oscillators. In circuit quantum optomechanics, the mechanical resonator acts as a quantum transducer between an auxiliary quantum system and the microwave resonator, which is used as a quantum bus.

Didier, Nicolas; Blanter, Yaroslav M; Fazio, Rosario

2012-01-01T23:59:59.000Z

116

Quantifying Dynamic Stability of Genetic Memory Circuits  

Science Conference Proceedings (OSTI)

Bistability/Multistability has been found in many biological systems including genetic memory circuits. Proper characterization of system stability helps to understand biological functions and has potential applications in fields such as synthetic biology. ... Keywords: Dynamic stability, genetic memory, gene circuit, dynamic noise margin.

Yong Zhang; Peng Li; Garng Huang

2012-05-01T23:59:59.000Z

117

Multistable Circuits for Analog Memories Implementation  

Science Conference Proceedings (OSTI)

In this work two multistable circuits suitable for analog memories implementation will be presented. These circuits have been used to implement completely asynchronous analog memories, one type based on a flash converter and thus having a linear complexity ... Keywords: analog memories, asynchronous converters, successive approximations

Giorgio Biagetti; Massimo Conti; Simone Orcioni

2004-04-01T23:59:59.000Z

118

A Mixed Heuristic for Circuit Partitioning  

Science Conference Proceedings (OSTI)

As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimization and simulation, HDL-based synthesis, etc. is currently a field of ... Keywords: Tabu Search, circuit partitioning, optimisation, parallel test pattern generation, simulated annealing

C. Gil; J. Ortega; M. G. Montoya; R. Baños

2002-12-01T23:59:59.000Z

119

Experimentally driven verification of synthetic biological circuits  

Science Conference Proceedings (OSTI)

We present a framework that allows us to construct and formally analyze the behavior of synthetic gene circuits from specifications in a high level language used in describing electronic circuits. Our back-end synthesis tool automatically generates genetic-regulatory ...

Boyan Yordanov; Evan Appleton; Rishi Ganguly; Ebru Aydin Gol; Swati Banerjee Carr; Swapnil Bhatia; Traci Haddock; Calin Belta; Douglas Densmore

2012-03-01T23:59:59.000Z

120

Tunable Coulomb blockade and giant Coulomb blockade magnetoresistance in a double quantum dot array  

Science Conference Proceedings (OSTI)

We propose a Hubbard model to illuminate the tunneling effect of electrons in a double quantum dot array connected in the parallel circuit configuration to electrodes. The change in the interdot coupling is shown to dramatically influence the Coulomb blockade properties, consistent with earlier experimental observations. For magnetic double dots, the interdot coupling can be tuned by the external magnetic field, leading to a giant Coulomb blockade magnetoresistance.

Zhang, Xiaoguang [ORNL; Xiang, T. [Chinese Academy of Sciences

2011-01-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


121

High performance low power CMOS dynamic logic for arithmetic circuits  

Science Conference Proceedings (OSTI)

This paper presents the design of high performance and low power arithmetic circuits using a new CMOS dynamic logic family, and analyzes its sensitivity against technology parameters for practical applications. The proposed dynamic logic family allows ... Keywords: CMOS digital integrated circuits, CMOS logic circuits, Dynamic logic, High speed arithmetic circuits, Low power arithmetic circuits

Victor Navarro-Botello; Juan A. Montiel-Nelson; Saeid Nooshabadi

2007-04-01T23:59:59.000Z

122

Reusable vibration resistant integrated circuit mounting socket  

DOE Patents (OSTI)

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

Evans, Craig N. (Irwin, PA)

1995-01-01T23:59:59.000Z

123

Double Degenerate Binary Systems  

Science Conference Proceedings (OSTI)

In this study, angular momentum loss via gravitational radiation in double degenerate binary (DDB)systems (NS + NS, NS + WD, WD + WD, and AM CVn) is studied. Energy loss by gravitational waves has been estimated for each type of systems.

Yakut, K. [University of Ege, Department of Astronomy and Space Sciences, 35100-Izmir (Turkey)

2011-09-21T23:59:59.000Z

124

Entropy of Chaotic Oscillations of Currents in the Chua Circuit and its HMM Analysis  

E-Print Network (OSTI)

We study entropy of chaotic oscillation of electrical currents in the Chua's circuit controlled by triggering a pulse that brings the orbit that goes onto an unstable branch back to a stable branch. A numerical simulation of the voltage of the two capacitors and the current that flows on an inductor of the Chua's circuit reveals various oscillation patterns as the conductance that is connected between the two capacitors and directly connected to an inductor is varied. At small conductance, the Lissajous graph of the voltage of the two capacitors shows a spiral, while at high conductance a double scroll pattern appears. The entropy of the current that flows on the inductor is alocal minimum in the spiral state which is in the steady state, while it is maximum in the stable double scroll state. The stable double scroll samples are analyzed by using the Hidden Markov Model (HMM) and the eigenvectors of the transition matrix of long time series are found to be strictly positive but those of unstable short time series have negative components. We thus confirm maximum entropy production in the double scroll of the longest time series around the right fixed point, while the local minimum entropy production occurs in the spiral around the left fixed point.

Sadataka Furui

2010-03-03T23:59:59.000Z

125

Overload protection circuit for output driver  

DOE Patents (OSTI)

A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.

Stewart, Roger G. (Neshanic Station, NJ)

1982-05-11T23:59:59.000Z

126

Definition: Circuit Peak Load Management | Open Energy Information  

Open Energy Info (EERE)

Circuit Peak Load Management Jump to: navigation, search Dictionary.png Circuit Peak Load Management An application utilizing sensors, information processors, communications, and...

127

Generating Circuit Tests by Exploiting Designed Behavior  

E-Print Network (OSTI)

This thesis describes two programs for generating tests for digital circuits that exploit several kinds of expert knowledge not used by previous approaches. First, many test generation problems can be solved efficiently ...

Shirley, Mark Harper

1988-12-01T23:59:59.000Z

128

Low Power Oriented CMOS Circuit Optimization Protocol  

Science Conference Proceedings (OSTI)

Low power oriented circuit optimization consists in selecting the best alternative between gate sizing, buffer insertion and logic structure transformation, for satisfying a delay constraint at minimum area cost. In this paper we used a closed form model ...

A. Verle; X. Michel; N. Azemard; P. Maurine; D. Auvergne

2005-03-01T23:59:59.000Z

129

Energy Extraction for the LHC Superconducting Circuits  

E-Print Network (OSTI)

The superconducting magnets of the LHC will be powered in about 1700 electrical circuits. The energy stored in circuits, up to 1.3 GJ, can potentially cause severe damage of magnets, bus bars and current leads. In order to protect the superconducting elements after a resistive transition, the energy is dissipated into a dump resistor installed in series with the magnet chain that is switched into the circuit by opening current breakers. Experiments and simulation studies have been performed to identify the LHC circuits that need energy extraction. The required values of the extraction resistors have been computed. The outcome of the experimental results and the simulation studies are presented and the design of the different energy extraction systems that operate at 600 A and at 13 kA is described.

Dahlerup-Petersen, K; Schmidt, R; Sonnemann, F

2001-01-01T23:59:59.000Z

130

The Challenge of Testing RFID Integrated Circuits  

Science Conference Proceedings (OSTI)

RFID integrated circuits often involve many of themost leading edge production technologies availabletoday. The complexities involved with integrating thesecomplexities into the backend and test environment areexceptionally challenging. To date, this ...

David Murfett

2004-01-01T23:59:59.000Z

131

Conformance and mirroring for timed asychronous circuits  

Science Conference Proceedings (OSTI)

Conformance has been used as a correctness criterion for asynchronous circuits. In the case of untimed systems, conformance of an implementation to a specification is equivalent to the failure-freeness between the implementation and the mirror of the ...

Bin Zhou; Tomohiro Yoneda; Bernd-Holger Schlingloff

2001-01-01T23:59:59.000Z

132

Quantum computation beyond the circuit model  

E-Print Network (OSTI)

The quantum circuit model is the most widely used model of quantum computation. It provides both a framework for formulating quantum algorithms and an architecture for the physical construction of quantum computers. However, ...

Jordan, Stephen Paul

2008-01-01T23:59:59.000Z

133

Carbon nanotube synthesis for integrated circuit interconnects  

E-Print Network (OSTI)

Based on their properties, carbon nanotubes (CNTs) have been identified as ideal replacements for copper interconnects in integrated circuits given their higher current density, inertness, and higher resistance to ...

Nessim, Gilbert Daniel

2009-01-01T23:59:59.000Z

134

Symbolic Analysis of Nonlinear Analog Circuits  

Science Conference Proceedings (OSTI)

A new method is presented to model symbolically strongly nonlinear circuits, characterized by Piece-Wise Linear (PWL) functions. The method follows the idea of Bokhoven and Leenaerts, and formulates the problem as a linear complementarity problem (LCP). ...

Alicia Manthe; Zhao Li; C.-J. Richard Shi; Kartikeya Mayaram

2003-03-01T23:59:59.000Z

135

Dynamical Systems in Circuit Designer's Eyes  

SciTech Connect

Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)

Odyniec, M.

2011-05-09T23:59:59.000Z

136

Industry-Wide Database: Circuit Breakers  

Science Conference Proceedings (OSTI)

Best practice maintenance and asset management decisions are based on risks associated with actual equipment condition and performance. However, little effort has been made to systematically collect and analyze such industry information for high-voltage circuit breakers. This document presents the results of the initial effort of the Electric Power Research Institute (EPRI) to explore the development of an industry-wide database (IDB) for high-voltage circuit breakers (HVCBs). The project identified ...

2012-12-12T23:59:59.000Z

137

Electrochemically controlled charging circuit for storage batteries  

DOE Patents (OSTI)

An electrochemically controlled charging circuit for charging storage batteries is disclosed. The embodiments disclosed utilize dc amplification of battery control current to minimize total energy expended for charging storage batteries to a preset voltage level. The circuits allow for selection of Zener diodes having a wide range of reference voltage levels. Also, the preset voltage level to which the storage batteries are charged can be varied over a wide range.

Onstott, E.I.

1980-06-24T23:59:59.000Z

138

DOUBLE MAJORS Imaging Science + ...  

E-Print Network (OSTI)

DOUBLE MAJORS Imaging Science + ... Applied Mathematics Biomedical Sciences Computer Science Undergraduate Research Internships and Cooperative Education (Co-op) (optional) Study Abroad WHY IMAGING SCIENCE Science: BS, MS, PhD Color Science: MS, PhD BS + MS/PhD Combos HUMAN VISION BIO- MEDICAL ASTRO- PHYSICS

Zanibbi, Richard

139

A matterless double slit  

E-Print Network (OSTI)

Double-slits provide incoming photons with a choice. Those that survive the passage have chosen from two possible paths which interfere to distribute them in a wave-like manner. Such wave-particle duality continues to be challenged and investigated in a broad range of disciplines with electrons, neutrons, helium atoms, C60 fullerenes, Bose-Einstein condensates and biological molecules. All variants have hitherto involved material constituents. We present a matterless double-slit scenario in which photons generated from virtual electron-positron pair annihilation in head-on collisions of a probe laser field with two ultra-intense laser beams form a double-slit interference pattern. Such electromagnetic fields are predicted to induce material-like behaviour in the vacuum, supporting elastic scattering between photons. Our double-slit scenario presents on the one hand a realisable method to observe photon-photon scattering, and demonstrates on the other, the possibility of both controlling light with light and non-locally investigating features of the quantum vacuum's structure.

B. King; A. Di Piazza; C. H. Keitel

2013-01-29T23:59:59.000Z

140

Double-digit growth  

SciTech Connect

The global need for additional generating capacity continues to grow at double digit rates in some cases. Opportunities for partnerships and joint ventures vary considerably by country and region. A closer look is taken at five countries where the playing fields are increasingly tipping to favor outside partners in power development projects -- India, Indonesia, Malaysia, Thailand, and Mexico.

Cartselos, T.; Meade, W.; Hernandez, L.

1993-09-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


141

Triple effect absorption chiller utilizing two refrigeration circuits  

DOE Patents (OSTI)

A triple effect absorption method and apparatus having a high coefficient of performance. Two single effect absorption circuits are combined with heat exchange occurring between a condenser and absorber of a high temperature circuit, and a generator of a low temperature circuit. The evaporators of both the high and low temperature circuits provide cooling to an external heat load.

DeVault, Robert C. (Knoxville, TN)

1988-01-01T23:59:59.000Z

142

Control circuit for automatic battery chargers  

SciTech Connect

An improved battery charger apparatus having a control circuit providing different charging periods which are automatically correlated with the type of battery connected to the charge for charging the connected battery to a preselected full charge state. The apparatus has a charging circuit for charging the battery, a sensing circuit for sensing the state of the battery during charging thereof by the charging circuit and a circuit for determining first and second predetermined reference voltage/current states. The apparatus causes the charging of the battery at a preselected initial charging level for an initial time period and establishes a first finish time period. The apparatus further determines a first time at which the state of the battery reaches the first predetermined referenced voltage/current state during the initial time period, and causes the charging circuit to continue to charge the battery at a preselected first charging level after the determination of the first time for a first finish time period. The apparatus further establishes a second finish time period and determines a second time at which the state of the battery reaches the second predetermined referenced voltage/current state during the first finish time period. The apparatus terminates charging of the battery if the state of the battery does not reach the second predetermined referenced voltage/current state during the first finish time period, and causes the charging circuit to continue to charge the battery at a preselected second charging level after the determination of the second time for a second finish time period.

Lambert, F.J.; Bosack, D.J.; Johansen, D.K.

1984-05-22T23:59:59.000Z

143

Lockout device for high voltage circuit breaker  

Science Conference Proceedings (OSTI)

An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the repsective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

Kozlowski, Lawrence J. (New Kensington, PA); Shirey, Lawrence A. (North Huntingdon, PA)

1993-01-01T23:59:59.000Z

144

Lockout device for high voltage circuit breaker  

DOE Patents (OSTI)

An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the respective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

Kozlowski, L.J.; Shirey, L.A.

1993-01-26T23:59:59.000Z

145

Lookout device for high voltage circuit breaker  

DOE Patents (OSTI)

An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the respective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

Kozlowski, L.J.; Shirey, L.A.

1991-12-31T23:59:59.000Z

146

Dual circuit embossed sheet heat transfer panel  

DOE Patents (OSTI)

A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet. 6 figs.

Morgan, G.D.

1984-02-21T23:59:59.000Z

147

Dual circuit embossed sheet heat transfer panel  

DOE Patents (OSTI)

A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet.

Morgan, Grover D. (St. Louis County, MO)

1984-01-01T23:59:59.000Z

148

Radiation-hardened transistor and integrated circuit  

DOE Patents (OSTI)

A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

Ma, Kwok K. (Albuquerque, NM)

2007-11-20T23:59:59.000Z

149

Package for integrated optic circuit and method  

DOE Patents (OSTI)

A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

Kravitz, Stanley H. (26 Aspen Rd., Placitas, NM 87043); Hadley, G. Ronald (6012 Annapolis NE., Albuquerque, NM 87111); Warren, Mial E. (3825 Mary Ellen NE., Albuquerque, NM 87111); Carson, Richard F. (1036 Jewel Pl. NE., Albuquerque, NM 87123); Armendariz, Marcelino G. (1023 Oro Real NE., Albuquerque, NM 87123)

1998-01-01T23:59:59.000Z

150

Package for integrated optic circuit and method  

DOE Patents (OSTI)

A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

1998-08-04T23:59:59.000Z

151

Quantum Electric Circuits Analogous to Ballistic Conductors  

E-Print Network (OSTI)

The conductance steps in a constricted two-dimensional electron gas and the minimum conductivity in graphene are related to a new uncertainty relation between electric charge and conductance in a quantized electric circuit that mimics the electric transport in mesoscopic systems. This uncertainty relation makes specific use of the discreteness of electric charge. Quantum electric circuits analogous to both constricted two-dimensional electron gas and graphene are introduced. In the latter case a new insight into the origin of minimum conductivity is obtained.

Daniela Dragoman

2007-08-09T23:59:59.000Z

152

Hybrid high direct current circuit interrupter  

DOE Patents (OSTI)

A device and a method for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens.

Rockot, J.H.; Mikesell, H.E.; Jha, K.N.

1996-12-31T23:59:59.000Z

153

Hybrid high direct current circuit interrupter  

DOE Patents (OSTI)

A device and a method are disclosed for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens. 7 figs.

Rockot, J.H.; Mikesell, H.E.; Jha, K.N.

1998-08-11T23:59:59.000Z

154

Triple effect absorption chiller utilizing two refrigeration circuits  

Science Conference Proceedings (OSTI)

This patent describes a heat absorption method for an absorption chiller. It comprises: providing a firs absorption system circuit for operation within a first temperature range, providing a second absorption system circuit for operation within a second temperature range; heat exchanging refrigerant and absorber solution; thermal communication with an external heat load. This patent describes a heat absorption apparatus for use as an absorption chiller. It includes: a first absorption system circuit for operation within a first temperature range; a second absorption system circuit for operation within a second temperature range which has a lower maximum temperature relative to the first temperature range; the first circuit having generator means, condenser means, evaporator means, and absorber means operatively connected together; the second circuit having generator means condenser means, evaporator means, and absorber means operative connected together; and the first circuit condenser means and the first circuit absorber means being in heat exchange communication with the second circuit generator means.

DeVault, R.C.

1988-03-22T23:59:59.000Z

155

Grinding circuit control using programmable logic controllers  

Science Conference Proceedings (OSTI)

This paper presents an application for cement milling system. In this application the process is controlled by software running on Programmable Logic Controllers. The appliance used to observe industrial process show the following mill parameters: feed ... Keywords: PLC programming, ball mill, clinker grinding, grinding circuit, programmable logic controllers

Costea R. Claudiu; Silaghi Helga Maria; Rohde L. Ulrich; Silaghi A. Marius

2011-08-01T23:59:59.000Z

156

Three-dimensional Integrated Circuit Design  

Science Conference Proceedings (OSTI)

With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable ... Keywords: Computer Architecture, Computer Engineering, Computer Science

Vasilis F. Pavlidis; Eby G. Friedman

2008-09-01T23:59:59.000Z

157

Electronic circuit for measuring series connected electrochemical cell voltages  

DOE Patents (OSTI)

An electronic circuit for measuring voltage signals in an energy storage device is disclosed. The electronic circuit includes a plurality of energy storage cells forming the energy storage device. A voltage divider circuit is connected to at least one of the energy storage cells. A current regulating circuit is provided for regulating the current through the voltage divider circuit. A voltage measurement node is associated with the voltage divider circuit for producing a voltage signal which is proportional to the voltage across the energy storage cell.

Ashtiani, Cyrus N. (West Bloomfield, MI); Stuart, Thomas A. (Toledo, OH)

2000-01-01T23:59:59.000Z

158

A method for reducing harmonics in output voltages of a double-connected inverter  

SciTech Connect

A new method for reducing harmonics involved in output voltages of the double-connected inverter is proposed. By adding four auxiliary switching devices and an interphase transformer with secondary winding to the conventional 12-step inverter, output voltages of the proposed circuit can be almost the same waveforms as a conventional 36-step inverter. In this paper, circuit performances and output voltage waveforms are discussed, and the optimum parameters are derived. Then, effects on harmonic reductions can be clarified by theoretical and experimental results, and ratings of system components are investigated.

Masukawa, Shigeo; Iida, Shoji (Tokyo Denki Univ., Tokyo (Japan). Dept. of Electrical Engineering)

1994-09-01T23:59:59.000Z

159

Double domino driver  

DOE Patents (OSTI)

The double domino driver is fully differential and is optimized for low switching noise and power. The noise behavior and power dissipation is improved by limiting the signal swing. The domino driver consists of a combination of mini drivers, each of which is switched on in two steps. In the first step a voltage equal to a fraction of the supply voltage propagates through the chain of mini drivers and turn them partially on. In the second step the voltage is increased to its maximum value and is made to propagate through the chain, turning the mini drivers completely on. The rise and fall time of the output signal can be increased by adding mini drivers. For a 5 volt supply voltage with 5 mini drivers the switching noise in decreased to levels less than 100 micro volts. The power dissipation with this driver is least as compared to ECL and other logic systems. The double domino driver is useful in communication and VLSI systems.

Vanstraelen, G.F.

1992-01-01T23:59:59.000Z

160

Circuit design for embedded memory in low-power integrated circuits  

E-Print Network (OSTI)

This thesis explores the challenges for integrating embedded static random access memory (SRAM) and non-volatile memory-based on ferroelectric capacitor technology-into lowpower integrated circuits. First considered is the ...

Qazi, Masood

2012-01-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


161

Parallel algorithms for inductance extraction of VLSI circuits  

Science Conference Proceedings (OSTI)

Inductance extraction involves estimating the mutual inductance in a VLSI circuit. Due to increasing clock speed and diminishing feature sizes of modern VLSI circuits, the effects of inductance are increasingly felt during the testing and verification ...

Hemant Mahawar; Vivek Sarin

2006-04-01T23:59:59.000Z

162

The sizing rules method for analog integrated circuit design  

Science Conference Proceedings (OSTI)

This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic building blocks for analog CMOS circuits; second, the derivation of ...

H. Graeb; S. Zizala; J. Eckmueller; K. Antreich

2001-11-01T23:59:59.000Z

163

Dual-circuit segmented rail phased induction motor  

DOE Patents (OSTI)

An improved linear motor utilizes two circuits, rather that one circuit and an opposed plate, to gain efficiency. The powered circuit is a flat conductive coil. The opposed segmented rail circuit is either a plurality of similar conductive coils that are shorted, or a plurality of ladders formed of opposed conductive bars connected by a plurality of spaced conductors. In each embodiment, the conductors are preferably cables formed from a plurality of intertwined insulated wires to carry current evenly.

Marder, Barry M. (Albuquerque, NM); Cowan, Jr., Maynard (Albuquerque, NM)

2002-01-01T23:59:59.000Z

164

Designing Crushing and Grinding Circuits for Improved Energy ...  

Science Conference Proceedings (OSTI)

Abstract Scope, Crushing and grinding, or comminution, circuits are the most ... Materialization of Manganese by Selective Precipitation from Used Battery.

165

Field Guide: High-Voltage Circuit Breaker Compressors – 2013 Update  

Science Conference Proceedings (OSTI)

High-voltage circuit breakers (HVCBs) perform essential protection and control functions on power transmission networks. Circuit breaker mechanisms have multiple components that must operate in concert in order for the breaker to perform properly. If one component, such as the air or hydraulic system, does not operate correctly, the circuit breaker may mis-operate or fail. A circuit breaker mis-operation may cause equipment damage and outages—both ...

2013-12-19T23:59:59.000Z

166

Transistor sizing for large combinational digital CMOS circuits  

Science Conference Proceedings (OSTI)

This article describes a new method to determine the device sizes of combinational digital CMOS circuits for an upper limit on the signal propagation delays. By modeling gate delay and area or power consumption of a circuit as a simple analytical function ... Keywords: Transistor sizing, digital combinational CMOS circuits, timing optimization

Lucas S. Heusler; Wolfgang Fichtner

1991-01-01T23:59:59.000Z

167

Analytical Model for the CMOS Short-Circuit Power Dissipation  

Science Conference Proceedings (OSTI)

A significant part of the power dissipation in CMOS digital circuits is due to the short-circuit currents. In this paper an accurate analytical model for the evaluation of the CMOS short-circuit power dissipation, on the basis of a CMOS inverter, is ...

L. Bisdounis; S. Nikolaidis; O. Koufopavlou

1998-04-01T23:59:59.000Z

168

Intelligent Circuit Breaker Forecasting and Prewarning System Research  

Science Conference Proceedings (OSTI)

This paper describes an intelligent circuit breaker software and hardware design, real-time multi-task alarm system will be introduced into circuit breaker monitoring and control, to the timely opening and timely alarm. According to the different impact ... Keywords: Intelligent circuit breaker, forecasting, prewarning

Jiaomin Liu; Li Li; Yaxuan Li; Peng Liu

2008-10-01T23:59:59.000Z

169

A hardware Memetic accelerator for VLSI circuit partitioning  

Science Conference Proceedings (OSTI)

During the last decade, the complexity and size of circuits have been rapidly increasing, placing a stressing demand on industry for faster and more efficient CAD tools for VLSI circuit layout. One major problem is the computational requirements for ... Keywords: Circuit partitioning, FPGA, Genetic algorithms, Handel-C, Hardware accelerator, Memetic algorithms

Stephen Coe; Shawki Areibi; Medhat Moussa

2007-07-01T23:59:59.000Z

170

A Mixed Signal Fuzzy Controller Using Current Mode Circuits  

Science Conference Proceedings (OSTI)

A mixed analog-digital fuzzy logic inference processor chip, designed in a 0.35-?m CMOS technology, is presented. The analog fuzzy engine is based on a novel current-mode CMOS circuit used for the implementation of fuzzy partition membership functions. ... Keywords: current-mode circuits, fuzzy partitioning, inference engine, membership function circuits

Simone Orcioni; Giorgio Biagetti; Massimo Conti

2004-02-01T23:59:59.000Z

171

Automatic stability checking for large linear analog integrated circuits  

Science Conference Proceedings (OSTI)

Stability analysis is one of the key challenges in the design of large linear analog circuits with complex multi-loop structures. In this paper, we present an efficient loop finder algorithm to identify potentially unstable loops in such circuits. At ... Keywords: analog circuit design, eigenvalue problem, model order reduction, small-signal analysis, stability analysis

Parijat Mukherjee; G. Peter Fang; Rod Burt; Peng Li

2011-06-01T23:59:59.000Z

172

Evaluation and Testing of ABB Circuit Breakers with Mobilgrease 28  

Science Conference Proceedings (OSTI)

The information in this document is intended to assist plants in evaluating the use of Mobilgrease 28 in ABB K-Line and HK circuit breakers and determining the maintenance intervals of these circuit breakers. The information in this document is applicable to both ABB K-Line and HK (air-blast) circuit breakers.

2001-10-30T23:59:59.000Z

173

Characterization of AMOLED pixel circuit without power line  

Science Conference Proceedings (OSTI)

We fabricated and evaluated the simple active matrix organic light emitting diode (AMOLED) pixel circuits without power line and proved that it is useful for the AMOLED display. Without power line in the pixel circuit we got higher-aperture ratio of ... Keywords: AMOLED, OLED, Pixel circuit, Thin film transistor

Seon Pyo Hong; Dong Sung Moon; Byung Seong Bae

2012-01-01T23:59:59.000Z

174

Technique for extending the range of a signal measuring circuit  

DOE Patents (OSTI)

An input signal supplied to a signal measuring circuit is either amplified or attenuated as necessary to establish the magnitude of the input signal within the defined dynamic range of the measuring circuit and the output signal developed by the measuring circuit is subsequently readjusted through amplification or attenuation to develop an output signal which corresponds to the magnitude of the initial input signal.

Chaprnka, Anthony G. (Cockeysville, MD); Sun, Shan C. (Pittsburgh, PA); Vercellotti, Leonard C. (Verona, PA)

1978-01-01T23:59:59.000Z

175

Symbolic analysis of analog circuits with hard nonlinearity  

Science Conference Proceedings (OSTI)

A new methodology is presented to solve a strongly nonlinear circuit, characterized by Piece-Wise Linear (PWL) functions, symbolically and explicitly in terms of its circuit parameters and is amenable to computer implementation. The method is based on ... Keywords: PWL, circuit nonlinearity, symbolic analysis

Alicia Manthe; Zhao Li; C.-J. Richard Shi

2003-06-01T23:59:59.000Z

176

TRIAC/SCR proportional control circuit  

DOE Patents (OSTI)

A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage to frequency converter controls the reset input of a R-S flip flop, while an 0 crossing detector controls the set input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the reset and set inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.

Hughes, Wallace J.

1997-12-01T23:59:59.000Z

177

TRIAC/SCR proportional control circuit  

DOE Patents (OSTI)

A power controller device which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the "reset" input of a R-S flip flop, while an "0" crossing detector controls the "set" input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the "reset" and "set" inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations.

Hughes, Wallace J. (Boston Lake, NY)

1999-01-01T23:59:59.000Z

178

TRIAC/SCR proportional control circuit  

DOE Patents (OSTI)

A power controller device is disclosed which uses a voltage-to-frequency converter in conjunction with a zero crossing detector to linearly and proportionally control AC power being supplied to a load. The output of the voltage-to frequency converter controls the ``reset`` input of a R-S flip flop, while an ``0`` crossing detector controls the ``set`` input. The output of the flip flop triggers a monostable multivibrator controlling the SCR or TRIAC firing circuit connected to the load. Logic gates prevent the direct triggering of the multivibrator in the rare instance where the ``reset`` and ``set`` inputs of the flip flop are in coincidence. The control circuit can be supplemented with a control loop, providing compensation for line voltage variations. 9 figs.

Hughes, W.J.

1999-04-06T23:59:59.000Z

179

Vacuum die attach for integrated circuits  

DOE Patents (OSTI)

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required.

Schmitt, Edward H. (Livermore, CA); Tuckerman, David B. (Livermore, CA)

1991-01-01T23:59:59.000Z

180

Vacuum die attach for integrated circuits  

DOE Patents (OSTI)

A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required. 1 figure.

Schmitt, E.H.; Tuckerman, D.B.

1991-09-10T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


181

Using Relays for Circuit Breaker Diagnostics  

Science Conference Proceedings (OSTI)

This report updates the ongoing investigation by the Electric Power Research Institute (EPRI) of how microprocessor based protective relays programmed with logic and measurements can monitor trip time performance of power circuit breakers and alarm for malfunctions or wear problems. The report describes the programming developed by the EPRI and American Transmission Company (ATC) project team to use existing relays to time first trips of selected breakers. ATC carried out laboratory ...

2012-12-13T23:59:59.000Z

182

Circuit Breaker Reference Book: Proposed Development Approach  

Science Conference Proceedings (OSTI)

Utilities have been maintaining circuit breakers reliably for many years. However, the aging breaker population and the more recent adaptation of analytical asset management techniques, coupled with a challenging business environment and a decline in available subject matter expertise, have made the task more difficult.Through more than two decades of research and development, the Electric Power Research Institute (EPRI) has amassed a large knowledge base of information on high-voltage ...

2013-12-20T23:59:59.000Z

183

Circuit Breaker Diagnostic Tests: Effectiveness Assessment  

Science Conference Proceedings (OSTI)

This report presents preliminary findings from a multiyear research initiative to improve the maintenance of high-voltage circuit breakers and maintain reliable performance with reduced costs through better selection and application of nonintrusive diagnostic tests and techniques. The initiative’s focus is to catalog available tests and techniques and to develop and apply assessment metrics to determine which provide the most useful information.The project team developed a set of ...

2013-12-22T23:59:59.000Z

184

Triple-effect absorption refrigeration system with double-condenser coupling  

DOE Patents (OSTI)

A triple effect absorption refrigeration system is provided with a double-condenser coupling and a parallel or series circuit for feeding the refrigerant-containing absorbent solution through the high, medium, and low temperature generators utilized in the triple-effect system. The high temperature condenser receiving vaporous refrigerant from the high temperature generator is double coupled to both the medium temperature generator and the low temperature generator to enhance the internal recovery of heat within the system and thereby increase the thermal efficiency thereof.

DeVault, Robert C. (Knoxville, TN); Biermann, Wendell J. (Fayetteville, NY)

1993-01-01T23:59:59.000Z

185

Triple-effect absorption refrigeration system with double-condenser coupling  

DOE Patents (OSTI)

A triple effect absorption refrigeration system is provided with a double-condenser coupling and a parallel or series circuit for feeding the refrigerant-containing absorbent solution through the high, medium, and low temperature generators utilized in the triple-effect system. The high temperature condenser receiving vaporous refrigerant from the high temperature generator is double coupled to both the medium temperature generator and the low temperature generator to enhance the internal recovery of heat within the system and thereby increase the thermal efficiency thereof.

DeVault, R.C.; Biermann, W.J.

1993-04-27T23:59:59.000Z

186

Base drive and overlap protection circuit  

DOE Patents (OSTI)

An inverter (34) which provides power to an A. C. machine (28) is controlled by a circuit (36) employing PWM control strategy whereby A. C. power is supplied to the machine at a preselectable frequency and preselectable voltage. This is accomplished by the technique of waveform notching in which the shapes of the notches are varied to determine the average energy content of the overall waveform. Through this arrangement, the operational efficiency of the A. C. machine is optimized. The control circuit includes a microcomputer and memory element which receive various parametric inputs and calculate optimized machine control data signals therefrom. The control data is asynchronously loaded into the inverter through an intermediate buffer (38). A base drive and overlap protection circuit is included to insure that both transistors of a complimentary pair are not conducting at the same time. In its preferred embodiment, the present invention is incorporated within an electric vehicle (10) employing a 144 VDC battery pack (32) and a three-phase induction motor (18).

Gritter, David J. (Southfield, MI)

1983-01-01T23:59:59.000Z

187

Double acting bit holder  

DOE Patents (OSTI)

A double acting bit holder that permits bits held in it to be resharpened during cutting action to increase energy efficiency by reducing the amount of small chips produced. The holder consist of: a stationary base portion capable of being fixed to a cutter head of an excavation machine and having an integral extension therefrom with a bore hole therethrough to accommodate a pin shaft; a movable portion coextensive with the base having a pin shaft integrally extending therefrom that is insertable in the bore hole of the base member to permit the moveable portion to rotate about the axis of the pin shaft; a recess in the movable portion of the holder to accommodate a shank of a bit; and a biased spring disposed in adjoining openings in the base and moveable portions of the holder to permit the moveable portion to pivot around the pin shaft during cutting action of a bit fixed in a turret to allow front, mid and back positions of the bit during cutting to lessen creation of small chip amounts and resharpen the bit during excavation use.

Morrell, Roger J. (Blommington, MN); Larson, David A. (Minneapolis, MN); Ruzzi, Peter L. (Eagan, MN)

1994-01-01T23:59:59.000Z

188

Universal programmable quantum circuit schemes to emulate an operator  

Science Conference Proceedings (OSTI)

Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix-which can be non-unitary-in an efficient way. We also give both the classical and quantum complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U=e{sup -iHt} for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.

Daskin, Anmer; Grama, Ananth; Kollias, Giorgos [Department of Computer Science, Purdue University, West Lafayette, Indiana 47907 (United States); Kais, Sabre [Department of Chemistry, Department of Physics and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907 (United States); Qatar Environment and Energy Research Institute, Doha (Qatar)

2012-12-21T23:59:59.000Z

189

High efficiency inverter and ballast circuits  

SciTech Connect

A high efficiency push-pull inverter circuit employing a pair of relatively high power switching transistors is described. The switching on and off of the transistors is precisely controlled to minimize power losses due to common-mode conduction or due to transient conditions that occur in the process of turning a transistor on or off. Two current feed-back transformers are employed in the transistor base drives; one being saturable for providing a positive feedback, and the other being non-saturable for providing a subtractive feedback.

Nilssen, O.K.

1984-02-07T23:59:59.000Z

190

Circuit breaker operation and potential failure modes during an earthquake  

Science Conference Proceedings (OSTI)

This study addresses the effect of a strong-motion earthquake on circuit breaker operation. It focuses on the loss of offsite power (LOSP) transient caused by a strong-motion earthquake at the Zion Nuclear Power Plant. This paper also describes the operator action necessary to prevent core melt if the above circuit breaker failure modes occur simultaneously on three 4.16 KV buses. Numerous circuit breakers important to plant safety, such as circuit breakers to diesel generators and engineered safety systems (ESS), must open and/or close during this transient while strong motion is occurring. Potential seismically-induced circuit-breaker failures modes were uncovered while the study was conducted. These failure modes include: circuit breaker fails to close; circuit breaker trips inadvertently; circuit breaker fails to reclose after trip. The causes of these failure modes include: Relay chatter causes the circuit breaker to trip; Relay chatter causes anti-pumping relays to seal-in which prevents automatic closure of circuit breakers; Load sequencer failures. The incorporation of these failure modes as well as other instrumentation and control failures into a limited scope seismic probabilistic risk assessment is also discussed in this paper.

Lambert, H.E.; Budnitz, R.J.

1987-01-01T23:59:59.000Z

191

Circuit for monitoring temperature of high-voltage equipment  

DOE Patents (OSTI)

This invention relates to an improved circuit for measuring temperature in a region at high electric potential and generating a read-out of the same in a region at lower potential. The circuit is specially designed to combine high sensitivity, stability, and accuracy. A major portion of the circuit situated in the high-potential region can take the form of an integrated circuit. The preferred form of the circuit includes an input section which is situated in the high-potential region and comprises a temperature-compensated thermocouple circuit for sensing temperature, an oscillator circuit for generating a train of ramp voltages whose rise time varies inversely with the thermocouple output, a comparator and switching circuit for converting the oscillator output to pulses whose frequency is proportional to the thermocouple output, and a light-emitting diode which is energized by these pulses. An optical coupling transmits the light pulses generated by the diode to an output section of the circuit, situated in a region at ground. The output section comprises means for converting the transmitted pulses to electrical pulses of corresponding frequency, means for amplifying the electrical pulses, and means for displaying the frequency of the same. The preferred embodiment of the overall circuit is designed so that the frequency of the output signal in hertz and tenths of hertz is equal to the sensed temperature in degrees and tenths of degrees.

Jacobs, Martin E. (Chillicothe, OH)

1976-01-01T23:59:59.000Z

192

Circuit Breaker Maintenance; Volume 1: Low-Voltage Circuit Breakers; Part 2: GE AK Models: Volume 1: Low-Voltage Circuit Breakers Pa rt 2: GE AK Models  

Science Conference Proceedings (OSTI)

This comprehensive guide will help utilities improve their maintenance of GE model AK circuit breakers. It consolidates industry guidelines, applicable standards, original equipment manufacturer recommendations, and hands-on experience relative to these circuit breakers. Ultimately, improved maintenance will increase reliability and reduce costs associated with corrective maintenance and equipment downtime.

1992-05-02T23:59:59.000Z

193

Alloy by Double Mechanical Milling  

Science Conference Proceedings (OSTI)

The results show that the morphology of double mechanical milling powder is regular and the TiAl phase and Ti3Al phase were observed in the powders.

194

Circuit Breaker Maintenance: Volume 2: Medium Voltage Circuit Breakers; Part 3: Westinghouse Types DH and DHP  

Science Conference Proceedings (OSTI)

This comprehensive guide will help utilities enhance and optimize maintenance of Westinghouse DH and DHP circuit breakers. It consolidates industry guidelines, applicable standards, original equipment manufacturer recommendations, and hands-on experience relative to these breakers. Optimized maintenance will increase reliability and reduce costs associated with corrective maintenance and equipment downtime.

1994-02-02T23:59:59.000Z

195

Double-super-connected digraphs  

Science Conference Proceedings (OSTI)

A strongly connected digraph D is said to be super-connected if every minimum vertex-cut is the out-neighbor or in-neighbor set of a vertex. A strongly connected digraph D is said to be double-super-connected if every minimum vertex-cut is both the out-neighbor ... Keywords: Cartesian product, Double-super-connected, Lexicographic product, Line digraphs, Super-connected

Juan Liu; Jixiang Meng; Zhao Zhang

2010-05-01T23:59:59.000Z

196

Interrogator system for identifying electrical circuits  

DOE Patents (OSTI)

A system for interrogating electrical leads to correctly ascertain the identity of equipment attached to remote ends of the leads. The system includes a source of a carrier signal generated in a controller/receiver to be sent over the leads and an identifier unit at the equipment. The identifier is activated by command of the carrier and uses a portion of the carrier to produce a supply voltage. Each identifier is uniquely programmed for a specific piece of equipment, and causes the impedance of the circuit to be modified whereby the carrier signal is modulated according to that program. The modulation can be amplitude, frequency or phase modulation. A demodulator in the controller/receiver analyzes the modulated carrier signal, and if a verified signal is recognized displays and/or records the information. This information can be utilized in a computer system to prepare a wiring diagram of the electrical equipment attached to specific leads. Specific circuit values are given for amplitude modulation, and the system is particularly described for use with thermocouples.

Jatko, William B. (10601 Rivermist La., Knoxville, TN 37922); McNeilly, David R. (Rte. 12, Box 538, Maryville, TN 37801)

1988-01-01T23:59:59.000Z

197

Interrogator system for identifying electrical circuits  

DOE Patents (OSTI)

A system for interrogating electrical leads to correctly ascertain the identity of equipment attached to remote ends of the leads is disclosed. The system includes a source of a carrier signal generated in a controller/receiver to be sent over the leads and an identifier unit at the equipment. The identifier is activated by command of the carrier and uses a portion of the carrier to produce a supply voltage. Each identifier is uniquely programmed for a specific piece of equipment, and causes the impedance of the circuit to be modified whereby the carrier signal is modulated according to that program. The modulation can be amplitude, frequency or phase modulation. A demodulator in the controller/receiver analyzes the modulated carrier signal, and if a verified signal is recognized displays and/or records the information. This information can be utilized in a computer system to prepare a wiring diagram of the electrical equipment attached to specific leads. Specific circuit values are given for amplitude modulation, and the system is particularly described for use with thermocouples. 6 figs.

Jatko, W.B.; McNeilly, D.R.

1988-04-12T23:59:59.000Z

198

Hydraulic actuator for an electric circuit breaker  

DOE Patents (OSTI)

This actuator comprises a fluid motor having a piston, a breaker-opening space at one side of the piston, and a breaker-closing space at its opposite side. An accumulator freely communicates with the breaker-opening space for supplying pressurized fluid thereto during a circuit breaker opening operation. The breaker-opening space and the breaker-closing space are connected by an impeded flow passage. A pilot valve opens to allow the pressurized liquid in the breaker-closing space to flow to a back chamber of a normally closed main valve to cause the main valve to be opened during a circuit breaker opening operation to release the pressurized liquid from the breaker-closing space. An impeded passage affords communication between the back chamber and a sump located on the opposite side of the main valve from the back chamber. The pilot valve and impeded passage allow rapid opening of the main valve with pressurized liquid from the breaker closing side of the piston.

Imam, Imdad (Colonie, NY)

1983-01-01T23:59:59.000Z

199

Hydraulic actuator for an electric circuit breaker  

DOE Patents (OSTI)

This actuator comprises a fluid motor having a piston, a breaker-opening space at one side of the piston, and a breaker-closing space at its opposite side. An accumulator freely communicates with the breaker-opening space for supplying pressurized fluid thereto during a circuit breaker opening operation. The breaker-opening space and the breaker-closing space are connected by an impeded flow passage. A pilot valve opens to allow the pressurized liquid in the breaker-closing space to flow to a back chamber of a normally closed main valve to cause the main valve to be opened during a circuit breaker opening operation to release the pressurized liquid from the breaker-closing space. An impeded passage affords communication between the back chamber and a sump located on the opposite side of the main valve from the back chamber. The pilot valve and impeded passage allow rapid opening of the main valve with pressurized liquid from the breaker closing side of the piston. 3 figs.

Imam, I.

1983-05-17T23:59:59.000Z

200

Generating Single Microwave Photons in a Circuit  

E-Print Network (OSTI)

Electromagnetic signals in circuits consist of discrete photons, though conventional voltage sources can only generate classical fields with a coherent superposition of many different photon numbers. While these classical signals can control and measure bits in a quantum computer (qubits), single photons can carry quantum information, enabling non-local quantum interactions, an important resource for scalable quantum computing. Here, we demonstrate an on-chip single photon source in a circuit quantum electrodynamics (QED) architecture, with a microwave transmission line cavity that collects the spontaneous emission of a single superconducting qubit with high efficiency. The photon source is triggered by a qubit rotation, as a photon is generated only when the qubit is excited. Tomography of both qubit and fluorescence photon shows that arbitrary qubit states can be mapped onto the photon state, demonstrating an ability to convert a stationary qubit into a flying qubit. Both the average power and voltage of the photon source are characterized to verify performance of the system. This single photon source is an important addition to a rapidly growing toolbox for quantum optics on a chip.

A. A. Houck; D. I. Schuster; J. M. Gambetta; J. A. Schreier; B. R. Johnson; J. M. Chow; J. Majer; L. Frunzio; M. H. Devoret; S. M. Girvin; R. J. Schoelkopf

2007-02-27T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


201

Memristor-based Circuits for Performing Basic Arithmetic Operations  

E-Print Network (OSTI)

In almost all of the currently working circuits, especially in analog circuits implementing signal processing applications, basic arithmetic operations such as multiplication, addition, subtraction and division are performed on values which are represented by voltages or currents. However, in this paper, we propose a new and simple method for performing analog arithmetic operations which in this scheme, signals are represented and stored through a memristance of the newly found circuit element, i.e. memristor, instead of voltage or current. Some of these operators such as divider and multiplier are much simpler and faster than their equivalent voltage-based circuits and they require less chip area. In addition, a new circuit is designed for programming the memristance of the memristor with predetermined analog value. Presented simulation results demonstrate the effectiveness and the accuracy of the proposed circuits.

Merrikh-Bayat, Farnood

2010-01-01T23:59:59.000Z

202

Field Guide: Compressors for High-Voltage Circuit Breakers  

Science Conference Proceedings (OSTI)

High-voltage circuit breakers (HVCBs) perform essential protection and control functions on power transmission networks. Circuit breakers have multiple components that must operate in concert in order for the breaker to perform properly. If one component, such as the air or hydraulic system, does not operate correctly, the circuit breaker may misoperate or fail, possibly resulting in equipment damage or an outageboth expensive consequences. To help utilities prevent such undesirable events, this field gu...

2010-12-22T23:59:59.000Z

203

Field Guide: Compressors for High-Voltage Circuit Breakers  

Science Conference Proceedings (OSTI)

High-voltage circuit breakers (HVCBs) perform essential protection and control functions on power transmission networks. Circuit breakers have multiple components that must operate in concert in order for the breaker to perform properly. If one component, such as the air or hydraulic system, does not operate correctly, the circuit breaker may misoperate or fail, possibly resulting in equipment damage or an outage—both expensive consequences. To help ...

2012-12-14T23:59:59.000Z

204

Surge Protection in Low-Voltage AC Power Circuits  

Science Conference Proceedings (OSTI)

Surge Protection in Low-Voltage AC Power Circuits: An 8-part Anthology ... converting old and yellowing papers into 21st Century electronic files, and ...

2013-05-20T23:59:59.000Z

205

High speed, long distance, data transmission multiplexing circuit  

DOE Patents (OSTI)

A high speed serial data transmission multiplexing circuit, which is operable to accurately transmit data over long distances (up to 3 Km), and to multiplex, select and continuously display real time analog signals in a bandwidth from DC to 100 Khz. The circuit is made fault tolerant by use of a programmable flywheel algorithm, which enables the circuit to tolerate one transmission error before losing synchronization of the transmitted frames of data. A method of encoding and framing captured and transmitted data is used which has a low overhead and prevents some particular transmitted data patterns from locking an included detector/decoder circuit.

Mariotti, Razvan (Boulder, CO)

1991-01-01T23:59:59.000Z

206

A high speed, long distance, data transmission multiplexing circuit  

DOE Patents (OSTI)

A high speed serial data transmission multiplexing circuit, which is operable to accurately transmit data over long distances (up to 3 Km), and to multiplex, select and continuously display real time analog signals in a bandwidth from DC to 100Khz. The circuit is made fault tolerant by use of a programmable flywheel algorithm, which enables the circuit to tolerate one transmission error before losing synchronization of the transmitted frames of data. A method of encoding and framing captured and transmitted data is used which has a low overhead and prevents some particular transmitted data patterns from locking an included detector/decoder circuit. 9 figs.

Mariotti, R.

1990-01-30T23:59:59.000Z

207

A Power-efficient Radio Frequency Energy-harvesting Circuit .  

E-Print Network (OSTI)

??This work aims to demonstrate the design and simulation of a Radio Frequency (RF) energy-harvesting circuit, from receiving antenna to the point of charge collection.… (more)

Khoury, Philip

2013-01-01T23:59:59.000Z

208

Automatic ranging circuit for a digital panel meter  

DOE Patents (OSTI)

This invention relates to a range changing circuit that operates in conjunction with a digital panel meter of fixed sensitivity. The circuit decodes the output of the panel meter and uses that information to change the gain of an input amplifier to the panel meter in order to insure that the maximum number of significant figures is always displayed in the meter. The circuit monitors five conditions in the meter and responds to any of four combinations of these conditions by means of logic elements to carry out the function of the circuit.

Mueller, Theodore R. (Oak Ridge, TN); Ross, Harley H. (Oak Ridge, TN)

1976-01-01T23:59:59.000Z

209

Phase controlled rectifier circuit for rapidly charging batteries  

SciTech Connect

An improved battery charger circuit for rapidly charging a battery by increasing the rate of battery charge acceptance through periodic battery discharge during the charging process includes a pair of first and second controlled rectifier circuits coupled to an ac source and adapted for coupling to a battery. The first controlled rectifier circuit is rendered conductive during the charging intervals to supply the battery with charge current from the ac source. The second controlled rectifier circuit is rendered conductive during battery discharge intervals to discharge the battery in a substantially lossless manner by conducting battery discharge current through the ac source, thus realizing a highly efficient battery charger.

Steigerwald, R. L.

1981-02-24T23:59:59.000Z

210

DSOPilot project Automatic receipt of short circuiting indicators...  

Open Energy Info (EERE)

Project Name DSOPilot project Automatic receipt of short circuiting indicators Country Denmark Coordinates 56.26392, 9.501785 Loading map... "minzoom":false,"mappingservice":"...

211

Evolution of Gold Gravity Recovery in Grinding Circuits - A Critical ...  

Science Conference Proceedings (OSTI)

Presentation Title, Evolution of Gold Gravity Recovery in Grinding Circuits - A Critical .... Selective Separations of Gold and Contaminants from Various Gold and ...

212

Hydrocyclone Classification Modeling for Gold Ore Grinding Circuit ...  

Science Conference Proceedings (OSTI)

Grinding is achieved in closed circuits where hydrocyclones are used to .... Selective Separations of Gold and Contaminants from Various Gold and Silver ...

213

Driver Circuit for White LED Lamps with TRIAC Dimming Control.  

E-Print Network (OSTI)

??An efficient Light Emitting Diode (LED) lamp driver circuit is proposed for retrofitting the conventionally used incandescent lamps with existing TRIAC dimmer. The dimming feature… (more)

Weng, Szu-Jung

2012-01-01T23:59:59.000Z

214

Laser Micromachining of Active and Passive Photonic Integrated Circuits  

E-Print Network (OSTI)

This thesis describes the development of advanced laser resonators and applications of laserinduced micromachining for photonic circuit fabrication. Two major advantages of laserinduced micromachining are direct patterning ...

Cho, Seong-Ho

2006-06-28T23:59:59.000Z

215

Safety and performance enhancement circuit for primary explosive detonators  

DOE Patents (OSTI)

A safety and performance enhancement arrangement for primary explosive detonators. This arrangement involves a circuit containing an energy storage capacitor and preset self-trigger to protect the primary explosive detonator from electrostatic discharge (ESD). The circuit does not discharge into the detonator until a sufficient level of charge is acquired on the capacitor. The circuit parameters are designed so that normal ESD environments cannot charge the protection circuit to a level to achieve discharge. When functioned, the performance of the detonator is also improved because of the close coupling of the stored energy.

Davis, Ronald W. (Tracy, CA)

2006-04-04T23:59:59.000Z

216

6.012 Microelectronic Devices and Circuits, Fall 2003  

E-Print Network (OSTI)

Modeling of microelectronic devices, and basic microelectronic circuit analysis and design. Physical electronics of semiconductor junction and MOS devices. Relation of electrical behavior to internal physical processes; ...

Fonstad, Clifton G.

217

Interconnect Coupling Noise in CMOS VLSI Circuits  

E-Print Network (OSTI)

Interconnect between a CMOS driver and re- ceiver can be modeled as a 1ossy transmission line in high speed CMOS VLSI circuits as transition times become comparable to or less than the time of flight delay of the signal through the low resistivity interconnect. In this paper, closed form expressions for the coupling noise between adjacent interconnect are presented to estimate the coupling noise voltage on a quiet line. These expressions are based on an assumption that the interconnections are loosely coupled, where the effect of the coupling noise on the waveform of the active line is small and can be ne- glected. It is demonstrated that the output impedance of the CMOS driver should preferably be comparable to the interconnect impedance in order to reduce the propagation delay of the CMOS driver stage.

Kevin T. Tang; Eby G. Friedman

1999-01-01T23:59:59.000Z

218

A New Design for Double Edge Triggered Flip-flops  

E-Print Network (OSTI)

The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET flip-flop is proposed. Simulation using SPICE and a 1 micron technology shows that this DET flip-flop has ideal logic functionality, a simpler structure, lower delay time and higher maximum data rate compared to other existing CMOS DET flipflops. By simulating and comparing the proposed DET flip-flop with the traditional single-edge-triggered (SET) flip-flop, it is shown that the proposed DET flip-flop reduces power dissipation by half while keeping the same date rate.

Massoud Pedram; Qing Wu; Xunwei Wu

1998-01-01T23:59:59.000Z

219

Theory of degenerate three-wave mixing using circuit QED in solid-state circuits  

Science Conference Proceedings (OSTI)

We study the theory of degenerate three-wave mixing and the generation of squeezed microwaves using circuit quantum electrodynamics in solid state circuits. The Hamiltonian for degenerate three-wave mixing, which seemed to be given phenomenologically in quantum optics, is derived by quantum mechanical calculations. The nonlinear medium needed in three-wave mixing is composed of a series of superconducting charge qubits which are located inside two superconducting transmission-line resonators. Here, the multiqubit ensemble is present to enhance the effective coupling constant between the two modes in the transmission-line resonators. In the squeezing process, the qubits are kept in their ground states so that their decoherence does not corrupt the squeezing. The main obstacle preventing a large squeezing efficiency is the decay rate of the transmission-line resonator.

Cao, Ye [Key Laboratory of Atomic and Molecular Nanosciences and Department of Physics, Tsinghua University, Beijing 100084 (China); Huo, Wen Yi [Institute of Applied Physics and Computational Mathematics, Beijing 100088 (China); Ai, Qing [Institute of Theoretical Physics, Chinese Academy of Sciences, Beijing 100190 (China); Long, Gui Lu [Key Laboratory of Atomic and Molecular Nanosciences and Department of Physics, Tsinghua University, Beijing 100084 (China); Tsinghua National Laboratory For Information Science and Technology, Beijing 100084 (China)

2011-11-15T23:59:59.000Z

220

Rapid Synthesis and Simulation of Computational Circuits in an MPPA  

Science Conference Proceedings (OSTI)

A computational circuit is custom-designed hardware which promises to offer maximum speedup of computationally intensive software algorithms. However, the practical needs to manage development cost and many low-level physical design details ... Keywords: Circuit CAD, FPGA-based design, Field programmable gate arrays, Logic CAD, Software architecture, Software tools, Spatial computing

David Grant; Graeme Smecher; Guy G. Lemieux; Rosemary Francis

2012-04-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


221

Design investigation of nanoelectronic circuits using crossbar-based nanoarchitectures  

Science Conference Proceedings (OSTI)

Nanowire crossbar is an efficient nanoscale architecture which can be used for logic circuit design. In this work, we study and compare different crossbar nanoarchitectures and their application in logic circuit implementation. To evaluate the performance ... Keywords: Crossbar arrays, Molecular electronics, Nanoelectronics, Nanotubes, Nanowire crossbar architectures

Morteza Gholipour; Nasser Masoumi

2013-03-01T23:59:59.000Z

222

Variability aware SVM macromodel based design centering of analog circuits  

Science Conference Proceedings (OSTI)

Design centering is the term used for a procedure of obtaining enhanced parametric yield of a circuit despite the variations in device and design parameters. The process variability in nanometer regimes manifest into variations in these devices and design ... Keywords: Analog circuit sizing, Design centering, Genetic algorithm, Macromodels, Support vector machine, Yield

D. Boolchandani; Lokesh Garg; Sapna Khandelwal; Vineet Sahula

2012-10-01T23:59:59.000Z

223

A DC CIRCUIT BREAKER FOR AN ELECTRIC VEHICLE BATTERY PACK  

E-Print Network (OSTI)

A DC CIRCUIT BREAKER FOR AN ELECTRIC VEHICLE BATTERY PACK Geoff Walker Dept of Computer Science vehicle battery packs require DC circuit breakers for safety. These must break thousands of Amps DC at hundreds of Volts. The Sunshark solar racing car has a 140V 17Ahr battery box which needs such a breaker

Walker, Geoff

224

Pulse drive and capacitance measurement circuit for MEMS electrostatic actuators  

Science Conference Proceedings (OSTI)

In this paper we present an electronic circuit for position or capacitance estimation of MEMS electrostatic actuators based on a switched capacitor technique. The circuit uses a capacitive divider configuration composed by a fixed capacitor and the variable ... Keywords: Capacitance, Capacitive divider, Distance estimation, MEMS, Pulsed digital oscillators

Daniel Fernández; Jordi Madrenas; Manuel Domínguez; Joan Pons; Jordi Ricart

2008-12-01T23:59:59.000Z

225

Molded Case Circuit Breaker Application and Maintenance Guide: Revision 2  

Science Conference Proceedings (OSTI)

Molded case circuit breakers (MCCBs) provide power and circuit protection in nuclear plant electrical distribution systems. Their proper operation is essential to the safe and reliable operation of such systems. This guide applies to both nuclear and non-nuclear power generating facilities and can help improve the maintenance and reliability of MCCBs.

2004-12-22T23:59:59.000Z

226

Printed Circuit Board Maintenance, Repair, and Testing Guide  

Science Conference Proceedings (OSTI)

Printed circuit boards (PCBs) are an assembly of electronic and electro-mechanical components, such as relays and switches. The printed circuit (PC) board assembly provides multiple functions based on its application and intended service. It is an integral part of many instruments and/or instrumentation systems.

2003-10-30T23:59:59.000Z

227

A compiled-code hardware accelerator for circuit simulation  

Science Conference Proceedings (OSTI)

Describes the application of compiled-code techniques to the design of a hardware accelerator for circuit simulation, offering a speedup by a factor of up to 4400 compared with a software circuit simulator running on a Sun-3/60 workstation. The preprocessing ...

D. M. Lewis

2006-11-01T23:59:59.000Z

228

Short-Circuit Modeling of a Wind Power Plant: Preprint  

DOE Green Energy (OSTI)

This paper investigates the short-circuit behavior of a WPP for different types of wind turbines. The short-circuit behavior will be presented. Both the simplified models and detailed models are used in the simulations and both symmetrical faults and unsymmetrical faults are discussed.

Muljadi, E.; Gevorgian, V.

2011-03-01T23:59:59.000Z

229

How to efficiently implement dynamic circuit specialization systems  

Science Conference Proceedings (OSTI)

Dynamic circuit specialization (DCS) is a technique used to implement FPGA applications where some of the input data, called parameters, change slowly compared to other inputs. Each time the parameter values change, the FPGA is reconfigured by a configuration ... Keywords: Boolean Network evaluation, FPGA, dynamic circuit specialization, runtime reconfiguration

Fatma Abouelella; Tom Davidson; Wim Meeus; Karel Bruneel; Dirk Stroobandt

2013-07-01T23:59:59.000Z

230

High Resolution PV Power Modeling for Distribution Circuit Analysis  

DOE Green Energy (OSTI)

NREL has contracted with Clean Power Research to provide 1-minute simulation datasets of PV systems located at three high penetration distribution feeders in the service territory of Southern California Edison (SCE): Porterville, Palmdale, and Fontana, California. The resulting PV simulations will be used to separately model the electrical circuits to determine the impacts of PV on circuit operations.

Norris, B. L.; Dise, J. H.

2013-09-01T23:59:59.000Z

231

Determination of equivalent circuit for PVDF shock-pressure gauges  

SciTech Connect

Broadband impedance measurements of a PVDF shock-pressure gauge are used to build an equivalent circuit for the gauge. The essential components are a gauge capacitance and a low-loss transmission line. Component features are consistent with the physical characteristics. With knowledge of this circuit, troublesome oscillations can be anticipated and prevented.

Kotulski, J.D.; Anderson, M.U.; Brock, B.C.; Gomez, J.; Graham, R.A.; Vittitoe, C.N.

1993-07-01T23:59:59.000Z

232

Determination of equivalent circuit for PVDF shock-pressure gauges  

SciTech Connect

Broadband impedance measurements of a PVDF shock-pressure gauge are used to build an equivalent circuit for the gauge. The essential components are a gauge capacitance and a low-loss transmission line. Component features are consistent with the physical characteristics. With knowledge of this circuit, troublesome oscillations can be anticipated and prevented. [copyright]American Institute of Physics

Kotulski, J.D.; Anderson, M.U.; Brock, B.C.; Gomez, J.; Graham, R.A.; Vittitoe, C.N. (Sandia National Laboratories, Albuquerque, New Mexico 87185-5800 (United States))

1994-07-10T23:59:59.000Z

233

Power Circuit Breaker Component and Sub-System Degradation Modes  

Science Conference Proceedings (OSTI)

The work described in this technical update is part of an ongoing EPRI effort to improve high voltage circuit breaker (HVCB) life management. It presents initial results of investigations of issues concerning transmission-class circuit breaker pump and compressor maintenance, and possible improvements in materials and practices that could improve maintenance effectiveness.

2010-12-23T23:59:59.000Z

234

Stochastic computational models for accurate reliability evaluation of logic circuits  

Science Conference Proceedings (OSTI)

As reliability becomes a major concern with the continuous scaling of CMOS technology, several computational methodologies have been developed for the reliability evaluation of logic circuits. Previous accurate analytical approaches, however, have a ... Keywords: fault tolerance, logic circuits, reliability evaluation, stochastic computation, stochastic computational model

Hao Chen; Jie Han

2010-05-01T23:59:59.000Z

235

ANACONDA: Robust Synthesis of Analog Circuits Via Stochastic Pattern Search  

E-Print Network (OSTI)

Analog synthesis tools have traditionally traded quality for speed, substituting simplified circuit evaluation methods for full simulation in order to accelerate the numerical search for solution candidates. In this paper we develop a new numerical search algorithm efficient enough to allow full circuit simulation of each circuit candidate, and robust enough to find good solutions for difficult circuits. Comparison of synthesized circuits against manual industrial designs demonstrates the utility of the approach. I. INTRODUCTION A significant number of system-on-chip (SoC) designs are mixed-signal designs because of the need to interface a digital computational core to the real world. The rapidly increasing scale of SoC designs is stressing existing tools and methodologies; nevertheless the digital portions of these designs rely heavily on synthesis tools. This is not true for the analog portions, which are still routinely designed by hand. This lack of automation has always been a p...

Rodney Phelps; Michael Krasnicki; Rob A. Rutenbar; L. Richard Carley; James R. Hellums

1999-01-01T23:59:59.000Z

236

Decimal System and Double Digits  

NLE Websites -- All DOE Office Websites (Extended Search)

Decimal System and Double Digits Decimal System and Double Digits Name: Ken Status: other Grade: other Country: Canada Date: April 2011 Question: If the origin of the decimal system reflects counting on ten fingers and if zero came into use after the decimal system had been established why did we not create a single symbol for our tenth digit rather than use the double digit 10? If T were to represent the tenth number this would have created a counting system where the number series 1,2...9,T is followed by the same series having a 1 to the left then followed by the same series having a 2 to the left, etc. The T would be the last number in a series of ten single digits rather than be the first number in a series of double digits. The symbol zero would be used only between negative one and positive one because it represents the existence of nothing and, therefore, would have no other function.

237

High frequency transformerless electronics ballast using double inductor-capacitor resonant power conversion for gas discharge lamps  

SciTech Connect

A novel high frequency LCLC double resonant electronic ballast has been developed for gas discharge lamp applications. The ballast consists of a half-bridge inverter which switches at zero voltage crossing and an LCLC resonant circuit which converts a low ac voltage to a high ac voltage. The LCLC resonant circuit has two LC stages. The first LC stage produces a high voltage before the lamp is ignited. The second LC stage limits lamp current with the circuit inductance after the lamp is ignited. In another embodiment a filament power supply is provided for soft start up and for dimming the lamp. The filament power supply is a secondary of the second resonant inductor. 27 figs.

Lai, J.S.

1995-06-20T23:59:59.000Z

238

Power saving regulated light emitting diode circuit  

SciTech Connect

A power saving regulated light source circuit, comprising a light emitting diode (LED), a direct current source and a switching transistor connected in series with the LED, a control voltage producing resistor connected in series with the LED to produce a control voltage corresponding to the current through the LED, a storage capacitor connected in parallel with the series combination of the LED and the resistor, a comparator having its output connected to the input of the transistor, the comparator having a reference input and a control input, a stabilized biasing source for supplying a stabilized reference voltage to the reference input, the control input of the comparator being connected to the control voltage producing resistor, the comparator having a high output state when the reference voltage exceeds the control voltage while having a low output state when the control voltage exceeds the reference voltage, the transistor being conductive in response to the high state while being nonconductive in response to the low state, the transistor when conductive being effective to charge the capacitor and to increase the control voltage, whereby the comparator is cycled between the high and low output states while the transistor is cycled between conductive and nonconductive states.

Haville, G. D.

1985-03-12T23:59:59.000Z

239

EI7154_Projektpraktikum_Design_of_Molecular_Circuits.xls Allgemeine Daten  

E-Print Network (OSTI)

EI7154_Projektpraktikum_Design_of_Molecular_Circuits.xls Allgemeine Daten: Modulnummer: EI7154 Modulbezeichnung (dt.): Projektpraktikum Design of Molecular Circuits Modulbezeichnung (en.): Projektpraktikum Design of Molecular Circuits Modulniveau: MSc Kürzel: Untertitel: Semesterdauer: 1 Semester Häufigkeit

Kuehnlenz, Kolja

240

Photonic circuits for generating modal, spectral, and polarization entanglement  

E-Print Network (OSTI)

We consider the design of photonic circuits that make use of Ti:LiNbO$_{3}$ diffused channel waveguides for generating photons with various combinations of modal, spectral, and polarization entanglement. Down-converted photon pairs are generated via spontaneous optical parametric down-conversion (SPDC) in a two-mode waveguide. We study a class of photonic circuits comprising: 1) a nonlinear periodically poled two-mode waveguide structure, 2) a set of single-mode and two-mode waveguide-based couplers arranged in such a way that they suitably separate the three photons comprising the SPDC process, and, for some applications, 3) a holographic Bragg grating that acts as a dichroic reflector. The first circuit produces frequency-degenerate down-converted photons, each with even spatial parity, in two separate single-mode waveguides. Changing the parameters of the elements allows this same circuit to produce two nondegenerate down-converted photons that are entangled in frequency or simultaneously entangled in frequency and polarization. The second photonic circuit is designed to produce modal entanglement by distinguishing the photons on the basis of their frequencies. A modified version of this circuit can be used to generate photons that are doubly entangled in mode number and polarization. The third photonic circuit is designed to manage dispersion by converting modal, spectral, and polarization entanglement into path entanglement.

Mohammed F. Saleh; Giovanni Di Giuseppe; Bahaa E. A. Saleh; Malvin Carl Teich

2010-07-19T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


241

Prediction of Power Requirements for High-Speed Circuits  

E-Print Network (OSTI)

. Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from fields such as the telecommunication one where high speed and capability of dealing with large data sets is mandatory. The design of high-speed circuits is a challenging task, and can be carried out only if designers can exploit suitable CAD tools. Among the several aspects of high-speed circuit design, controlling power consumption is today a major issue for ensuring that circuits can operate at full speed without damages. In particular, tools for fast and accurate estimation of power consumption of highspeed circuits are required. In this paper we focus on the problem of predicting the maximum power consumption of sequential circuits. We formulate the problem as a constrained optimization problem, and solve it resorting to an evolutionary algorithm. Moreover, we empirically assess the effectiveness of our problem formulation with respect to the classical unconstrained formulation. Finally, we report experimental results assessing the effectiveness of the prototypical tool we implemented. 1.

Corno Rebaudengo Sonza; F. Corno; M. Rebaudengo; M. Sonza Reorda; G. Squillero; M. Violante

2000-01-01T23:59:59.000Z

242

Battery disconnect sensing circuit for battery charging systems  

SciTech Connect

This patent describes a battery disconnect sensing circuit for battery charging systems which have a pair of cables adapted to be connected to a battery to charge it. The sensing circuit contains a first R-C circuit adapted to connect across the cables and a second R-C circuit adapted to connect across the cables. The time constant of the first R-C circuit is substantially greater than that of the second R-C circuit. Also means connected to the RC circuits produced a momentary control signal in response to disconnection of the cables from a battery being charged. Included in a battery charging system is a source of charging current whose voltage output is controlled at a predetermined value when connected to a battery. It increases to a higher value when disconnected from the battery. Controller means connected with the source activate the battery charging system automatically in response to electrical connection of the battery. The improvement consists of: means for momentarily effecting reversal of the higher voltage value, and battery disconnect sensing means connected the charging source and to the controller means for sensing the reversed higher voltage upon disconnection of the battery charger system from the battery and for responding by automatically deactivating the battery charging system.

Dattilo, D.P.

1986-01-28T23:59:59.000Z

243

Measurements of the effects of smoke on active circuits  

SciTech Connect

Smoke has long been recognized as the most common source of fire damage to electrical equipment; however, most failures have been analyzed after the fire was out and the smoke vented. The effects caused while the smoke is still in the air have not been explored. Such effects have implications for new digital equipment being installed in nuclear reactors. The US Nuclear Regulatory Commission is sponsoring work to determine the impact of smoke on digital instrumentation and control. As part of this program, Sandia National Laboratories has tested simple active circuits to determine how smoke affects them. These tests included the study of three possible failure modes on a functional board: (1) circuit bridging, (2) corrosion (metal loss), and (3) induction of stray capacitance. The performance of nine different circuits was measured continuously on bare and conformally coated boards during smoke exposures lasting 1 hour each and continued for 24 hours after the exposure started. The circuit that was most affected by smoke (100% change in measured values) was the one most sensitive to circuit bridging. Its high impedance (50 Mohm) was shorted during the exposure, but in some cases recovered after the smoke was vented. The other two failure modes, corrosion and induced stray capacitance, caused little change in the function of the circuits. The smoke permanently increased resistance of the circuit tested for corrosion, implying that the contacts were corroded. However, the change was very small (< 2%). The stray capacitance test circuit showed very little change after a smoke exposure in either the short or long term. The results of the tests suggest that conformal coatings and type of circuit are major considerations when designing digital circuitry to be used in critical control systems.

Tanaka, T.J.

1998-01-01T23:59:59.000Z

244

Measurements of the Effects of Smoke on Active Circuits  

Science Conference Proceedings (OSTI)

Smoke has long been recognized as the most common source of fire damage to electrical equipment; however, most failures have been analyzed after the fire was out and the smoke vented. The effects caused while the smoke is still in the air have not been explored. Such effects have implications for new digital equipment being installed in nuclear reactors. The U.S. Nuclear Regulatory Commission is sponsoring work to determine the impact of smoke on digital instrumentation and control. As part of this program, Sandia National Laboratories has tested simple active circuits to determine how smoke affects them. These tests included the study of three possible failure modes on a functional board: (1) circuit bridging, (2) corrosion (metal loss), and (3) induction of stray capacitance. The performance of nine different circuits was measured continuously on bare and conformably coated boards during smoke exposures lasting 1 hour each and continued for 24 hours after the exposure started. The circuit that was most affected by smoke (100% change in measured values) was the one most sensitive to circuit bridging. Its high impedance (50 M{Omega}) was shorted during the exposure, but in some cases recovered after the smoke was vented. The other two failure modes, corrosion and induced stray capacitance, caused little change in the function of the circuits. The smoke permanently increased resistance of the circuit tested for corrosion, implying that the cent acts were corroded. However, the change was very small (< 2%). The stray-capacitance test circuit showed very little change after a smoke exposure in either the short or long term. The results of the tests suggest that conformal coatings and type of circuit are major considerations when designing digital circuitry to be used in critical control systems.

Tanaka, T.J.

1999-02-09T23:59:59.000Z

245

Apparatus for mounting a diode in a microwave circuit  

DOE Patents (OSTI)

Apparatus for mounting a diode in a microwave circuit for making electrical contact between the circuit and ground and for dissipation of heat between the diode and a heat sink. The diode, supported on a thermally and electrically conductive member, is resiliently pressed in electrical contact with the microwave circuit. A tapered collar on the member is elastically deformably wedged into a tapered aperture formed in a heat sink. The wedged collar tightens firmly around the member establishing good thermal and electrical conduction from the diode to the heat sink and ground. Disassembly is facilitated because of the elastically deformed collar.

Liu, Shing-gong (Princeton, NJ)

1976-07-27T23:59:59.000Z

246

High density electronic circuit and process for making  

DOE Patents (OSTI)

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

Morgan, W.P.

1999-06-29T23:59:59.000Z

247

Just-In-Time Power Gating of GasP Circuits.  

E-Print Network (OSTI)

?? In modern integrated circuits, one way to reduce power consumption is to turn off power to parts of the circuit when those are idle.… (more)

Padwal, Prachi Gulab

2013-01-01T23:59:59.000Z

248

Automatic fault extraction and simulation of layout realistic faults for integrated analogue circuits  

Science Conference Proceedings (OSTI)

A comprehensive tool has been implemented for the comparison of different test preparation techniques and target faults. It comprises of the realistic fault characterisation program LIFT that can extract sets of various faults from a given analogue or ... Keywords: AnaFAUL, LIFT, VCO, analogue integrated circuits, automatic analogue fault simulation program, catastrophic faults, circuit analysis computing, circuit layout, fault diagnosis, integrated analogue circuits, integrated circuit layout, integrated circuit testing, mixed analogue-digital integrated circuits, mixed-signal circuit, parametric faults, realistic fault characterisation program, simulation, test preparation, voltage-controlled oscillators

C. Sebeke; J. P. Teixeira; M. J. Ohletz

1995-03-01T23:59:59.000Z

249

Equivalent Circuit Description of Non-compensated n-p Codoped TiO2 as Intermediate Band Solar Cells  

E-Print Network (OSTI)

The novel concept of non-compensated n-p codoping has made it possible to create tunable intermediate bands in the intrinsic band gap of TiO2, making the codoped TiO2 a promising material for developing intermediate band solar cells (IBSCs). Here we investigate the quantum efficiency of such IBSCs within two scenarios - with and without current extracted from the extended intermediate band. Using the ideal equivalent circuit model, we find that the maximum efficiency of 57% in the first scenario and 53% in the second are both much higher than the Shockley-Queisser limit from single gap solar cells. We also obtain various key quantities of the circuits, a useful step in realistic development of TiO2 based solar cells invoking device integration. These equivalent circuit results are also compared with the efficiencies obtained directly from consideration of electron transition between the energy bands, and both approaches reveal the intriguing existence of double peaks in the maximum quantum efficiency as a function of the relative location of IBs.

Tian-Li Feng; Guang-Wei Deng; Yi Xia; Feng-Cheng Wu; Ping Cui; Hai-Ping Lan; Zhen-Yu Zhang

2010-12-08T23:59:59.000Z

250

Hierarchy in a double braneworld  

Science Conference Proceedings (OSTI)

We show that the hierarchy between the Planck and the weak scales can follow from the tendency of gravitons and fermions to localize at different edges of a thick double wall embedded in an AdS{sub 5} spacetime without reflection symmetry. This double wall is a stable BPS thick-wall solution with two subwalls located at its edges; fermions are coupled to the scalar field through Yukawa interactions, but the lack of reflection symmetry forces them to be localized in one of the subwalls. We show that the graviton zero-mode wave function is suppressed in the fermion edge by an exponential function of the distance between the subwalls, and that the massive modes decouple so that Newtonian gravity is recuperated.

Guerrero, Rommel; Rodriguez, R. Omar [Unidad de Investigacion en Ciencias Matematicas, Universidad Centroccidental Lisandro Alvarado, 400 Barquisimeto (Venezuela); Melfo, Alejandra; Pantoja, Nelson [Centro de Fisica Fundamental, Universidad de Los Andes, Merida (Venezuela)

2006-10-15T23:59:59.000Z

251

Low-voltage, low-power circuits for data communication systems  

E-Print Network (OSTI)

There are growing industrial demands for low-voltage supply and low-power consumption circuits and systems. This is especially true for very high integration level and very large scale integrated (VLSI) mixed-signal chips and system-on-a-chip. It is mainly due to the limited power dissipation within a small area and the costs related to the packaging and thermal management. In this research work, two low-voltage, low-power integrated circuits used for data communication systems are introduced. The first one is a high performance continuous-time linear phase filter with automatic frequency tuning. The filter can be used in hard disk driver systems and wired communication systems such as 1000Base-T transceivers. A pseudo-differential operational transconductance amplifier (OTA) based on transistors operating in triode region is used to achieve a large linear signal swing with low-voltage supplies. A common-mode (CM) control circuit that combines common-mode feedback (CMFB), common-mode feedforward (CMFF), and adaptive-bias has been proposed. With a 2.3V single supply, the filter?s total harmonic distortion is less than ?44dB for a 2VPP differential input, which is due to the well controlled CM behavior. The ratio of the root mean square value of the ac signal to the power supply voltage is around 31%, which is much better than previous realizations. The second integrated circuit includes two LVDS drivers used for high-speed point-to-point links. By removing the stacked switches used in the conventional structures, both LVDS drivers can operate with ultra low-voltage supplies. Although the Double Current Sources (DCS) LVDS driver draws twice minimum static current as required by the signal swing, it is quite simple and achieves very high speed operation. The Switchable Current Sources (SCS) LVDS driver, by dynamically switching the current sources, draws minimum static current and reduces the power consumption by 60% compared to the previously reported LVDS drivers. Both LVDS drivers are compliant to the standards and operate at data rates up to gigabits-per-second.

Chen, Mingdeng

2003-12-01T23:59:59.000Z

252

DOE - Office of Legacy Management -- Electro Circuits Inc - CA 08  

Office of Legacy Management (LM)

Electro Circuits Inc - CA 08 Electro Circuits Inc - CA 08 FUSRAP Considered Sites Site: Electro Circuits, Inc. (CA.08 ) Eliminated from consideration under FUSRAP Designated Name: Not Designated Alternate Name: None Location: 401 East Green Street , Pasadena , California CA.08-1 Evaluation Year: 1994 CA.08-2 Site Operations: Conducted ultrasonic tests on uranium ingots in the early 1950s. CA.08-3 CA.08-4 Site Disposition: Eliminated - Potential for contamination remote based on limited operations at the site CA.08-2 Radioactive Materials Handled: Yes Primary Radioactive Materials Handled: Uranium Metal CA.08-3 Radiological Survey(s): No Site Status: Eliminated from consideration under FUSRAP Also see Documents Related to Electro Circuits, Inc. CA.08-1 - AEC Memorandum; Parsegian to Musser; Subject: Transfer of

253

Synchronous Full-Scan for Asynchronous Handshake Circuits  

Science Conference Proceedings (OSTI)

Philips Research Laboratories, Electronic Design & Tools, Prof. ... Philips Research Laboratories, Information and Software Technology, Prof. ..... cannot be removed, the circuit has to be analyzed prior .... essential for the reliable hazard-

254

An energy optimal power supply for digital circuits  

E-Print Network (OSTI)

The energy efficiency of digital circuits continues to be a major factor in determining the size and weight of battery-operated electronics. Integration of more functionality in a single system has made battery longevity ...

Ramadass, Yogesh Kumar

2006-01-01T23:59:59.000Z

255

Inductive compensation of operational amplifiers in feedback circuits  

E-Print Network (OSTI)

In this thesis I designed, implemented, and tested an integrated-circuit feedback compensator that uses inductors as compensation elements. Introducing inductors as feedback elements makes it possible to implement lead ...

Adams, Douglas Jay Kozak

2010-01-01T23:59:59.000Z

256

Characterization of process variability and robust optimization of analog circuits  

E-Print Network (OSTI)

Continuous scaling of CMOS technology has enabled dramatic performance enhancement of CMOS devices and has provided speed, power, and density improvement in both digital and analog circuits. CMOS millimeter-wave applications ...

Lim, Daihyun, 1976-

2008-01-01T23:59:59.000Z

257

Low energy digital circuit design using sub-threshold operation  

E-Print Network (OSTI)

Scaling of process technologies to deep sub-micron dimensions has made power management a significant concern for circuit designers. For emerging low power applications such as distributed micro-sensor networks or medical ...

Calhoun, Benton Highsmith, 1978-

2006-01-01T23:59:59.000Z

258

Analog circuit optimization using evolutionary algorithms and convex optimization  

E-Print Network (OSTI)

In this thesis, we analyze state-of-art techniques for analog circuit sizing and compare them on various metrics. We ascertain that a methodology which improves the accuracy of sizing without increasing the run time or the ...

Aggarwal, Varun

2007-01-01T23:59:59.000Z

259

Material selection and nanofabrication techniques for electronic photonic integrated circuits  

E-Print Network (OSTI)

Electronic-photonic integrated circuits have the potential to circumvent many of the performance bottlenecks of electronics. To achieve the full benefits of integrating photonics with electronics it is generally believed ...

Holzwarth, Charles W., III (Charles Willett)

2009-01-01T23:59:59.000Z

260

Ordering circuit establishment in multiplane NoCs  

Science Conference Proceedings (OSTI)

Segregating networks-on-chips (NoCs) into data and control planes yields several opportunities for improving power and performance in chip-multiprocessor systems (CMPs). This article describes a hybrid packet/circuit switched multiplane network optimized ...

Ahmed Abousamra, Alex K. Jones, Rami Melhem

2013-10-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


261

Circuits and algorithms for pipelined ADCs in scaled CMOS technologies  

E-Print Network (OSTI)

CMOS technology scaling is creating significant issues for analog circuit design. For example, reduced signal swing and device gain make it increasingly difficult to realize high-speed, high-gain feedback loops traditionally ...

Brooks, Lane Gearle, 1975-

2008-01-01T23:59:59.000Z

262

Design automation and analysis of three-dimensional integrated circuits  

E-Print Network (OSTI)

This dissertation concerns the design of circuits and systems for an emerging technology known as three-dimensional integration. By stacking individual components, dice, or whole wafers using a high-density electromechanical ...

Das, Shamik, 1977-

2004-01-01T23:59:59.000Z

263

Prospects for the development of digital CMOL circuits  

Science Conference Proceedings (OSTI)

This is a preliminary analysis of prospects and options for the development of hybrid CMOS/ nanoelectronic intergrated circuits, in particular those of the “CMOL” variety. We believe that CMOL technology is the most natural (and possibly ...

Dmitri B. Strukov; Konstantin K. Likharev

2007-10-01T23:59:59.000Z

264

Short Circuit Analysis of Induction Machines Wind Power Application  

Science Conference Proceedings (OSTI)

he short circuit behavior of Type I (fixed speed) wind turbine-generators is analyzed in this paper to aid in the protection coordination of wind plants of this type. A simple network consisting of one wind turbine-generator is analyzed for two network faults: a three phase short circuit and a phase A to ground fault. Electromagnetic transient simulations and sequence network calculations are compared for the two fault scenarios. It is found that traditional sequence network calculations give accurate results for the short circuit currents in the balanced fault case, but are inaccurate for the un-faulted phases in the unbalanced fault case. The time-current behavior of the fundamental frequency component of the short circuit currents for both fault cases are described, and found to differ significantly in the unbalanced and balanced fault cases

Starke, Michael R [ORNL; Smith, Travis M [ORNL; Howard, Dustin [Georgia Institute of Technology; Harley, Ronald [Georgia Institute of Technology

2012-01-01T23:59:59.000Z

265

Retroactivity, modularity, and insulation in synthetic biology circuits  

E-Print Network (OSTI)

A central concept in synthetic biology is the reuse of well-characterized modules. Modularity simplifies circuit design by allowing for the decomposition of systems into separate modules for individual construction. Complex ...

Lin, Allen

2011-01-01T23:59:59.000Z

266

Obstacle aware routing in 3d integrated circuits  

Science Conference Proceedings (OSTI)

Progressive scaling of technology node has serious impacts on the performance of VLSI circuits. A major influencing factor is the dominance of interconnect delay, and its associated effects such as excessive power consumption, signal integrity issues, ...

Prasun Ghosal; Hafizur Rahaman; Satrajit Das; Arindam Das; Parthasarathi Dasgupta

2011-12-01T23:59:59.000Z

267

Triple inverter pierce oscillator circuit suitable for CMOS  

SciTech Connect

An oscillator circuit is disclosed which can be formed using discrete field-effect transistors (FETs), or as a complementary metal-oxide-semiconductor (CMOS) integrated circuit. The oscillator circuit utilizes a Pierce oscillator design with three inverter stages connected in series. A feedback resistor provided in a feedback loop about a second inverter stage provides an almost ideal inverting transconductance thereby allowing high-Q operation at the resonator-controlled frequency while suppressing a parasitic oscillation frequency that is inherent in a Pierce configuration using a "standard" triple inverter for the sustaining amplifier. The oscillator circuit, which operates in a range of 10 50 MHz, has applications for use as a clock in a microprocessor and can also be used for sensor applications.

Wessendorf; Kurt O. (Albuquerque, NM)

2007-02-27T23:59:59.000Z

268

On using virtual circuits for GridFTP transfers  

Science Conference Proceedings (OSTI)

The goal of this work is to characterize scientific data transfers and to determine the suitability of dynamic virtual circuit service for these transfers instead of the currently used IP-routed service. Specifically, logs collected by servers executing ...

Z. Liu, M. Veeraraghavan, Z. Yan, C. Tracy, J. Tie, I. Foster, J. Dennis, J. Hick, Y. Li, W. Yang

2012-11-01T23:59:59.000Z

269

Energy-efficient threshold circuits computing mod functions  

Science Conference Proceedings (OSTI)

We prove that the modulus function MODm of n variables can be computed by a threshold circuit C of energy e and size s = O(e(n/m)1/(e?1)) for any integer e ? ...

Akira Suzuki, Kei Uchizawa, Xiao Zhou

2011-01-01T23:59:59.000Z

270

Real Time Models of the Asynchronous Circuits: The Delay Theory  

E-Print Network (OSTI)

The chapter from the book introduces the delay theory, whose purpose is the modeling of the asynchronous circuits from digital electrical engineering with ordinary and differential pseudo-boolean equations.

Serban E. Vlad

2004-12-17T23:59:59.000Z

271

Multisite optical neuromodulation : invention and application to emotion circuits  

E-Print Network (OSTI)

A single neural circuit, such as the network of neural populations involved in learning, expressing, and regulating fear, may spread across many brain regions and show functional heterogeneity among spatially overlapping ...

Bernstein, Jacob (Jacob Gold)

2009-01-01T23:59:59.000Z

272

Po-210 distribution in uranium-mill circuits  

SciTech Connect

Greater than 99% of all incoming Po-210 reports to the tailing piles for both the acid and the alkaline leach uranium circuits. Leached Po-210 may be carried along on small particles rather than dissolved in solution. There does not appear to be any radiologically significant buildup or accumulation in the acid leach circuit, but there are noteworthy amounts in the molybdenum recovery solution.

McKlveen, J.W.; Hubele, N.D.; McDowell, W.J.; Case, G.N.

1983-01-01T23:59:59.000Z

273

Power Circuit Breaker Lubrication: Laboratory Assessments and Lubrication Selection  

Science Conference Proceedings (OSTI)

The life cycle performance of a high voltage circuit breaker is, to a large degree, determined by the performance of the materials and components that make up the complete breaker. The rates of deterioration of components such as compressors, pumps, seals, linkages and their lubrication and interrupter elements drive the requirements for circuit breaker maintenance and refurbishment. EPRI has conducted a series of investigation to enhance knowledge of aging processes and to identify those materials ...

2012-12-13T23:59:59.000Z

274

Cooling circuit for a gas turbine bucket and tip shroud  

SciTech Connect

An open cooling circuit for a gas turbine bucket wherein the bucket has an airfoil portion, and a tip shroud, the cooling circuit including a plurality of radial cooling holes extending through the airfoil portion and communicating with an enlarged internal area within the tip shroud before exiting the tip shroud such that a cooling medium used to cool the airfoil portion is subsequently used to cool the tip shroud.

Willett, Fred Thomas (25 Long Creek Dr., Burnt Hills, NY 12027); Itzel, Gary Michael (12 Cider Mill Dr., Clifton Park, NY 12065); Stathopoulos, Dimitrios (11 Wyngate Rd., Glenmont, NY 12077); Plemmons, Larry Wayne (late of Hamilton, OH); Plemmons, Helen M. (2900 Long Ridge Trails, Hamilton, OH 45014); Lewis, Doyle C. (444 River Way, Greer, SC 29651)

2002-01-01T23:59:59.000Z

275

Circuit Breaker Lubrication: Compatibility and Selection—Laboratory Assessment  

Science Conference Proceedings (OSTI)

The performance of a circuit breaker over its lifetime is largely determined by the performance of the materials and components that make up the complete breaker. The rates of deterioration of lubricants and other components drive the requirements for circuit breaker maintenance and refurbishment. The Electric Power Research Institute (EPRI) has undertaken a comprehensive research effort to develop the knowledge base required by utilities for the correct selection and application of lubricants for ...

2013-12-19T23:59:59.000Z

276

Circuit Breaker Lubrication - Assessment of Field-Aged Bearings  

Science Conference Proceedings (OSTI)

 The life cycle performance of a high-voltage circuit breaker is, to a large degree, determined by the performance of the materials and components that make up the complete breaker. The rates of deterioration of components such as compressors, pumps, seals, linkages and their lubrication, and interrupter elements drive the requirements for circuit breaker maintenance and refurbishment. EPRI conducted a series of investigations to enhance knowledge of aging processes and to identify those ...

2012-12-14T23:59:59.000Z

277

Planning Methodology to Determine Practical Circuit Limits for Distributed Generation  

Science Conference Proceedings (OSTI)

Utility distribution planners are increasingly faced with accommodating large sizes of distributed generation (DG) on their power distribution circuits. In many states, the renewable portfolio standards and incentives from various sources have resulted in larger solar PV installations than experienced previously. These are often located in parts of the distribution circuits where voltage is more difficult to regulate. This project investigated planning methodologies for determining practical limits for D...

2010-12-31T23:59:59.000Z

278

Low Power Photomultiplier Tube Circuit And Method Thereor  

DOE Patents (OSTI)

An electrical circuit for a photomultiplier tube (PMT) is disclosed that reduces power consumption to a point where the PMT may be powered for extended periods with a battery. More specifically, the invention concerns a PMT circuit comprising a low leakage switch and a high voltage capacitor positioned between a resistive divider and each of the PMT dynodes, and a low power control scheme for recharging the capacitors.

Bochenski, Edwin B. (Tracy, CA); Skinner, Jack L. (Brentwood, CA); Dentinger, Paul M. (Sunol, CA); Lindblom, Scott C. (Tracy, CA)

2006-04-18T23:59:59.000Z

279

Circuit arrangement for starting and operating a gas discharge laser  

SciTech Connect

A circuit arrangement is described for starting and operating a gas discharge laser having a starting phase and an operating phase. It consists of two supply lines for supplying a direct current to the gas discharge laser, a ballast resistor connected in at least one of the supply lines, and circuit means in shunt with the ballast resistor through which a starting current flows during the starting phase of the gas discharge laser.

Bolhuis, P.J.

1989-04-25T23:59:59.000Z

280

Categorical Exclusion Determinations: Bonneville Power Administration |  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

September 15, 2010 September 15, 2010 CX-004876: Categorical Exclusion Determination Casa Grande-Empire (Double Circuit Upgrade) CX(s) Applied: B4.13 Date: 09/15/2010 Location(s): Pinal County, Arizona Office(s): Bonneville Power Administration September 15, 2010 CX-003906: Categorical Exclusion Determination Fiscal Year 2010 Willamette Basin Mitigation CX(s) Applied: B1.25 Date: 09/15/2010 Location(s): Eugene, Oregon Office(s): Bonneville Power Administration September 10, 2010 CX-003791: Categorical Exclusion Determination Grant Access for Filling Potholes and for Paving Existing Roadway CX(s) Applied: B1.3 Date: 09/10/2010 Location(s): Clallam County, Washington Office(s): Bonneville Power Administration September 8, 2010 CX-003908: Categorical Exclusion Determination Fiscal Year 2010 Columbia Basin Fish Accords with Colville Confederated

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


281

Modeling and simulation of substrate noise in mixed-signal circuits applied to a special VCO  

Science Conference Proceedings (OSTI)

The mixed-signal circuits with both analog and digital blocks on a single chip have wide applications in communication and RF circuits. Integrating these two blocks can cause serious problems especially in applications with fast digital circuits and ... Keywords: Green's function, VCO, mixes-signal circuits, phase noise, substrate noise

Golnar Khodabandehloo; Sattar Mirzakuchaki

2006-09-01T23:59:59.000Z

282

Circuit optimization techniques to mitigate the effects of soft errors in combinational logic  

Science Conference Proceedings (OSTI)

Soft errors in combinational logic circuits are emerging as a significant reliability problem for VLSI designs. Technology scaling trends indicate that the soft error rates (SER) of logic circuits will be dominant factor for future technology generations. ... Keywords: Soft errors, circuit optimization, combinational logic, sequential circuits

Rajeev R. Rao; Vivek Joshi; David Blaauw; Dennis Sylvester

2009-12-01T23:59:59.000Z

283

Calorimeter Preamplifier Hybrid Circuit Test Jig  

SciTech Connect

There are two ways in which the testing may be initiated, remotely or locally. If the remote operation is desired, an external TTL level signal must be provided to the test jig with the remotellocal switch on the side of the test jig switched to remote. A logic high will initiate the test. A logic low will terminate the test. In the event that an external signal is connected to the test jig while local operation occurs, the local control takes precedence over remote control. Once a DVT has been locked in the ZIF socket and the DIP switches are selected, the Push-to-Test button may be depressed. Momentarily depressing the button will initiate a test with a minimum 400 ms duration. At the same time a PBCLOCK and PBLATCH pulses will be initiated and the power rails +12V, +8V, and -6V will be ramped to full voltage. The time at which the power rails reach the full voltage is about 13 ms and it is synchronized with bypass capacitors placed on COMP input of U20 and U22 and on the output of U23 voltage regulators. The voltage rails are supplied to a {+-}10% window comparator. A red LED indicates the rail is below or above 10% of the design value. A green LED indicates the rail is within acceptable limits. For DDT with a 5 pF and 10 pF feed back capacitor, the +12V and +8V rails are current-regulated to 19rnA and 22 rnA respectively and the -6V rail is short-circuit protected within the regulator. For DUT with a 22 pF feed back capacitor the current regulation is the same as above except that the +8V rail is current regulated to 43 rnA. The power rails are supplied to the DUT via a 10 {Omega} resistor. The voltage drop across this resistor is sensed by a differential amplifier AD620 and amplified by a gain of 10. An external BNC connection is provided from this point to allow for current measurements by the vendor. The current value for each rail is calculated by measuring the voltage value at this point and divided by (10*10{Omega}). The next stage inverts and amplifies the voltage signal by a factor of 5 for + 12V and -6V rails and by a factor of 1 for +8V rail. For DUT with 22 pF feed back capacitor the amplification factors are same as above except that the amplification factor for +8V rail is a gain of 2. An offset null potentiometer is provided between the AD620 and the inverting stage which eliminates device offset current errors. The inverted and amplified voltage is presented to two window comparators. One of them compares the inverted and amplified voltage to the low threshold point and the other one compares the inverted and amplified voltage to the high threshold point. If the inverted and amplified voltage is within the low and high threshold points, both the low and the high current LEDs illuminate green indicating the current is within acceptable limits. If the inverted and amplified voltage is below the low threshold point or above the high threshold point, the low current LED or the high current LED illuminates red, respectively, indicating the current is outside acceptable limits.

Abraham, B.M.; /Fermilab

1999-04-19T23:59:59.000Z

284

Identifying the unknown circuit breaker statuses in power networks  

Science Conference Proceedings (OSTI)

This paper describes an approach by which the circuit breaker status errors can be detected and identified in the presence of analog measurement errors. This is accomplished by using the least absolute value (LAV) state estimation method and applying the previously suggested two stage estimation approach. The ability of the LAV estimators to reject inconsistent measurements, is exploited in order to differentiate between circuit breaker status and analog measurement errors. The first stage of estimation uses a bus level network model as in conventional LAV estimators. Results of Stage 1 are used to draw a set of suspect buses whose substation configurations may be erroneous. In the second stage, the identified buses are modeled in detail using the bus sections and the circuit breaker models while keeping the bus level network models for the rest of the system. The LAV estimation is repeated for the expanded system model and any remaining significant normalized residuals are flagged as bad analog measurements, while the correct topology is determined based on the estimated flows through the modeled circuit breakers in the substations. The proposed approach is implemented and tested. Simulation results for cases involving circuit breaker status and/or analog measurement errors are provided.

Abur, A.; Kim, H. [Texas A and M Univ., College Station, TX (United States). Dept. of Electrical Engineering; Celik, M.K. [Celik (Mehmet K.), San Francisco, CA (United States)

1995-11-01T23:59:59.000Z

285

Dual-circuit embossed-sheet heat-transfer panel  

DOE Patents (OSTI)

A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed for form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet.

Morgan, G.D.

1982-08-23T23:59:59.000Z

286

Students' Understanding of Direct Current Resistive Electrical Circuits  

E-Print Network (OSTI)

Research has shown that both high school and university students' reasoning patterns regarding direct current resistive electric circuits often differ from the currently accepted explanations. At present, there are no standard diagnostic examinations in electric circuits. Two versions of a diagnostic instrument called Determining and Interpreting Resistive Electric circuits Concepts Tests (DIRECT) were developed, each consisting of 29 questions. The information provided by the exam provides classroom instructors a means with which to evaluate the progress and conceptual difficulties of their students and their instructional methods. It can be used to evaluate curricular packages and/or other supplemental materials for their effectiveness in overcoming students' conceptual difficulties. The analyses indicate that students, especially females, tend to hold multiple misconceptions, even after instruction. During interviews, the idea that the battery is a constant source of current was used most often in answering the questions. Students tended to focus on current in solving the problems and to confuse terms, often assigning the properties of current to voltage and/or resistance. Results indicated that students do not have a clear understanding of the underlying mechanisms of electric circuit phenomena. On the other hand, students were able to translate easily from a "realistic" representation of a circuit to the corresponding schematic diagram.

Paula V. Engelhardt; Robert J. Beichner

2003-04-10T23:59:59.000Z

287

DSOPilot project Automatic receipt of short circuiting indicators (Smart  

Open Energy Info (EERE)

DSOPilot project Automatic receipt of short circuiting indicators (Smart DSOPilot project Automatic receipt of short circuiting indicators (Smart Grid Project) Jump to: navigation, search Project Name DSOPilot project Automatic receipt of short circuiting indicators Country Denmark Coordinates 56.26392°, 9.501785° Loading map... {"minzoom":false,"mappingservice":"googlemaps3","type":"ROADMAP","zoom":14,"types":["ROADMAP","SATELLITE","HYBRID","TERRAIN"],"geoservice":"google","maxzoom":false,"width":"600px","height":"350px","centre":false,"title":"","label":"","icon":"","visitedicon":"","lines":[],"polygons":[],"circles":[],"rectangles":[],"copycoords":false,"static":false,"wmsoverlay":"","layers":[],"controls":["pan","zoom","type","scale","streetview"],"zoomstyle":"DEFAULT","typestyle":"DEFAULT","autoinfowindows":false,"kml":[],"gkml":[],"fusiontables":[],"resizable":false,"tilt":0,"kmlrezoom":false,"poi":true,"imageoverlays":[],"markercluster":false,"searchmarkers":"","locations":[{"text":"","title":"","link":null,"lat":56.26392,"lon":9.501785,"alt":0,"address":"","icon":"","group":"","inlineLabel":"","visitedicon":""}]}

288

Field tests of a circuit breaker synchronous control  

Science Conference Proceedings (OSTI)

A circuit breaker synchronous control interface which controls the point-on-wave at which shunt reactor circuit breakers open or close has been developed and tested on Hydro-Quebec`s 735-kV power system. It takes into account the influence of outdoor temperature on the breaker closing and opening times. It is also equipped with a reignition and a high-inrush-current detection system. Opening tests at different preset arcing times were conducted and the arcing time range where there are no re-ignitions in air-blast breakers was established. The tests showed that the interface is a valuable device for the elimination of re-ignitions associated with the interruption of small inductive currents. Closing tests have shown that the interface is also useful for the limitation of high inrush currents by selecting an appropriate point-on-wave for circuit breaker closing.

Rajotte, R.J.; Charpentier, C.; Breault, S.; Le, H.H.; Huynh, H. [Hydro-Quebec, Montreal, Quebec (Canada); Desmarais, J. [Snemo Ltd., Brossard, Quebec (Canada)

1995-07-01T23:59:59.000Z

289

A Double Smoothing Technique for Constrained Convex ...  

E-Print Network (OSTI)

In this paper, we propose an efficient approach for solving a class of convex opti- ... accelerate our scheme, we introduce a novel double smoothing technique ...

290

Micromegas readouts for double beta decay searches  

E-Print Network (OSTI)

Double beta $\\beta\\beta$ decay experiments are one of the most active research topics in Neutrino Physics. The measurement of the neutrinoless mode $0\

Cebrián, S; Ferrer-Ribas, E; Galán, J; García, J A; Giomataris, I; Gómez, H; Herrera, D C; Iguaz, F J; Irastorza, I G; Luzón, G; Rodríguez, A; Seguí, L; Tomás, A

2010-01-01T23:59:59.000Z

291

Micromegas readouts for double beta decay searches  

E-Print Network (OSTI)

Double beta $\\beta\\beta$ decay experiments are one of the most active research topics in Neutrino Physics. The measurement of the neutrinoless mode $0\

S. Cebrián; T. Dafni; E. Ferrer-Ribas; J. Galán; J. A. García; I. Giomataris; H. Gómez; D. C. Herrera; F. J. Iguaz; I. G. Irastorza; G. Luzón; A. Rodríguez; L. Seguí; A. Tomás

2010-09-09T23:59:59.000Z

292

Double Patenting--One Patent per Invention  

Science Conference Proceedings (OSTI)

Double Patenting—One Patent per Invention. Arnold B. Silverman. Patent claims recite the scope of protection provided by a patent. The Patent Statute ...

293

Double perovskite catalysts for oxidative coupling  

DOE Patents (OSTI)

Alkali metal doped double perovskites containing manganese and at least one of cobalt, iron and nickel are useful in the oxidative coupling of alkane to higher hydrocarbons.

Campbell, K.D.

1991-01-01T23:59:59.000Z

294

Kernridge project does double duty  

SciTech Connect

The huge volume of steam that Kernridge Oil Co. generates to increase production of heavy crude oil from California's South Belridge field may do double duty. The company, a subsidiary of Shell Oil Co., is in the planning stages with a cogeneration project that would produce enough electricity to meet the electric needs of a community of more than 200,000 people. Meanwhile, Kernridge continues to exceed projections used in the acquisition assessment for the former Belridge Oil Co. properties which the Kernridge parent, Shell, bought in December 1979. The company formed Kernridge early in 1980 to operate the former Belridge properties. Since taking over, Kernridge has pursued development aggressively and has increased production to 65,000 bopd from the previous owner's 42,000 bopd.

Not Available

1981-10-01T23:59:59.000Z

295

Case Studies on Variation Tolerant and Low Power Design Using Planar Asymmetric Double Gate Transistor  

E-Print Network (OSTI)

In nanometer technologies, process variation control and low power have emerged as the first order design goal after high performance. Process variations cause high variability in performance and power consumption of an IC, which affects the overall yield. Short channel effects (SCEs) deteriorate the MOSFET performance and lead to higher leakage power. Double gate devices suppress SCEs and are potential candidates for replacing Bulk technology in nanometer nodes. Threshold voltage control in planar asymmetric double gate transistor (IGFET) using a fourth terminal provides an effective means of combating process variations and low power design. In this thesis, using various case studies, we analyzed the suitability of IGFET for variation control and low power design. We also performed an extensive comparison between IGFET and Bulk for reducing variability, improving yield and leakage power reduction using power gating. We also proposed a new circuit topology for IGFET, which on average shows 33.8 percent lower leakage and 34.9 percent lower area at the cost of 2.8 percent increase in total active mode power, for basic logic gates. Finally, we showed a technique for reducing leakage of minimum sized devices designed using new circuit topology for IGFET.

Singh, Amrinder

2010-08-01T23:59:59.000Z

296

Residue arithmetic circuit design based on integrated optics  

SciTech Connect

Hybrid circuits containing integrated optical detectors, waveguides, and electro-optic switches can be used to perform a variety of digital logic operations. In combining the hybrid circuits with the carry-free residue arithmetic algorithm, different modules are designed to perform basic arithmetic operations, encoding, decoding, and scaling. Based on pipelining and parallel concepts, a vector-vector multiplier is designed to yield very high throughput rate for application involving traditionally slow computation such as matrix-vector multiplication and polynomial evaluation. 18 references.

Huang, S.Y.; Lee, S.H.

1982-01-01T23:59:59.000Z

297

Tunable single-photon heat conduction in electrical circuits  

E-Print Network (OSTI)

We build on the study of single-photon heat conduction in electronic circuits taking into account the back-action of the superconductor--insulator--normal-metal thermometers. In addition, we show that placing capacitors, resistors, and superconducting quantum interference devices (SQUIDs) into a microwave cavity can severely distort the spatial current profile which, in general, should be accounted for in circuit design. The introduction of SQUIDs also allows for in situ tuning of the photonic power transfer which could be utilized in experiments on superconducting quantum bits.

P. J. Jones; J. A. M. Huhtamäki; M. Partanen; K. Y. Tan; M. Möttönen

2012-05-21T23:59:59.000Z

298

Generating efficient quantum circuits for preparing maximally multipartite entangled states  

E-Print Network (OSTI)

In this work we provide a method for generating quantum circuits preparing maximally multipartite entangled states using genetic programming. The presented method is faster that known realisations thanks to the applied fitness function and several modifications to the genetic programming schema. Moreover, we enrich the described method by the unique possibility to define an arbitrary structure of a system. We use the developed method to find new quantum circuits, which are simpler from known results. We also analyse the efficiency of generating entanglement in the spin chain system and in the system of complete connections.

Przemys?aw Sadowski

2013-03-15T23:59:59.000Z

299

Transistorized power switch and base drive circuit therefore  

DOE Green Energy (OSTI)

A high power switching circuit is disclosed which utilizes a four-terminal Darlington transistor block to improve switching speed, particularly in rapid turn-off. Two independent reverse drive currents are utilized during turn-off in order to expel the minority carriers of the Darlington pair at their own charge sweep-out rate. The reverse drive current may be provided by a current transformer, the secondary of which is tapped to the base terminal of the power stage of the Darlington block. In one application, the switching circuit is used in each power switching element in a chopper-inverter drive of an electric vehicle propulsion system.

Lee, F.C.; Carter, R.A.

1981-03-24T23:59:59.000Z

300

Automated Load Balancing of Medium-Voltage Distribution Circuits  

Science Conference Proceedings (OSTI)

The objective of this project is to investigate the possibility of using an automated system to maintain optimal load balance in distribution circuits. The practice used by many utilities is to use a line crew and engineering personnel to measure load balance at key points in each circuit and manually move single-phase lateral taps to different phases to obtain the desired load balance among the phases. This practice has many shortcomings: The load balance is achieved only for a single point in ...

2013-03-21T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


301

Asymptotic Expressions for Charge Matrix Elements of the Fluxonium Circuit  

E-Print Network (OSTI)

In charge-coupled circuit QED systems, transition amplitudes and dispersive shifts are governed by the matrix elements of the charge operator. For the fluxonium circuit, these matrix elements are not limited to nearest-neighbor energy levels and are conveniently tunable by magnetic flux. Previously, their values were largely obtained numerically. Here, we present analytical expressions for the fluxonium charge matrix elements. We show that new selection rules emerge in the asymptotic limit of large Josephson energy and small inductive energy. We illustrate the usefulness of our expressions for the qualitative understanding of charge matrix elements in the parameter regime probed by previous experiments.

Zhu, Guanyu

2013-01-01T23:59:59.000Z

302

Detecting non-Abelian geometric phase in circuit QED  

E-Print Network (OSTI)

We propose a scheme for detecting noncommutative feature of the non-Abelian geometric phase in circuit QED, which involves three transmon qubits capacitively coupled to an one-dimensional transmission line resonator. By controlling the external magnetic flux of the transmon qubits, we can obtain an effective tripod interaction of our circuit QED setup. The noncommutative feature of the non-Abelian geometric phase is manifested that for an initial state undergo two specific loops in different order will result in different final states. Our numerical calculations show that this difference can be unambiguously detected in the proposed system.

Man-Lv Peng; Jian Zhou; Zheng-Yuan Xue

2013-03-03T23:59:59.000Z

303

Base drive circuit for a four-terminal power Darlington  

DOE Patents (OSTI)

A high power switching circuit which utilizes a four-terminal Darlington transistor block to improve switching speed, particularly in rapid turn-off. Two independent reverse drive currents are utilized during turn off in order to expel the minority carriers of the Darlington pair at their own charge sweep-out rate. The reverse drive current may be provided by a current transformer, the secondary of which is tapped to the base terminal of the power stage of the Darlington block. In one application, the switching circuit is used in each power switching element in a chopper-inverter drive of an electric vehicle propulsion system.

Lee, Fred C. (Blacksburg, VA); Carter, Roy A. (Salem, VA)

1983-01-01T23:59:59.000Z

304

Microwave and millimeter-wave rectifying circuit arrays and ultra-wideband antennas for wireless power transmission and communications  

E-Print Network (OSTI)

In the future, space solar power transmission and wireless power transmission will play an important role in gathering clean and infinite energy from space. The rectenna, i.e., a rectifying circuit combined with an antenna, is one of the most important components in the wireless power transmission system. To obtain high power and high output voltage, the use of a large rectenna array is necessary. Many novel rectennas and rectenna arrays for microwave and millimeter-wave wireless power transmission have been developed. Unlike the traditional rectifying circuit using a single diode, dual diodes are used to double the DC output voltage with the same circuit layout dimensions. The rectenna components are then combined to form rectenna arrays using different interconnections. The rectennas and the arrays are analyzed by using a linear circuit model. Furthermore, to precisely align the mainbeams of the transmitter and the receiver, a retrodirective array is developed to maintain high efficiency. The retrodirective array is able to track the incident wave and resend the signal to where it came from without any prior known information of the source location. The ultra-wideband radio has become one of the most important communication systems because of demand for high data-rate transmission. Hence, ultra-wideband antennas have received much attention in mobile wireless communications. Planar monopole ultra-wideband antennas for UHF, microwave, and millimeter-wave bands are developed, with many advantages such as simple structure, low cost, light weight, and ease of fabrication. Due to the planar structures, the ultra-wideband antennas can be easily integrated with other circuits. On the other hand, with an ultra-wide bandwidth, source power can be transmitted at different frequencies dependent on power availability. Furthermore, the ultra-wideband antenna can potentially handle wireless power transmission and data communications simultaneously. The technologies developed can also be applied to dual-frequency or the multi-frequency antennas. In this dissertation, many new rectenna arrays, retrodirective rectenna arrays, and ultra-wideband antennas are presented for microwave and millimeter-wave applications. The technologies are not only very useful for wireless power transmission and communication systems, but also they could have many applications in future radar, surveillance, and remote sensing systems.

Ren, Yu-Jiun

2007-05-01T23:59:59.000Z

305

Improved double planar probe data analysis technique  

Science Conference Proceedings (OSTI)

Plasma electron number density and ion number density in a dc multidipole weakly collisional Ar plasma are measured with a single planar Langmuir probe and a double planar probe, respectively. A factor of two discrepancy between the two density measurements is resolved by applying Sheridan's empirical formula [T. E. Sheridan, Phys. Plasmas 7, 3084 (2000)] for sheath expansion to the double probe data.

Ghim, Young-chul; Hershkowitz, Noah [Department of Engineering Physics, University of Wisconsin-Madison, Madison, Wisconsin 53706 (United States)

2009-03-15T23:59:59.000Z

306

Double bevel construction of a diamond anvil  

DOE Patents (OSTI)

A double or multiple bevel culet geometry is used on a diamond anvil in a high pressure cell apparatus to provide increased sample pressure and stability for a given force applied to the diamond tables. Double or multiple bevel culet geometries can also be used for sapphire or other hard crystal anvils. Pressures up to and above 5 Megabars can be reached. 8 figs.

Moss, W.C.

1988-10-11T23:59:59.000Z

307

Analog Baseband Circuits for WCDMA Direct-Conversion Receivers  

E-Print Network (OSTI)

This thesis describes the design and implementation of analog baseband circuits for low-power single-chip WCDMA direct-conversion receivers. The reference radio system throughout the thesis is UTRA/FDD. The analog baseband circuit consists of two similar channels, which contain analog channel-select filters, programmable-gain amplifiers, and circuits that remove DC offsets. The direct-conversion architecture is described and the UTRA/FDD system characteristics are summarized. The UTRA/FDD specifications define the performance requirement for the whole receiver. Therefore, the specifications for the analog baseband circuit are obtained from the receiver requirements through calculations performed by hand. When the power dissipation of an UTRA/FDD direct-conversion receiver is minimized, the design parameters of an all-pole analog channel-select filter and the following Nyquist rate analog-to-digital converter must be considered simultaneously. In this thesis, it is shown that minimum power consumption is achieved with a fifth-order lowpass filter and a 15.36-MS/s Nyquist rate converter that has a 7- or 8-bit resolution. A fifth-order Chebyshev prototype with a passband ripple of 0.01dB and a –3-dB frequency of 1.92-MHz is adopted in this thesis. The

Jarkko Jussila; Teknillinen Korkeakoulu; Otamedia Oy

2003-01-01T23:59:59.000Z

308

Notes on Magnetic Circuits ME 104, Prof. B. Paden  

E-Print Network (OSTI)

, on the terminals of the inductor. The current induces a field H (that has various names) and a magnetic field B-clockwise, the direction of flux when there is a positive current. To understand this magnetic circuit, we derive of current is out of the page and the positive sense for the magnetic field is given by the right-hand rule

Paden, Brad

309

Demodulation circuit for AC motor current spectral analysis  

DOE Patents (OSTI)

A motor current analysis method for the remote, noninvasive inspection of electric motor-operated systems. Synchronous amplitude demodulation and phase demodulation circuits are used singly and in combination along with a frequency analyzer to produce improved spectral analysis of load-induced frequencies present in the electric current flowing in a motor-driven system.

Hendrix, Donald E. (Oak Ridge, TN); Smith, Stephen F. (Knoxville, TN)

1990-12-18T23:59:59.000Z

310

Addressing thermal and power delivery bottlenecks in 3D circuits  

Science Conference Proceedings (OSTI)

The enhanced packing densities facilitated by 3D integrated circuit technology also has an unwanted side-effect, in the form of increasing the amount of current per unit footprint of the chip, as compared to a 2D design. This has ramifications on two ...

Sachin S. Sapatnekar

2009-01-01T23:59:59.000Z

311

An Experimental Study of Circuit Breakers: The Effect  

E-Print Network (OSTI)

Abstract: This paper analyzes the effect of circuit breakers on price behavior, trading volume, and profit-making ability in a market setting. We conduct nine experimental asset markets to compare behavior across three regulatory regimes: market closure, temporary halt, and no interruption. The presence of a circuit breaker rule does not affect the magnitude of the absolute deviation in price from fundamental value or trading profit. The primary driver of behavior is information asymmetry in the market. By comparison, trading activity is significantly affected by the presence of a circuit breaker. Mandated market closures cause market participants to advance trades. JEL classification: D40, G10, G14 Key words: circuit breakers, trading halts, market structure The authors thank the Federal Reserve Bank of Atlanta for financial support, Kendra Hiscox for valuable research assistance, and Jin-Wan Cho, Jerry Dwyer, Kalpana Narayanan, Joe Sinkey, and seminar participants at Georgia Tech and the Atlanta Finance Workshop for helpful comments. The views expressed here are the authors ’ and not necessarily those of the Federal Reserve Bank of Atlanta or the Federal Reserve System. Any remaining errors are

Lucy F. Ackert; Bryan K. Church; Narayanan Jayaraman

1999-01-01T23:59:59.000Z

312

Application of computers to circuit design for Univac Larc  

Science Conference Proceedings (OSTI)

The design of circuits for computers has become in recent years a complex undertaking. The problem is two-fold. On one hand optimization of cost and speed is the prime objective. On the other hand, complexity is increased through factors such as component ...

Gilbert Kaskey; Noah S. Prywes; Herman Lukoff

1961-05-01T23:59:59.000Z

313

Integrated circuit with dissipative layer for photogenerated carriers  

DOE Patents (OSTI)

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Myers, D.R.

1989-09-12T23:59:59.000Z

314

Performance of digital integrated circuit technologies at very high temperatures  

Science Conference Proceedings (OSTI)

Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

1980-01-01T23:59:59.000Z

315

Conveyorized Photoresist Stripping Replacement for Flex Circuit Fabrication  

SciTech Connect

A replacement conveyorized photoresist stripping system was characterized to replace the ASI photoresist stripping system. This system uses the qualified ADF-25c chemistry for the fabrication of flex circuits, while the ASI uses the qualified potassium hydroxide chemistry. The stripping process removes photoresist, which is used to protect the copper traces being formed during the etch process.

Megan Donahue

2009-02-24T23:59:59.000Z

316

Evolutionary algorithms for the physical design of VLSI circuits  

Science Conference Proceedings (OSTI)

Electronic design automation (EDA) is concerned with the design and production of VLSI systems. One of the important steps in creating a VLSI circuit is physical design. The input to the physical design step is a logical representation of the system ...

James Cohoon; John Karro; Jens Lienig

2003-01-01T23:59:59.000Z

317

Analog circuit test based on a digital signature  

Science Conference Proceedings (OSTI)

Production verification of analog circuit specifications is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost on-chip parameter verification based on the analysis of a digital ... Keywords: mixed-signal test, monitoring, nonlinear zone boundary, specification verification

A. Gómez; R. Sanahuja; L. Balado; J. Figueras

2010-03-01T23:59:59.000Z

318

Adaptive cooling of integrated circuits using digital microfluidics  

Science Conference Proceedings (OSTI)

Thermal management is critical for integrated circuit (IC) design. With each new IC technology generation, feature sizes decrease, while operating speeds and package densities increase. These factors contribute to elevated die temperatures detrimental ... Keywords: adaptive cooling, chip cooling, digital microfluidics, electrowetting, hot-spot cooling, microfluidics

Philip Y. Paik; Vamsee K. Pamula; Krishnendu Chakrabarty

2008-04-01T23:59:59.000Z

319

Controllability of Static CMOS Circuits for Timing Characterization  

Science Conference Proceedings (OSTI)

Timing violations, also known as delay faults, are a major source of defective silicon in modern Integrated Circuits (ICs), designed in Deep Sub-micron (DSM) technologies, making it imperative to perform delay fault testing in these ICs. However, DSM ... Keywords: Delay fault testing, Design for test, Scan design

Ramyanshu Datta; Ravi Gupta; Antony Sebastine; Jacob A. Abraham; Manuel D'Abreu

2008-10-01T23:59:59.000Z

320

Integrated circuit with dissipative layer for photogenerated carriers  

DOE Patents (OSTI)

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissipative layer of silicon nitride between a silicon substrate and the active device. Free carriers generated in the substrate are dissipated by the layer before they can build up charge on the active device. 1 fig.

Myers, D.R.

1988-04-20T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


321

Integrated circuit with dissipative layer for photogenerated carriers  

DOE Patents (OSTI)

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Myers, David R. (Albuquerque, NM)

1989-01-01T23:59:59.000Z

322

Post-silicon power mapping techniques for integrated circuits  

Science Conference Proceedings (OSTI)

We propose a new methodology for post-silicon power validation using the captured thermal infrared emissions from the back-side of operational integrated circuits. We first identify the challenges associated with thermal to power inversion, and then ... Keywords: Infrared imaging, Post-silicon validation, Power analysis, Power mapping

Sherief Reda; Abdullah N. Nowroz; Ryan Cochran; Stefan Angelevski

2013-01-01T23:59:59.000Z

323

Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits  

Science Conference Proceedings (OSTI)

Operating frequencies of combinational logic circuits can be increased using Wave-Pipelining (WP), by adjusting the clock periods and clock skews. In this article, Built-In Self-Test (BIST) and System-on-Chip (SOC) approaches are proposed for automating ... Keywords: CORDIC, DAA, FPGA, SOC, pipelining, wave-pipelining

G. Seetharaman; B. Venkataramani

2009-06-01T23:59:59.000Z

324

Compensated count-rate circuit for radiation survey meter  

DOE Patents (OSTI)

A count-rate compensating circuit is provided which may be used in a portable Geiger-Mueller (G-M) survey meter to ideally compensate for couting loss errors in the G-M tube detector. In a G-M survey meter, wherein the pulse rate from the G-M tube is converted into a pulse rate current applied to a current meter calibrated to indicate dose rate, the compensation circuit generates and controls a reference voltage in response to the rate of pulses from the detector. This reference voltage is gated to the current-generating circuit at a rate identical to the rate of pulses coming from the detector so that the current flowing through the meter is varied in accordance with both the frequency and amplitude of the reference voltage pulses applied thereto so that the count rate is compensated ideally to indicate a true count rate within 1% up to a 50% duty cycle for the detector. A positive feedback circuit is used to control the reference voltage so that the meter output tracks true count rate indicative of the radiation dose rate.

Todd, R.A.

1980-05-12T23:59:59.000Z

325

Reliability Estimation for Double Containment Piping  

Science Conference Proceedings (OSTI)

Double walled or double containment piping is considered for use in the ITER international project and other next-generation fusion device designs to provide an extra barrier for tritium gas and other radioactive materials. The extra barrier improves confinement of these materials and enhances safety of the facility. This paper describes some of the design challenges in designing double containment piping systems. There is also a brief review of a few operating experiences of double walled piping used with hazardous chemicals in different industries. This paper recommends approaches for the reliability analyst to use to quantify leakage from a double containment piping system in conceptual and more advanced designs. The paper also cites quantitative data that can be used to support such reliability analyses.

L. Cadwallader; T. Pinna

2012-08-01T23:59:59.000Z

326

Design as you see FIT: system-level soft error analysis of sequential circuits  

Science Conference Proceedings (OSTI)

Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardening have been proposed to synthesize circuits that are tolerant to soft ...

Daniel Holcomb; Wenchao Li; Sanjit A. Seshia

2009-04-01T23:59:59.000Z

327

A retrofit 60 Hz current sensor for non-intrusive power monitoring at the circuit breaker  

E-Print Network (OSTI)

We present a new sensor for power monitoring that measures current flow in a circuit breaker without permanent modification of the breaker panel or the circuit breaker itself. The sensor consists of three parts: an inductive ...

Clifford, Zachary

328

A retrot current sensor for non-intrusive power monitoring at the circuit breaker  

E-Print Network (OSTI)

This thesis presents a new sensor for power monitoring that measures current flow in a circuit breaker without permanent modification of the breaker panel or the circuit breaker itself. At the breaker panel, an inductive ...

Vickery, Daniel Robert

2011-01-01T23:59:59.000Z

329

Experimental evidence for vibrational resonance and enhanced signal transmission in Chua's circuit  

E-Print Network (OSTI)

We consider a single Chua's circuit and a system of a unidirectionally coupled n-Chua's circuits driven by a biharmonic signal with two widely different frequencies \\omega and \\Omega, where \\Omega >> \\omega. We show experimental evidence for vibrational resonance in the single Chua's circuit and undamped signal propagation of a low-frequency signal in the system of n-coupled Chua's circuits where only the first circuit is driven by the biharmonic signal. In the single circuit, we illustrate the mechanism of vibrational resonance and the influence of the biharmonic signal parameters on the resonance. In the n(= 75)-coupled Chua's circuits enhanced propagation of low-frequency signal is found to occur for a wide range of values of the amplitude of the high-frequency input signal and coupling parameter. The response amplitude of the ith circuit increases with i and attains a saturation. Moreover, the unidirectional coupling is found to act as a low-pass filter.

R. Jothimurugan; K. Thamilmaran; S. Rajasekar; M. A. F. Sanjuan

2013-08-12T23:59:59.000Z

330

Injection compression modeling of non-linear positive temperature coefficient circuit protection devices  

E-Print Network (OSTI)

Polymeric self-resettable circuit protection devices have been manufactured for many years with an extrusion based process. These devices add negligible resistance to a circuit at normal power operating conditions but ...

Hardy, Joseph T., 1978-

2005-01-01T23:59:59.000Z

331

Transmission Line Inspires A New Distributed Algorithm to Solve the Nonlinear Dynamical System of Physical Circuit  

E-Print Network (OSTI)

As known, physical circuits, e.g. integrated circuits or power system, work in a distributed manner, but these circuits could not be easily simulated in a distributed way. This is mainly because that the dynamical system of physical circuits is nonlinear and the linearized system of physical circuits is non-symmetrical. This paper proposes a simple and natural strategy to simulate the physical circuit in parallel, by mimicking the internal wires or interconnects inside the circuits by distributed numerical algorithm. Mimic Transmission Method (MTM) is a new distributed numerical algorithm to solve the nonlinear ordinary differential equations extracted from physical circuits. It maps the transmission delay of interconnects between subcircuits to the communication delay of digital data link between processors. MTM is not a global iterative algorithm, and it does only one distributed computation at each time window to obtain accurate result, so unconvergence issues do not need to be worried about.

Wei, Fei

2010-01-01T23:59:59.000Z

332

Global Circuit Response to Seasonal Variations in Global Surface Air Temperature  

Science Conference Proceedings (OSTI)

Comparisons are made between the seasonal behavior of the global electrical circuit and the surface air temperature for the Tropics and for the globe. Positive correlations between global circuit parameters and temperature are identified on both ...

Earle R. Williams

1994-08-01T23:59:59.000Z

333

A pragmatic approach to integrated process/device/circuit simulation for IC technology development  

Science Conference Proceedings (OSTI)

A novel approach to integrated process/device/circuit simulation is proposed which allows pragmatic, computationally efficient IC technology CAD at the mixed-mode device/circuit level. The approach is demonstrated with a simulation system for advanced ...

K. R. Green; J. G. Fossum

2006-11-01T23:59:59.000Z

334

Design and test rules for CMOS circuits to facilitate IDDQ testing of bridging faults  

Science Conference Proceedings (OSTI)

All possible bridging faults (BFs) between any two circuit nodes are considered, where a circuit node may be the drain, source, or gate terminal of a transistor. Several examples are given to show that under certain circumstances current supply monitoring ...

K. -J. Lee; M. A. Breuer

2006-11-01T23:59:59.000Z

335

Equivalent electric circuit modeling of differential structures in PCB with genetic algorithm  

Science Conference Proceedings (OSTI)

This paper introduces an equivalent circuit extraction technique for differential structures using a hybrid genetic algorithm. The procedure searches for the proper parameters of lumped circuit elements to fit the scattering parameters which can be obtained ...

Jong Kang Park; Yong Ki Byun; Jong Tae Kim

2006-10-01T23:59:59.000Z

336

A batteryless thermoelectric energy-harvesting interface circuit with 35mV startup voltage  

E-Print Network (OSTI)

A batteryless thermoelectric energy-harvesting interface circuit to extract electrical energy from human body heat is implemented in a 0.35 ?m [mu m] CMOS process. A mechanically assisted startup circuit enables operation ...

Ramadass, Yogesh Kumar

337

A graph grammar based approach to automated multi-objective analog circuit design  

Science Conference Proceedings (OSTI)

This paper introduces a graph grammar based approach to automated topology synthesis of analog circuits. A grammar is developed to generate circuits through production rules, that are encoded in the form of a derivation tree. The synthesis has been sped ...

Angan Das; Ranga Vemuri

2009-04-01T23:59:59.000Z

338

Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering  

Science Conference Proceedings (OSTI)

This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the linear dependencies between circuit performances and design parameters. ...

Simona Doboli; Gaurav Gothoskar; Alex Doboli

2003-03-01T23:59:59.000Z

339

Particle sorter comprising a fluid displacer in a closed-loop fluid circuit  

SciTech Connect

Disclosed herein are methods and devices utilizing a fluid displacer in a closed-loop fluid circuit.

Perroud, Thomas D. (San Jose, CA); Patel, Kamlesh D. (Dublin, CA); Renzi, Ronald F. (Tracy, CA)

2012-04-24T23:59:59.000Z

340

User`s guide and physics manual for the SCATPlus circuit code  

SciTech Connect

ScatPlus is a user friendly circuit code and an expandable library of circuit models for electrical components and devices; it can be used to predict the transient behavior in electric circuits. The heart of ScatPlus is the transient circuit solver SCAT written in 1986 by R.F. Gribble. This manual includes system requirements, physics manual, ScatPlus component library, tutorial, ScatPlus screen, menus and toolbar, ScatPlus tool bar, procedures.

Yapuncich, M.L.; Deninger, W.J.; Gribble, R.F.

1994-05-09T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


341

Field Guide: Lubrication of High-Voltage Circuit Breakers - 2013 Update  

Science Conference Proceedings (OSTI)

High-voltage circuit breakers (HVCBs) perform essential protection and control functions on power transmission networks. Circuit breaker mechanisms have multiple components that must operate in concert in order for the breaker to perform properly. If one component does not operate correctly, the circuit breaker may mis-operate or fail. A circuit breaker mis-operation may cause equipment damage and outages—both expensive consequences. Proper lubrication ...

2013-12-19T23:59:59.000Z

342

A New Operational Tests Circuit for Testing ±660kV UHVDC Thyristor Valves  

Science Conference Proceedings (OSTI)

Operational test is an important measure which can guarantee safe and stable operation of UHVDC thyristor valves. HVDC thyristor modules can be performed either in a six-pulse back-to-back test circuit or in a synthetic test circuit. UHVDC thyristor ... Keywords: HVDC thyristor valve, operational tests, synthetic test circuit

Ting Xie; Tang Guang-fu; Zha Kun-peng; Gao Chong

2010-06-01T23:59:59.000Z

343

A SVDD approach of fuzzy classification for analog circuit fault diagnosis with FWT as preprocessor  

Science Conference Proceedings (OSTI)

In this paper, a new approach of fault diagnosis in analog circuits, which employs the Fractional Wavelet Transform (FWT) to extract fault features and adopts a fuzzy multi-classifier based on the Support Vector Data Description (SVDD) to diagnose circuit ... Keywords: Analog circuit, Fault diagnosis, Feature extraction, Fractional wavelet transform, KFCM, SVDD

Hui Luo; Youren Wang, Jiang Cui

2011-08-01T23:59:59.000Z

344

Integrated circuit implementation of multi-dimensional piecewise-linear functions  

Science Conference Proceedings (OSTI)

In this paper we present an integrated circuit implementing piecewise-linear (PWL) functions with three inputs, where each input can be either analog or digital. The PWL function to be implemented can be chosen by properly storing a set of coefficients ... Keywords: Embedded, Integrated circuit, Nonlinear circuit, Piecewise-linear

Martin Di Federico; Tomaso Poggi; Pedro Julián; Marco Storace

2010-12-01T23:59:59.000Z

345

The analysis of circuit breakers kinematics characteristics using the artificial neural networks  

Science Conference Proceedings (OSTI)

The paper presents the required parameters in the evaluation of the technical state for the High Voltage (HV) circuit breakers. It details some aspects regarding the influence of the kinematics characteristics to the circuit breakers performances. Also, ... Keywords: artificial neural network, circuit breaker, diagnostic, kinematics characteristics, modelling and simulation, monitoring

Maricel Adam; Adrian Baraboi; Catalin Pancu; Sorin Pispiris

2009-02-01T23:59:59.000Z

346

A novel piezoelectric energy harvester designed for single-supply pre-biasing circuit  

E-Print Network (OSTI)

A novel piezoelectric energy harvester designed for single- supply pre-biasing circuit N Mohammad printed piezoelectric energy harvester for the single-supply pre-biasing (SSPB) circuit is presented that the single-supply pre-biasing (SSPB) circuit is the most suitable for low amplitude energy harvesting

347

Simulation-based automatic generation of signomial and posynomial performance models for analog integrated circuit sizing  

Science Conference Proceedings (OSTI)

This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enable the use of efficient geometric programming techniques for circuit sizing ... Keywords: analog circuit modeling, design of experiments, geometric programming, posynomial and signomial response surface modeling

Walter Daems; Georges Gielen; Willy Sansen

2001-11-01T23:59:59.000Z

348

T-686: IBM Tivoli Integrated Portal Java Double Literal Denial...  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

686: IBM Tivoli Integrated Portal Java Double Literal Denial of Service Vulnerability T-686: IBM Tivoli Integrated Portal Java Double Literal Denial of Service Vulnerability August...

349

Superconducting Circuits for Quantum Simulation of Dynamical Gauge Fields  

E-Print Network (OSTI)

We describe a superconducting-circuit lattice design for the implementation and simulation of dynamical lattice gauge theories. We illustrate our proposal by analyzing a one-dimensional U(1) quantum-link model, where superconducting qubits play the role of matter fields on the lattice sites and the gauge fields are represented by two coupled microwave resonators on each link between neighboring sites. A detailed analysis of a minimal experimental protocol for probing the physics related to string breaking effects shows that despite the presence of decoherence in these systems, distinctive phenomena from condensed-matter and high-energy physics can be visualized with state-of-the-art technology in small superconducting-circuit arrays.

D. Marcos; P. Rabl; E. Rico; P. Zoller

2013-06-07T23:59:59.000Z

350

Prospects for Strong Cavity Quantum Electrodynamics with Superconducting Circuits  

E-Print Network (OSTI)

We propose a realizable architecture using one-dimensional transmission line resonators to reach the strong coupling limit of cavity quantum electrodynamics in superconducting electrical circuits. The vacuum Rabi frequency for the coupling of cavity photons to quantized excitations of an adjacent electrical circuit (qubit) can easily exceed the damping rates of both the cavity and the qubit. This architecture is attractive for quantum computing and control, since it provides strong inhibition of spontaneous emission, potentially leading to greatly enhanced qubit lifetimes, allows high-fidelity quantum non-demolition measurements of the state of multiple qubits, and has a natural mechanism for entanglement of qubits separated by centimeter distances. In addition it would allow production of microwave photon states of fundamental importance for quantum communication.

S. M. Girvin; Ren-Shou Huang; Alexandre Blais; Andreas Wallraff; R. J. Schoelkopf

2003-10-28T23:59:59.000Z

351

Declarative Combinatorics: Boolean Functions, Circuit Synthesis and BDDs in Haskell  

E-Print Network (OSTI)

We describe Haskell implementations of interesting combinatorial generation algorithms with focus on boolean functions and logic circuit representations. First, a complete exact combinational logic circuit synthesizer is described as a combination of catamorphisms and anamorphisms. Using pairing and unpairing functions on natural number representations of truth tables, we derive an encoding for Binary Decision Diagrams (BDDs) with the unique property that its boolean evaluation faithfully mimics its structural conversion to a a natural number through recursive application of a matching pairing function. We then use this result to derive ranking and unranking functions for BDDs and reduced BDDs. Finally, a generalization of the encoding techniques to Multi-Terminal BDDs is provided. The paper is organized as a self-contained literate Haskell program, available at http://logic.csci.unt.edu/tarau/research/2008/fBDD.zip . Keywords: exact combinational logic synthesis, binary decision diagrams, encodings of boolea...

Tarau, Paul

2008-01-01T23:59:59.000Z

352

Methods for improving solar cell open circuit voltage  

DOE Patents (OSTI)

A method for producing a solar cell having an increased open circuit voltage. A layer of cadmium sulfide (CdS) produced by a chemical spray technique and having residual chlorides is exposed to a flow of hydrogen sulfide (H.sub.2 S) heated to a temperature of 400.degree.-600.degree. C. The residual chlorides are reduced and any remaining CdCl.sub.2 is converted to CdS. A heterojunction is formed over the CdS and electrodes are formed. Application of chromium as the positive electrode results in a further increase in the open circuit voltage available from the H.sub.2 S-treated solar cell.

Jordan, John F. (El Paso, TX); Singh, Vijay P. (El Paso, TX)

1979-01-01T23:59:59.000Z

353

Why DNA is a double helix  

NLE Websites -- All DOE Office Websites (Extended Search)

Guest14 Location: NA Country: NA Date: NA Question: Why is DNA in a double-helix shape? Replies: The why questions are always the worst. Why is anything the way it is? The...

354

D-branes and doubled geometry  

E-Print Network (OSTI)

We define the open string version of the nonlinear sigma model on doubled geometry introduced by Hull and Reid-Edwards, and derive its boundary conditions. These conditions include the restriction of D-branes to maximally isotropic submanifolds as well as a compatibility condition with the Lie algebra structure on the doubled space. We demonstrate a systematic method to derive and classify D-branes from the boundary conditions, in terms of embeddings both in the doubled geometry and in the physical target space. We apply it to the doubled three-torus with constant H-flux and find D0-, D1-, and D2-branes, which we verify transform consistently under T-dualities mapping the system to f-, Q- and R-flux backgrounds.

Cecilia Albertsson; Tetsuji Kimura; Ronald A. Reid-Edwards

2008-06-11T23:59:59.000Z

355

Double layer capacitors : automotive applications and modeling  

E-Print Network (OSTI)

This thesis documents the work on the modeling of double layer capacitors (DLCs) and the validation of the modeling procedure. Several experiments were conducted to subject the device under test to a variety of ...

New, David Allen, 1976-

2004-01-01T23:59:59.000Z

356

Personnel Protection Systems for Electric Vehicle Charging Circuits  

Science Conference Proceedings (OSTI)

Electric vehicle charging systems will be required to provide protection against electric shock due to ground faults. This report reviews the subject of electric shock, including the effects of current magnitude, frequency, duration, alternating and direct current, and supply voltage to ground. The report suggests a basis for specific safety requirements--such as a ground fault circuit interrupt--that can be included in a product safety standard covering electric vehicle charging systems to meet the 1996...

2000-01-05T23:59:59.000Z

357

Cooling a quantum circuit via coupling to a multiqubit system  

E-Print Network (OSTI)

The cooling effects of a quantum LC circuit coupled inductively with an ensemble of artificial qubits are investigated. The particles may decay independently or collectively through their interaction with the environmental vacuum electromagnetic field reservoir. For appropriate bath temperatures and the resonator's quality factors, we demonstrate an effective cooling well below the thermal background. In particular, we found that for larger samples the cooling efficiency is better for independent qubits. However, the cooling process can be faster for collectively interacting particles.

Macovei, Mihai A

2010-01-01T23:59:59.000Z

358

Cooling a quantum circuit via coupling to a multiqubit system  

E-Print Network (OSTI)

The cooling effects of a quantum LC circuit coupled inductively with an ensemble of artificial qubits are investigated. The particles may decay independently or collectively through their interaction with the environmental vacuum electromagnetic field reservoir. For appropriate bath temperatures and the resonator's quality factors, we demonstrate an effective cooling well below the thermal background. In particular, we found that for larger samples the cooling efficiency is better for independent qubits. However, the cooling process can be faster for collectively interacting particles.

Mihai A. Macovei

2010-04-19T23:59:59.000Z

359

Basic DC Meter Design ECE 2100 Circuit Analysis Laboratory  

E-Print Network (OSTI)

Basic DC Meter Design ECE 2100 Circuit Analysis Laboratory updated 8 January 2008 Pre-Laboratory Assignment 1. Design an ammeter with full scale current IFS equal to 5 mA using a meter movement rated at 0.5 mA and 100 mV. 2. Design a voltmeter with a full scale voltage VFS equal to 10 V using the meter

Miller, Damon A.

360

A scalable virtual circuit routing scheme for ATM networks  

Science Conference Proceedings (OSTI)

Abstract: We present a scalable VC routing protocol based on the viewserver hierarchy. Each viewserver maintains a partial view of the network. By querying these viewservers, a source obtains a merged view that contains a path to the destination. The ... Keywords: ATM networks, asynchronous transfer mode, blocking probability, destination, packet switching networks, real-time workload, scalable VC routing protocol, scalable virtual circuit routing, setup request packet, simulation, source, storage, viewserver hierarchy

1995-09-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


361

Reversing-counterpulse repetitive-pulse inductive storage circuit  

DOE Patents (OSTI)

A high-power reversing-counterpulse repetitive-pulse inductive storage and transfer circuit includes an opening switch, a main energy storage coil, a counterpulse capacitor and a small inductor. After counterpulsing the opening switch off, the counterpulse capacitor is recharged by the main energy storage coil before the load pulse is initiated. This gives the counterpulse capacitor sufficient energy for the next counterpulse operation, although the polarity of the capacitor's voltage must be reversed before that can occur. By using a current-zero switch as the counterpulse start switch, the capacitor is disconnected from the circuit (with a full charge) when the load pulse is initiated, preventing the capacitor from depleting its energy store by discharging through the load. After the load pulse is terminated by reclosing the main opening switch, the polarity of the counterpulse capacitor voltage is reversed by discharging the capacitor through a small inductor and interrupting the discharge current oscillation at zero current and peak reversed voltage. The circuit enables high-power, high-repetition-rate operation with reusable switches and features total control (pulse-to-pulse) over output pulse initiation, duration, repetition rate, and, to some extent, risetime. 10 figs.

Honig, E.M.

1987-02-10T23:59:59.000Z

362

Reversing-counterpulse repetitive-pulse inductive storage circuit  

DOE Patents (OSTI)

A high-power reversing-counterpulse repetitive-pulse inductive storage and transfer circuit includes an opening switch, a main energy storage coil, a counterpulse capacitor and a small inductor. After counterpulsing the opening switch off, the counterpulse capacitor is recharged by the main energy storage coil before the load pulse is initiated. This gives the counterpulse capacitor sufficient energy for the next counterpulse operation, although the polarity of the capacitor's voltage must be reversed before that can occur. By using a current-zero switch as the counterpulse start switch, the capacitor is disconnected from the circuit (with a full charge) when the load pulse is initiated, preventing the capacitor from depleting its energy store by discharging through the load. After the load pulse is terminated by reclosing the main opening switch, the polarity of the counterpulse capacitor voltage is reversed by discharging the capacitor through a small inductor and interrupting the discharge current oscillation at zero current and peak reversed voltage. The circuit enables high-power, high-repetition-rate operation with reusable switches and features total control (pulse-to-pulse) over output pulse initiation, duration, repetition rate, and, to some extent, risetime.

Honig, Emanuel M. (Los Alamos, NM)

1987-01-01T23:59:59.000Z

363

Short Circuit Current Contribution for Different Wind Turbine Generator Types  

DOE Green Energy (OSTI)

An important aspect of wind power plant (WPP) impact studies is to evaluate the short circuit (SC) current contribution of the plant into the transmission network under different fault conditions. This task can be challenging to protection engineers due to the topology differences between different types of wind turbine generators (WTGs) and the conventional generating units. This paper represents simulation results for short circuit current contribution for different types of WTGs obtained through transient analysis using generic WTG models. The obtained waveforms are analyzed to explain the behavior, such as peak values and rate of decay, of the WTG. The effect of fault types and location, and the effect of the control algorithms of power converters on SC current contribution are investigated. It is shown that the response of the WPP to faults will vary based on the type of the installed WTGs. While in Type 1 and Type 2 WTGs, short circuit current will be determined by the physical characteristics of the induction generator, the contribu-tion of Type 3 and Type 4 WTG will be mostly characterized by the power converters control algorithms which are usually considered proprietary information by the wind turbine manufacturers.

Muljadi, E.; Samaan, Nader A.; Gevorgian, Vahan; Li, Jun; Pasupulati, Subbaiah

2010-09-28T23:59:59.000Z

364

Ambient temperature cadmium zinc telluride radiation detector and amplifier circuit  

DOE Patents (OSTI)

A low noise, low power consumption, compact, ambient temperature signal amplifier for a Cadmium Zinc Telluride (CZT) radiation detector. The amplifier can be used within a larger system (e.g., including a multi-channel analyzer) to allow isotopic analysis of radionuclides in the field. In one embodiment, the circuit stages of the low power, low noise amplifier are constructed using integrated circuit (IC) amplifiers , rather than discrete components, and include a very low noise, high gain, high bandwidth dual part preamplification stage, an amplification stage, and an filter stage. The low noise, low power consumption, compact, ambient temperature amplifier enables the CZT detector to achieve both the efficiency required to determine the presence of radio nuclides and the resolution necessary to perform isotopic analysis to perform nuclear material identification. The present low noise, low power, compact, ambient temperature amplifier enables a CZT detector to achieve resolution of less than 3% full width at half maximum at 122 keV for a Cobalt-57 isotope source. By using IC circuits and using only a single 12 volt supply and ground, the novel amplifier provides significant power savings and is well suited for prolonged portable in-field use and does not require heavy, bulky power supply components.

McQuaid, James H. (Livermore, CA); Lavietes, Anthony D. (Hayward, CA)

1998-05-29T23:59:59.000Z

365

Ambient temperature cadmium zinc telluride radiation detector and amplifier circuit  

DOE Patents (OSTI)

A low noise, low power consumption, compact, ambient temperature signal amplifier for a Cadmium Zinc Telluride (CZT) radiation detector is disclosed. The amplifier can be used within a larger system (e.g., including a multi-channel analyzer) to allow isotopic analysis of radionuclides in the field. In one embodiment, the circuit stages of the low power, low noise amplifier are constructed using integrated circuit (IC) amplifiers , rather than discrete components, and include a very low noise, high gain, high bandwidth dual part preamplification stage, an amplification stage, and an filter stage. The low noise, low power consumption, compact, ambient temperature amplifier enables the CZT detector to achieve both the efficiency required to determine the presence of radionuclides and the resolution necessary to perform isotopic analysis to perform nuclear material identification. The present low noise, low power, compact, ambient temperature amplifier enables a CZT detector to achieve resolution of less than 3% full width at half maximum at 122 keV for a Cobalt-57 isotope source. By using IC circuits and using only a single 12 volt supply and ground, the novel amplifier provides significant power savings and is well suited for prolonged portable in-field use and does not require heavy, bulky power supply components. 9 figs.

McQuaid, J.H.; Lavietes, A.D.

1998-05-26T23:59:59.000Z

366

Double Bottom Line Project Report:Assessing Social Impact In Double Bottom Line Ventures  

E-Print Network (OSTI)

of Key Characteristics Glossary Method Summaries Theories ofin double bottom line ventures methods catalog glossary ofterms glossary of terms This glossary defines the variables

Rosenzweig, William

2004-01-01T23:59:59.000Z

367

Docket No. EO-05-01: Further Notice of 230kV Circuit Planned Outages |  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

Further Notice of 230kV Circuit Planned Further Notice of 230kV Circuit Planned Outages Docket No. EO-05-01: Further Notice of 230kV Circuit Planned Outages Docket No. EO-05-01. Pursuant to the United States Department of Energy Order No. 202-05-03, issued December 20, 2005 directing Mirant Potomac River to generate electricity at Potomac River Generating Station, PEPCO hereby files this Further Notice of 230kV Circuit Planned Outages. Docket No. EO-05-01: Further Notice of 230kV Circuit Planned Outages More Documents & Publications Further Notice of 230kV Circuit Planned Outages Re: Potomac River Generating Station Department of Energy, Case No. EO-05-01: Potomac Electric Power Company (PEPCO) Concerning Planned Outages of the 230 kV circuits Re: Potomac River Generating Station Department of Energy Case No.

368

Further Notice of 230kV Circuit Planned Outages | Department of Energy  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

Further Notice of 230kV Circuit Planned Outages Further Notice of 230kV Circuit Planned Outages Further Notice of 230kV Circuit Planned Outages Docket No. EO-05-01. Order No. 202-05-03: Pursuant 10 the United States Department of Energy "DOE") Order No. 102-05-3, issued December 20, 2005 ("DOE Potomac River Order''), Pepco hereby files this Further Notice Of 230kV Circuit Planned Outages serving the Potomac River Substation, and through thaI station, the District of Columbia. Further Notice of 230kV Circuit Planned Outages More Documents & Publications Re: Potomac River Generating Station Department of Energy, Case No. EO-05-01: Potomac Electric Power Company (PEPCO) Concerning Planned Outages of the 230 kV circuits Docket No. EO-05-01: Further Notice of 230kV Circuit Planned Outages

369

Object-Oriented Modeling Of Power-Electronic Circuits Using Dymola  

E-Print Network (OSTI)

In this paper, a new approach to the object--oriented modeling of power--electronic circuits is demonstrated. It enables the user to specify power--electronic circuits conveniently in an easy--to--use modular fashion, yet generate simulation code that is efficient in its use, not requiring the introduction of artificial fast time--constants as was the case with many of the earlier proposed methodologies. Dymola enables the user to specify models for individual circuit elements in a highly modular, compact, and object--oriented fashion. Circuit models invoke these component models, and connect them in a topological manner, just as a Spice program would. The Dymola compiler automatically translates these circuit models into monolithic descriptions at the level of the simulation language resolving discontinuous circuit elements, such as switches, into appropriate event descriptions. For a typical AC--DC converter circuit controlled by GTO thyristors, it is shown that a speedup factor of a...

Hilding Elmqvist; François E. Cellier; Martin Otter

1994-01-01T23:59:59.000Z

370

Further Notice of 230kV Circuit Planned Outages | Department of Energy  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

Further Notice of 230kV Circuit Planned Outages Further Notice of 230kV Circuit Planned Outages Further Notice of 230kV Circuit Planned Outages Docket No. EO-05-01. Order No. 202-05-03: Pursuant 10 the United States Department of Energy "DOE") Order No. 102-05-3, issued December 20, 2005 ("DOE Potomac River Order''), Pepco hereby files this Further Notice Of 230kV Circuit Planned Outages serving the Potomac River Substation, and through thaI station, the District of Columbia. Further Notice of 230kV Circuit Planned Outages More Documents & Publications Docket No. EO-05-01: Further Notice of 230kV Circuit Planned Outages Re: Potomac River Generating Station Department of Energy, Case No. EO-05-01: Potomac Electric Power Company (PEPCO) Concerning Planned Outages of the 230 kV circuits

371

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48, NO. 2, FEBRUARY 2013 587 Power Noise in TSV-Based 3-D Integrated Circuits  

E-Print Network (OSTI)

to form a 3-D stack. Noise analysis of three power delivery topologies is described. Calibration circuits stacked circuits. The effect of the through silicon via (TSV) density on the noise profile of a 3-D power) is the de- sign of a robust power distribution network that can provide suf- ficient current to every load

Friedman, Eby G.

372

Worldwide reliability surveys of high voltage circuit breakers  

Science Conference Proceedings (OSTI)

This article reports on the results of two CIGRE 13.06 Working Group worldwide surveys of the reliability of high voltage circuit breakers, 63 kV and above. The first inquiry included 78,000 breaker-years of ``in service data`` from 102 utilities in 22 countries during the years 1974--1977 and included all interrupting technologies. The second inquiry included 70,708 breaker-years from 132 utilities in 22 countries for the years 1988--1991 and only included single-pressure SF6 breakers, because this is what most utilities are now buying. Thirty-one US utilities submitted data.

Heising, C.R.

1995-05-01T23:59:59.000Z

373

A "Single-Photon" Transistor in Circuit Quantum Electrodynamics  

E-Print Network (OSTI)

We introduce a circuit quantum electrodynamical setup for a "single-photon" transistor. In our approach photons propagate in two open transmission lines that are coupled via two interacting transmon qubits. The interaction is such that no photons are exchanged between the two transmission lines but a single photon in one line can completely block respectively enable the propagation of photons in the other line. High on-off ratios can be achieved for feasible experimental parameters. Our approach is inherently scalable as all photon pulses can have the same pulse shape and carrier frequency such that output signals of one transistor can be input signals for a consecutive transistor.

Lukas Neumeier; Martin Leib; Michael J. Hartmann

2012-11-30T23:59:59.000Z

374

Nonlinear coupling of nano mechanical resonators to Josephson quantum circuits  

E-Print Network (OSTI)

We propose a technique to couple the position operator of a nano mechanical resonator to a SQUID device by modulating its magnetic flux bias. By tuning the magnetic field properly, either linear or quadratic couplings can be realized, with a discretely adjustable coupling strength. This provides a way to realize coherent nonlinear effects in a nano mechanical resonator by coupling it to a Josephson quantum circuit. As an example, we show how squeezing of the nano mechanical resonator state can be realized with this technique. We also propose a simple method to measure the uncertainty in the position of the nano mechanical resonator without quantum state tomography.

Xingxiang Zhou; Ari Mizel

2006-05-01T23:59:59.000Z

375

Amplifier circuit operable over a wide temperature range  

DOE Patents (OSTI)

An amplifier circuit having stable performance characteristics over a wide temperature range from approximately 0.degree. C up to as high as approximately 500.degree. C, such as might be encountered in a geothermal borehole. The amplifier utilizes ceramic vacuum tubes connected in directly coupled differential amplifier pairs having a common power supply and a cathode follower output stage. In an alternate embodiment, for operation up to 500.degree. C, positive and negative power supplies are utilized to provide improved gain characteristics, and all electrical connections are made by welding. Resistor elements in this version of the invention are specially heat treated to improve their stability with temperature.

Kelly, Ronald D. (San Pedro, CA); Cannon, William L. (Encino, CA)

1979-01-01T23:59:59.000Z

376

Light-induced voltage alteration for integrated circuit analysis  

DOE Patents (OSTI)

An apparatus and method are described for analyzing an integrated circuit (IC), The invention uses a focused light beam that is scanned over a surface of the IC to generate a light-induced voltage alteration (LIVA) signal for analysis of the IC, The LIVA signal may be used to generate an image of the IC showing the location of any defects in the IC; and it may be further used to image and control the logic states of the IC. The invention has uses for IC failure analysis, for the development of ICs, for production-line inspection of ICs, and for qualification of ICs.

Cole, Jr., Edward I. (Albuquerque, NM); Soden, Jerry M. (Placitas, NM)

1995-01-01T23:59:59.000Z

377

Method for deposition of a conductor in integrated circuits  

DOE Patents (OSTI)

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

Creighton, J. Randall (Albuquerque, NM); Dominguez, Frank (Albuquerque, NM); Johnson, A. Wayne (Albuquerque, NM); Omstead, Thomas R. (Albuquerque, NM)

1997-01-01T23:59:59.000Z

378

Dynamically Tunable Memory in Two-Component Gene Circuit  

SciTech Connect

Cell has the potential to remember the environmental conditions for many (10{sup 7}) generations but stochastic fluctuations set a fundamental limit on the stability of this memory. Here we explicitly take the binding-unbinding of macromolecules into account to propose a novel rationale for the protein-protein interaction in cell physiology. Based on the first-exit time and the corresponding deterministic characterization of various genetic circuits, we show that the reversible binding dynamics may stabilize non-genetically inherited cell states, providing a practical strategy for designing robust epigenetic memory.

Ghim, C; Almaas, E

2008-09-05T23:59:59.000Z

379

The double-arm barn door tracker  

NLE Websites -- All DOE Office Websites (Extended Search)

How to build a double-arm barn door tracker How to build a double-arm barn door tracker | Jefferson Lab Home Page | Science Education Home Page | Construction Notes/Photos Page | Sources: Sky & Telescope April 1989 (p436 - p441) [very good] Sky & Telescope February 1988 (p213 - p214) Original concept by Dave Trott A single-arm barn door tracker, driven by a straight screw, accumulates tangent error as time passes. Most of this error can be eliminated by adding a second hinged arm to the standard arrangement. There are four types of double-arm trackers, each with a different geometry. A comparison of accumulated error (in arc seconds) and construction parameters is given below: Error Chart [Apparently Type 1 is very bad and not worth constructing?? The two Type 4 drives vary in beta. This results in shifting the region of maximum error

380

Optimising an inductor circuit and a two-stage operational transconductance amplifier using evolutionary and classical algorithms  

Science Conference Proceedings (OSTI)

In this work, we compare evolutionary algorithms and standard optimisation methods on two circuit design problems: the parameter extraction of a device circuit model and the multiobjective optimisation of an operational transconductance amplifier. ... Keywords: circuit design, classical optimisation methods, evolutionary algorithms, inductor device circuits, multiobjective optimisation, nanoscale technology, nanotechnology, operational transconductance amplifiers

V. Cutello; G. Nicosia; R. Rascuna; S. Spinella

2006-06-01T23:59:59.000Z

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381

Recycling of WEEE: Characterization of spent printed circuit boards from mobile phones and computers  

SciTech Connect

Highlights: > This paper presents new and important data on characterization of wastes of electric and electronic equipments. > Copper concentration is increasing in mobile phones and remaining constant in personal computers. > Printed circuit boards from mobile phones and computers would not be mixed prior treatment. - Abstract: This paper presents a comparison between printed circuit boards from computers and mobile phones. Since printed circuits boards are becoming more complex and smaller, the amount of materials is constantly changing. The main objective of this work was to characterize spent printed circuit boards from computers and mobile phones applying mineral processing technique to separate the metal, ceramic, and polymer fractions. The processing was performed by comminution in a hammer mill, followed by particle size analysis, and by magnetic and electrostatic separation. Aqua regia leaching, loss-on-ignition and chemical analysis (inductively coupled plasma atomic emission spectroscopy - ICP-OES) were carried out to determine the composition of printed circuit boards and the metal rich fraction. The composition of the studied mobile phones printed circuit boards (PCB-MP) was 63 wt.% metals; 24 wt.% ceramics and 13 wt.% polymers; and of the printed circuit boards from studied personal computers (PCB-PC) was 45 wt.% metals; 27 wt.% polymers and ceramics 28 wt.% ceramics. The chemical analysis showed that copper concentration in printed circuit boards from personal computers was 20 wt.% and in printed circuit boards from mobile phones was 34.5 wt.%. According to the characteristics of each type of printed circuit board, the recovery of precious metals may be the main goal of the recycling process of printed circuit boards from personal computers and the recovery of copper should be the main goal of the recycling process of printed circuit boards from mobile phones. Hence, these printed circuit boards would not be mixed prior treatment. The results of this paper show that copper concentration is increasing in mobile phones and remaining constant in personal computers.

Yamane, Luciana Harue, E-mail: lucianayamane@uol.com.br [Department of Metallurgical and Materials Engineering, University of Sao Paulo, Av. Prof. Mello Moraes, 2463 Sao Paulo, SP 05508-030 (Brazil); Tavares de Moraes, Viviane, E-mail: tavares.vivi@gmail.com [Department of Metallurgical and Materials Engineering, University of Sao Paulo, Av. Prof. Mello Moraes, 2463 Sao Paulo, SP 05508-030 (Brazil); Crocce Romano Espinosa, Denise, E-mail: espinosa@usp.br [Department of Metallurgical and Materials Engineering, University of Sao Paulo, Av. Prof. Mello Moraes, 2463 Sao Paulo, SP 05508-030 (Brazil); Soares Tenorio, Jorge Alberto, E-mail: jtenorio@usp.br [Department of Metallurgical and Materials Engineering, University of Sao Paulo, Av. Prof. Mello Moraes, 2463 Sao Paulo, SP 05508-030 (Brazil)

2011-12-15T23:59:59.000Z

382

The double-beta decay: Theoretical challenges  

Science Conference Proceedings (OSTI)

Neutrinoless double beta decay is a unique process that could reveal physics beyond the Standard Model of particle physics namely, if observed, it would prove that neutrinos are Majorana particles. In addition, it could provide information regarding the neutrino masses and their hierarchy, provided that reliable nuclear matrix elements can be obtained. The two neutrino double beta decay is an associate process that is allowed by the Standard Model, and it was observed for about ten nuclei. The present contribution gives a brief review of the theoretical challenges associated with these two process, emphasizing the reliable calculation of the associated nuclear matrix elements.

Horoi, Mihai [Department of Physics, Central Michigan University, Mount Pleasant, Michigan, 48859 (United States)

2012-11-20T23:59:59.000Z

383

Scintillating bolometers for Double Beta Decay search  

E-Print Network (OSTI)

In the field of Double Beta Decay (DBD) searches, the use of high resolution detectors in which background can be actively discriminated is very appealing. Scintillating bolometers containing a Double Beta Decay emitter can largely fulfill this very interesting possibility. In this paper we present the latest results obtained with CdWO4 and CaMoO4 crystals. Moreover we report, for the first time, a very interesting feature of CaMoO4 bolometers: the possibility to discriminate beta-gamma events from those induced by alpha particles thanks to different thermal pulse shape.

Gironi, Luca

2009-01-01T23:59:59.000Z

384

Scintillating bolometers for Double Beta Decay search  

E-Print Network (OSTI)

In the field of Double Beta Decay (DBD) searches, the use of high resolution detectors in which background can be actively discriminated is very appealing. Scintillating bolometers containing a Double Beta Decay emitter can largely fulfill this very interesting possibility. In this paper we present the latest results obtained with CdWO4 and CaMoO4 crystals. Moreover we report, for the first time, a very interesting feature of CaMoO4 bolometers: the possibility to discriminate beta-gamma events from those induced by alpha particles thanks to different thermal pulse shape.

Luca Gironi

2009-11-05T23:59:59.000Z

385

Well-Passivated a-Si:H Back Contacts for Double-Heterojunction Silicon Solar Cells: Preprint  

DOE Green Energy (OSTI)

We have developed hydrogenated amorphous silicon (a Si:H) back contacts to both p- and n-type silicon wafers, and employed them in double-heterojunction solar cells. These contacts are deposited entirely at low temperature (<250 C) and replace the standard diffused or alloyed back-surface-field contacts used in single-heterojunction (front-emitter only) cells. High-quality back contacts require excellent surface passivation, indicated by a low surface recombination velocity of minority-carriers (S) or a high open-circuit voltage (Voc). The back contact must also provide good conduction for majority carriers to the external circuit, as indicated by a high light I-V fill factor. We use hot-wire chemical vapor deposition (HWCVD) to grow a-Si:H layers for both the front emitters and back contacts. Our improved a-Si:H back contacts contribute to our recent achievement of a confirmed 18.2% efficiency in double-heterojunction silicon solar cells on p type textured silicon wafers.

Page, M. R.; Iwaniczko, E.; Xu, Y.; Wang, Q.; Yan, Y.; Roybal, L.; Branz, H. M.; Wang, T. H.

2006-05-01T23:59:59.000Z

386

Analysis of High Power IGBT Short Circuit Failures  

SciTech Connect

The Next Linear Collider (NLC) accelerator proposal at SLAC requires a highly efficient and reliable, low cost, pulsed-power modulator to drive the klystrons. A solid-state induction modulator has been developed at SLAC to power the klystrons; this modulator uses commercial high voltage and high current Insulated Gate Bipolar Transistor (IGBT) modules. Testing of these IGBT modules under pulsed conditions was very successful; however, the IGBTs failed when tests were performed into a low inductance short circuit. The internal electrical connections of a commercial IGBT module have been analyzed to extract self and mutual partial inductances for the main current paths as well as for the gate structure. The IGBT module, together with the partial inductances, has been modeled using PSpice. Predictions for electrical paths that carry the highest current correlate with the sites of failed die under short circuit tests. A similar analysis has been carried out for a SLAC proposal for an IGBT module layout. This paper discusses the mathematical model of the IGBT module geometry and presents simulation results.

Pappas, G.

2005-02-11T23:59:59.000Z

387

Fault current limiter and alternating current circuit breaker  

Science Conference Proceedings (OSTI)

A solid-state circuit breaker and current limiter for a load served by an alternating current source having a source impedance, the solid-state circuit breaker and current limiter comprising a thyristor bridge interposed between the alternating current source and the load, the thyristor bridge having four thyristor legs and four nodes, with a first node connected to the alternating current source, and a second node connected to the load. A coil is connected from a third node to a fourth node, the coil having an impedance of a value calculated to limit the current flowing therethrough to a predetermined value. Control means are connected to the thyristor legs for limiting the alternating current flow to the load under fault conditions to a predetermined level, and for gating the thyristor bridge under fault conditions to quickly reduce alternating current flowing therethrough to zero and thereafter to maintain the thyristor bridge in an electrically open condition preventing the alternating current from flowing therethrough for a predetermined period of time.

Boenig, Heinrich J. (Los Alamos, NM)

1998-01-01T23:59:59.000Z

388

Hydraulically-activated operating system for an electric circuit breaker  

DOE Patents (OSTI)

This operating system comprises a fluid motor having a piston, a breaker-opening space at one side of the piston, and a breaker-closing space at its opposite side. An accumulator freely communicates with the breaker-opening space for supplying pressurized fluid thereto during a circuit-breaker opening operation. A normally-closed valve located on the breaker-closing-side of the piston is openable to release liquid from the breaker-closing space so that pressurized liquid in the breaker-opening space can drive the piston in an opening direction. Means is provided for restoring the valve to its closed position following the circuit-breaker opening operation. An impeded passage affords communication between the accumulator and the breaker-closing space to allow pressurized liquid to flow from the accumulator to the breaker-closing space and develop a pressure therein substantially equal to accumulator pressure when the valve is restored to closed position following breaker-opening. This passage is so impeded that the flow therethrough from the accumulator into the breaker-closing space is sufficiently low during initial opening motion of the piston through a substantial portion of its opening stroke as to avoid interference with said initial opening motion of the piston.

Imam, Imdad (Secane, PA); Barkan, Philip (Stanford, CA)

1979-01-01T23:59:59.000Z

389

Hydraulically-actuated operating system for an electric circuit breaker  

DOE Patents (OSTI)

This hydraulically-actuated operating system comprises a cylinder, a piston movable therein in an opening direction to open a circuit breaker, and an accumulator for supplying pressurized liquid to a piston-actuating space within the cylinder. A normally-closed valve between the accumulator and the actuating space is openable to allow pressurized liquid from the accumulator to flow through the valve into the actuating space to drive the piston in an opening direction. A vent is located hydraulically between the actuating space and the valve for affording communication between said actuating space and a low pressure region. Flow control means is provided for restricting leakage through said vent to a rate that prevents said leakage from substantially detracting from the development of pressure within said actuatng space during the period from initial opening of the valve to the time when said piston has moved through most of its opening stroke. Following such period and while the valve is still open, said flow control means allows effective leakage through said vent. The accumulator has a limited capacity that results in the pressure within said actuating space decaying promptly to a low value as a result of effective leakage through said vent after the piston has moved through a circuit-breaker opening stroke and while the valve is in its open state. Means is provided for resetting the valve to its closed state in response to said pressure decay in the actuating space.

Barkan, Philip (Media, PA); Imam, Imdad (Secane, PA)

1978-01-01T23:59:59.000Z

390

Electromagnetic Interference (EMI) Resisting Analog Integrated Circuit Design Tutorial  

E-Print Network (OSTI)

This work introduces fundamental knowledge of EMI, and presents three basic features correlated to EMI susceptibility: nonlinear distortion, asymmetric slew rate (SR) and parasitic capacitance. Different existing EMI-resisting techniques are analyzed and compared to each other in terms of EMI-Induced input offset voltage and other important specifications such as current consumption. In this work, EMI-robust analog circuits are proposed, of which the architecture is based on source-buffered differential pair in the previous publications. The EMI performance of the proposed topologies has been verified within a test IC which was fabricated in NCSU 0.5um CMOS technology. Experimental results are presented when an EMI disturbance signal of 400mV and 800mV amplitude was injected at the input terminals, and compared with a conventional and an existing topology. The tested maximal EMI-induced input offset voltage corresponds to -222mV for the new structure, which is compared to -712mV for the conventional one and -368mV for the one using existing source-buffered technique in literature. Furthermore the overall performances of the circuits such as current consumption or input referred noise are also provided with the corresponding simulation results.

Yu, Jingjing

2012-08-01T23:59:59.000Z

391

Equivalent circuit modeling of hybrid electric vehicle drive train  

E-Print Network (OSTI)

The main goals of the advanced vehicles designer are to improve efficiency, to decrease emissions and to meet customer's requirements. The design of such vehicles is challenging and cannot efficiently be achieved without an appropriate tool. The objective of this work is to develop and validate a modeling and design method adapted to advanced vehicles conception. The designer, as a system engineer, needs performances predictions and physical understanding of the system dynamics. In order to achieve this objective, a methodology based on electrical analogies and transducers theory is presented in this work. Using the powerful circuit theory to solve multi-disciplinary problems is not revolutionary, but applied to the design of advanced vehicles, it brings a strong insight and a visual, intuitive interpretation of the set of differential equations. The equivalent circuit obtained from this method offers an elegant alternative to traditional methods and is especially adapted to the study of the interactions between the mechanical and the electrical side of any electromechanical system.

Routex, Jean-Yves

2001-01-01T23:59:59.000Z

392

Fault current limiter and alternating current circuit breaker  

DOE Patents (OSTI)

A solid-state circuit breaker and current limiter are disclosed for a load served by an alternating current source having a source impedance, the solid-state circuit breaker and current limiter comprising a thyristor bridge interposed between the alternating current source and the load, the thyristor bridge having four thyristor legs and four nodes, with a first node connected to the alternating current source, and a second node connected to the load. A coil is connected from a third node to a fourth node, the coil having an impedance of a value calculated to limit the current flowing therethrough to a predetermined value. Control means are connected to the thyristor legs for limiting the alternating current flow to the load under fault conditions to a predetermined level, and for gating the thyristor bridge under fault conditions to quickly reduce alternating current flowing therethrough to zero and thereafter to maintain the thyristor bridge in an electrically open condition preventing the alternating current from flowing therethrough for a predetermined period of time. 9 figs.

Boenig, H.J.

1998-03-10T23:59:59.000Z

393

Adaptive Cooling of Integrated Circuits using Digital Microfluidics. Artech House  

E-Print Network (OSTI)

Abstract—Thermal management is critical for integrated circuit (IC) design. With each new IC technology generation, feature sizes decrease, while operating speeds and package densities increase. These factors contribute to elevated die temperatures detrimental to circuit performance and reliability. Furthermore, hot spots due to spatially nonuniform heat flux in ICs can cause physical stress that further reduces reliability. While a number of chip cooling techniques have been proposed in the literature, most are still unable to address the varying thermal profiles of an IC and their capability to remove a large amount of heat is undermined by their lack of reconfigurability of flows. We present an alternative cooling technique based on a recently invented "digital microfluidic " platform. This novel digital fluid handling platform uses a phenomenon known as electrowetting, and allows for a vast array of discrete droplets of liquid, ranging from microliters to nanoliters, and potentially picoliters, to be independently moved along a substrate. While this technology was originally developed for a biological and chemical lab-on-a-chip, we show how it can be adapted to be used as a fully reconfigurable, adaptive cooling platform. Index Terms—Adaptive cooling, chip cooling, digital microfluidics, electrowetting, hot-spot cooling, microfluidics. I.

Philip Y. Paik; Vamsee K. Pamula; Krishnendu Chakrabarty

2007-01-01T23:59:59.000Z

394

Reliability centered maintenance of power transformers and circuit breakers  

SciTech Connect

At the Bonneville Power Administration (BPA), we have historically maintained high voltage equipment. Including transformers and power circuit breakers, on a time driven basis. While this has served our needs in the past, newer methods are needed to effectively maintain the power system in future years. Today aging equipment, maintenance backlogs, and budget constraints are a reality. BPA has initiated a research and development project to examine reliability centered maintenance (RCM) as an alternative to time based maintenance on high voltage equipment. Under RCM, the performance of each place of equipment is to be monitored by observing many operating parameters. For example, with circuit breakers we will observe (measure) the trip time, accumulated contact wear using I{sup 2}T, timing of the mechanism, plus several other parameters. Equipment performing below a predetermined level, or equipment having accumulated a large amount of ``usage`` will receive maintenance. The maintenance will restore full performance and preserve an acceptable service life for that piece of equipment. To develop and evaluate RCM concepts, BPA is installing a prototype system at our Alvey Substation on 4 transformers and 25 breakers.

Purucker, S.L.; Goeltz, R.T. [Oak Ridge National Lab., TN (United States); Hemmelman, K.; Price, R. [Bonneville Power Administration, Van Couver, WA (United States)

1992-08-01T23:59:59.000Z

395

Printed circuit board impedance matching step for microwave (millimeter wave) devices  

SciTech Connect

An impedance matching ground plane step, in conjunction with a quarter wave transformer section, in a printed circuit board provides a broadband microwave matching transition from board connectors or other elements that require thin substrates to thick substrate (>quarter wavelength) broadband microwave (millimeter wave) devices. A method of constructing microwave and other high frequency electrical circuits on a substrate of uniform thickness, where the circuit is formed of a plurality of interconnected elements of different impedances that individually require substrates of different thicknesses, by providing a substrate of uniform thickness that is a composite or multilayered substrate; and forming a pattern of intermediate ground planes or impedance matching steps interconnected by vias located under various parts of the circuit where components of different impedances are located so that each part of the circuit has a ground plane substrate thickness that is optimum while the entire circuit is formed on a substrate of uniform thickness.

Pao, Hsueh-Yuan; Aguirre, Jerardo; Sargis, Paul

2013-10-01T23:59:59.000Z

396

The simulation of circuit breaker switching using a composite Cassie-modified Mayr model  

Science Conference Proceedings (OSTI)

In substation electromagnetic compatibility studies or insulation coordination studies it is desirable to get as accurate a representation as possible of the transients generated by faults and switching events. A method of simulating the voltage and current transients generated by a gas blast circuit breaker operation using a composite Cassie-modified Mayr model of the circuit breaker arc is described. It is demonstrated that this gives good agreement with published laboratory measurements of the circuit breaker voltage and current. The transmission line modeling method is used int the construction of the simulation algorithm of the circuit breaker circuit. A method, based on describing the circuit breaker by a transmission-line model (TLM), is used to decouple the non-linear characteristics from the rest of the network.

Thomas, D.W.P.; Pereira, E.T.; Christopoulos, C.; Howe, A.F. [Univ. of Nottingham (United Kingdom). Dept. of Electrical and Electronic Engineering

1995-10-01T23:59:59.000Z

397

A Microscopic Double-Slit Experiment  

NLE Websites -- All DOE Office Websites (Extended Search)

A Microscopic Double-Slit A Microscopic Double-Slit Experiment A Microscopic Double-Slit Experiment Print Wednesday, 29 February 2012 00:00 Two centuries ago, Thomas Young performed the classic demonstration of the wave nature of light. He placed a screen with two tiny slits in front of a single light source, effectively converting it into a two-centered source. On a second screen far away, he saw a pattern of light and dark diffraction fringes, a well-known hallmark of wave interference. Along with later studies using particles instead of light, the experiment played a crucial role in establishing the validity of wave-particle duality, a puzzling concept that has ultimately become central to the interpretation of complementarity in quantum mechnanics. In a new twist on this classic experiment, the double slit (with light waves) has been replaced by a diatomic molecule (with electron waves). At ALS Beamline 10.0.1, researchers have shown that diatomic molecules can serve as two-center emitters of electron waves and that traces of electron-wave interference can be directly observed in precise measurements of vibrationally resolved photoionization spectra.

398

The Dynamics of Double Monsoon Onsets  

Science Conference Proceedings (OSTI)

Double monsoon onset develops when the strong convection in the Bay of Bengal is accompanied by the monsoonlike circulation and appears in the Indian Ocean in early May, which is about 3 weeks earlier than the climatological date of the onset (1 ...

Maria K. Flatau; Piotr J. Flatau; Daniel Rudnick

2001-11-01T23:59:59.000Z

399

Double?Quantum Light Scattering by Molecules  

Science Conference Proceedings (OSTI)

Double?quantum light scattering by a system of molecules is discussed in this paper. Expressions have been obtained for the scattered light intensity considering both the coherent and incoherent contributions. In that coherent contributions are also considered in this treatment

R. Bersohn; Yoh?Han Pao; H. L. Frisch

1966-01-01T23:59:59.000Z

400

Nuclear Maintenance Applications Center: Guidelines for the Development of Circuit Breaker Specialists  

Science Conference Proceedings (OSTI)

Circuit breakers are critical to the continued operation of industrial facilities, including power plants. However, there is no consistent process in place in the utility industry to ensure the proper professional and technical development of individuals who are responsible for these components as facilities age. This report, developed by the Electric Power Research Institute (EPRI) and the Circuit Breakers Users Group (CBUG), provides a tiered approach for development of future Circuit Breaker ...

2012-09-04T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


401

Case Study on Smart Green Circuits: ESB Networks Part 1 & 2  

Science Conference Proceedings (OSTI)

A smart grid is not just about enabling customer responsiveness or a high penetration of renewables, but also about creating “smart green circuits” that enable monitoring of line conditions, conservation voltage reduction (CVR), loss reduction, operational efficiency, and protection.This case study is on the first phase of ESB Networks Smart Green Circuits project in Ireland, which entailed tests done on four distribution circuits. Three are rural (Kerry, Galway, Dungloe), ...

2012-12-31T23:59:59.000Z

402

Integrated circuit for processing a low-frequency signal from a seismic detector  

Science Conference Proceedings (OSTI)

Specific features for the detection and processing of a low-frequency signal from a seismic detector are considered in terms of an integrated circuit based on a large matrix crystal of the 5507 series. This integrated circuit is designed for the detection of human movements. The specific features of the information signal, obtained at the output of the seismic detector, and the main characteristics of the integrated circuit and its structure are reported.

Malashevich, N. I.; Roslyakov, A. S.; Polomoshnov, S. A., E-mail: S.Polomoshnov@tsen.ru; Fedorov, R. A. [Research and Production Complex 'Technological Center' of the Moscow Institute of Electronic Technology (Russian Federation)

2011-12-15T23:59:59.000Z

403

Resonant circuit which provides dual-frequency excitation for rapid cycling of an electromagnet  

DOE Patents (OSTI)

Disclosed is a novel ring-magnet control circuit that permits synchrotron repetition rates much higher than the frequency of the sinusoidal guide field of the ring magnet during particle acceleration. The control circuit generates sinusoidal excitation currents of different frequencies in the half waves. During radio-frequency acceleration of the synchrotron, the control circuit operates with a lower frequency sine wave and, thereafter, the electromagnets are reset with a higher-frequency half sine wave.

Praeg, W.F.

1982-03-09T23:59:59.000Z

404

Circuit for echo and noise suppression of acoustic signals transmitted through a drill string  

DOE Patents (OSTI)

An electronic circuit for digitally processing analog electrical signals produced by at least one acoustic transducer is presented. In a preferred embodiment of the present invention, a novel digital time delay circuit is utilized which employs an array of First-in-First-out (FiFo) microchips. Also, a bandpass filter is used at the input to this circuit for isolating drill string noise and eliminating high frequency output. 20 figures.

Drumheller, D.S.; Scott, D.D.

1993-12-28T23:59:59.000Z

405

Circuit for echo and noise suppression of accoustic signals transmitted through a drill string  

DOE Patents (OSTI)

An electronic circuit for digitally processing analog electrical signals produced by at least one acoustic transducer is presented. In a preferred embodiment of the present invention, a novel digital time delay circuit is utilized which employs an array of First-in-First-out (FiFo) microchips. Also, a bandpass filter is used at the input to this circuit for isolating drill string noise and eliminating high frequency output.

Drumheller, Douglas S. (P.O. Box 676, Cedar Crest, NM 87008); Scott, Douglas D. (12911 Kachima Place N.E., Apt. A, Albuquerque, NM 37112)

1993-01-01T23:59:59.000Z

406

Apparatus And Method Of Using Flexible Printed Circuit Board In Optical Transceiver Device  

DOE Patents (OSTI)

This invention relates to a flexible printed circuit board that is used in connection with an optical transmitter, receiver or transceiver module. In one embodiment, the flexible printed circuit board has flexible metal layers in between flexible insulating layers, and the circuit board comprises: (1) a main body region orientated in a first direction having at least one electrical or optoelectronic device; (2) a plurality of electrical contact pads integrated into the main body region, where the electrical contact pads function to connect the flexible printed circuit board to an external environment; (3) a buckle region extending from one end of the main body region; and (4) a head region extending from one end of the buckle region, and where the head region is orientated so that it is at an angle relative to the direction of the main body region. The electrical contact pads may be ball grid arrays, solder balls or land-grid arrays, and they function to connect the circuit board to an external environment. A driver or amplifier chip may be adapted to the head region of the flexible printed circuit board. In another embodiment, a heat spreader passes along a surface of the head region of the flexible printed circuit board, and a window is formed in the head region of the flexible printed circuit board. Optoelectronic devices are adapted to the head spreader in such a manner that they are accessible through the window in the flexible printed circuit board.

Anderson, Gene R. (Albuquerque, NM); Armendariz, Marcelino G. (Albuquerque, NM); Bryan, Robert P. (Albuquerque, NM); Carson, Richard F. (Albuquerque, NM); Duckett, III, Edwin B. (Albuquerque, NM); McCormick, Frederick B. (Albuquerque, NM); Peterson, David W. (Sandia Park, NM); Peterson, Gary D. (Albuquerque, NM); Reysen, Bill H. (Lafayette, CO)

2005-03-15T23:59:59.000Z

407

Development and interrupting tests on 250KV 8KA HVDC circuit breaker  

SciTech Connect

This paper describes the circuit and component selections, development and equivalent circuit test results on an HVDC circuit breaker for an HVDC transmission line. A puffer type SF/sub 6/ gas interrupter for AC circuit breakers is utilized for interrupting DC current with injection of high-frequency inverse current from a commutating capacitor precharged to HVDC line voltage. Also, the effectiveness of application of the HVDC breaker to an HVDC system with two parallel transmission lines is demonstrated through the EMTP simulation.

Tokuyama, S.; Arimatsu, K.; Hirata, K.; Kato, Y.; Yoshioka, Y.

1985-09-01T23:59:59.000Z

408

Apparatus for and method of testing an electrical ground fault circuit interrupt device  

DOE Patents (OSTI)

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined.

Andrews, Lowell B. (2181-13th Ave. SW., Largo, FL 34640)

1998-01-01T23:59:59.000Z

409

Analysis of a 1200 kV circuit breaker for a gas insulated substation. Final report  

Science Conference Proceedings (OSTI)

This report describes the work carried out to analyze and design a circuit for use in 1200 kV gas insulated substations. The first part of the project was devoted to a thorough analysis of the requirements for the circuit breaker from the standpoint of the electrical system in which it would operate. A conceptual design was selected and all of the components of the circuit breaker were designed, modeled and verified. Finally a plan was prepared for the construction of a complete circuit breaker.

Not Available

1985-01-01T23:59:59.000Z

410

Rechargeable Battery Circuit Modeling and Analysis of the Battery Characteristic in Charging and Discharging Processes.  

E-Print Network (OSTI)

??In this thesis, an issue is post at the beginning, that there is limited experience in connecting a battery analytical model with a battery circuit… (more)

Kong, Dexinghui

2012-01-01T23:59:59.000Z

411

Short Circuit Current Contribution for Different Wind Turbine Generator Types: Preprint  

DOE Green Energy (OSTI)

This paper presents simulation results for short-circuit current contribution for different types of WTGs obtained through transient analysis using generic WTG models.

Muljadi, E.; Gevorgian, V.; Samaan, N.; Li, J.; Pasupulati, S.

2010-03-01T23:59:59.000Z

412

Apparatus for and method of testing an electrical ground fault circuit interrupt device  

DOE Patents (OSTI)

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined. 17 figs.

Andrews, L.B.

1998-08-18T23:59:59.000Z

413

Assertion-checker synthesis for hardware verification, in-circuit debugging and on-line monitoring.  

E-Print Network (OSTI)

??Producing error-free circuits is of paramount importance in the semiconductor industry. Assertions are becoming an indispensable means of verifying the correctness of increasingly complex digital… (more)

Boulé, Marc

2008-01-01T23:59:59.000Z

414

Radio frequency circuits for wireless receiver front-ends  

E-Print Network (OSTI)

The beginning of the 21st century sees great development and demands on wireless communication technologies. Wireless technologies, either based on a cable replacement or on a networked environment, penetrate our daily life more rapidly than ever. Low operational power, low cost, small form factor, and function diversity are the crucial requirements for a successful wireless product. The receiver??s front-end circuits play an important role in faithfully recovering the information transmitted through the wireless channel. Bluetooth is a short-range cable replacement wireless technology. A Bluetooth receiver architecture was proposed and designed using a pure CMOS process. The front-end of the receiver consists of a low noise ampli?er (LNA) and mixer. The intermediate frequency was chosen to be 2MHz to save battery power and alleviate the low frequency noise problem. A conventional LNA architecture was used for reliability. The mixer is a modi?ed Gilbert-cell using the current bleeding technique to further reduce the low frequency noise. The front-end draws 10 mA current from a 3 V power supply, has a 8.5 dB noise ?gure, and a voltage gain of 25 dB and -9 dBm IIP3. A front-end for dual-mode receiver is also designed to explore the capability of a multi-standard application. The two standards are IEEE 802.11b and Bluetooth. They work together making the wireless experience more exciting. The front-end is designed using BiCMOS technology and incorporating a direct conversion receiver architecture. A number of circuit techniques are used in the front-end design to achieve optimal results. It consumes 13.6 mA from a 2.5 V power supply with a 5.5 dB noise ?gure, 33 dB voltage gain and -13 dBm IIP3. Besides the system level contributions, intensive studies were carried out on the development of quality LNA circuits. Based on the multi-gated LNA structure, a CMOS LNA structure using bipolar transistors to provide linearization is proposed. This LNA con?guration can achieve comparable linearity to its CMOS multi-gated counterpart and work at a higher frequency with less power consumption. A LNA using an on-chip transformer source degeneration is proposed to realize input impedance matching. The possibility of a dual-band cellular application is studied. Finally, a study on ultra-wide band (UWB) LNA implementation is performed to explore the possibility and capability of CMOS technology on the latest UWB standard for multimedia applications.

Xin, Chunyu

2004-08-01T23:59:59.000Z

415

Time-Mode Analog Circuit Design for Nanometric Technologies  

E-Print Network (OSTI)

Rapid scaling in technology has introduced new challenges in the realm of traditional analog design. Scaling of supply voltage directly impacts the available voltage-dynamic-range. On the other hand, nanometric technologies with fT in the hundreds of GHz range open opportunities for time-resolution-based signal processing. With reduced available voltage-dynamic-range and improved timing resolution, it is more convenient to devise analog circuits whose performance depends on edge-timing precision rather than voltage levels. Thus, instead of representing the data/information in the voltage-mode, as a difference between two node voltages, it should be represented in time-mode as a time-difference between two rising and/or falling edges. This dissertation addresses the feasibility of employing time-mode analog circuit design in different applications. Specifically: 1) Time-mode-based quanitzer and feedback DAC of SigmaDelta ADC. 2) Time-mode-based low-THD 10MHz oscillator, 3) A Spur-Frequency Boosting PLL with -74dBc Reference-Spur Rejection in 90nm Digital CMOS. In the first project, a new architectural solution is proposed to replace the DAC and the quantizer by a Time-to-Digital converter. The architecture has been fabricated in 65nm and shows that this technology node is capable of achieving a time-matching of 800fs which has never been reported. In addition, a competitive figure-of-merit is achieved. In the low-THD oscillator, I proposed a new architectural solution for synthesizing a highly-linear sinusoidal signal using a novel harmonic rejection approach. The chip is fabricated in 130nm technology and shows an outstanding performance compared to the state of the art. The designed consumes 80% less power; consumes less area; provides much higher amplitude while being composed of purely digital circuits and passive elements. Last but not least, the spur-frequency boosting PLL employs a novel technique that eliminates the reference spurs. Instead of adding additional filtering at the reference frequency, the spur frequency is boosted to higher frequency which is, naturally, has higher filtering effects. The prototype is fabricated in 90nm digital CMOS and proved to provide the lowest normalized reference spurs ever reported.

Elsayed, Mohamed

2011-12-01T23:59:59.000Z

416

Generating Probability Distributions using Multivalued Stochastic Relay Circuits  

E-Print Network (OSTI)

The problem of random number generation dates back to von Neumann's work in 1951. Since then, many algorithms have been developed for generating unbiased bits from complex correlated sources as well as for generating arbitrary distributions from unbiased bits. An equally interesting, but less studied aspect is the structural component of random number generation as opposed to the algorithmic aspect. That is, given a network structure imposed by nature or physical devices, how can we build networks that generate arbitrary probability distributions in an optimal way? In this paper, we study the generation of arbitrary probability distributions in multivalued relay circuits, a generalization in which relays can take on any of N states and the logical 'and' and 'or' are replaced with 'min' and 'max' respectively. Previous work was done on two-state relays. We generalize these results, describing a duality property and networks that generate arbitrary rational probability distributions. We prove that these network...

Lee, David

2011-01-01T23:59:59.000Z

417

A programmable CCD driver circuit for multiphase CCD operation  

Science Conference Proceedings (OSTI)

A programmable CCD driver circuit was designed to drive CCD's in multiphased modes. The purpose of the drive electronics was to operate developmental CCD imaging arrays for NASA's Moderate Resolution Imaging Spectrometer - Tiltable (MODIS-T). Five prototype arrays were designed. Valid's Graphics Editor (GED) was used to design the driver. With this driver design, any of the five arrays can be readout. Designing the driver with GED allowed functional simulation, timing verification, and certain packaging analyses to be done on the design before fabrication. The driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400 Kpixels/sec. Timing and packaging parameters were verified. the design uses 54 TTL component chips.

Ewin, A.J.; Reed, K.V.

1989-02-01T23:59:59.000Z

418

Simulating Zeno physics by quantum quench with superconducting circuits  

E-Print Network (OSTI)

Studying out-of-equilibrium physics in quantum systems under quantum quench is of vast experimental and theoretical interests. Using periodic quantum quenches, we present an experimentally accessible scheme to simulate the quantum Zeno and anti-Zeno effects in an open quantum system of a single superconducting qubit interacting with an array of transmission line resonators. The scheme is based on the following two observations: Firstly, compared with conventional systems, the short-time non-exponential decay in our superconducting circuit system is readily observed; and secondly, a quench-off process mimics an ideal projective measurement when its time duration is sufficiently long. Our results show that quantum quenches can serve as a promising decoherence control strategy.

Qing-Jun Tong; Jun-Hong An; L. C. Kwek; Hong-Gang Luo; C. H. Oh

2013-10-24T23:59:59.000Z

419

Apparatus and method for defect testing of integrated circuits  

DOE Patents (OSTI)

An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.

Cole, Jr., Edward I. (Albuquerque, NM); Soden, Jerry M. (Placitas, NM)

2000-01-01T23:59:59.000Z

420

Programmable Differential Delay Circuit With Fine Delay Adjustment  

DOE Patents (OSTI)

Circuitry that provides additional delay to early arriving signals such that all data signals arrive at a receiving latch with same path delay. The delay of a forwarded clock reference is also controlled such that the capturing clock edge will be optimally positioned near quadrature (depending on latch setup/hold requirements). The circuitry continuously adapts to data and clock path delay changes and digital filtering of phase measurements reduce errors brought on by jittering data edges. The circuitry utilizes only the minimum amount of delay necessary to achieve objective thereby limiting any unintended jitter. Particularly, this programmable differential delay circuit with fine delay adjustment is designed to allow the skew between ASICS to be minimized. This includes skew between data bits, between data bits and clocks as well as minimizing the overall skew in a channel between ASICS.

DeRyckere, John F. (Eau Claire, WI); Jenkins, Philip Nord (Eau Claire, WI); Cornett, Frank Nolan (Chippewa Falls, WI)

2002-07-09T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


421

Printed Circuit Board Metal Powder Filters for Low Electron Temperatures  

E-Print Network (OSTI)

We report the characterisation of printed circuit boards (PCB) metal powder filters and their influence on the effective electron temperature which is as low as 22 mK for a quantum dot in a silicon MOSFET structure in a dilution refrigerator. We investigate the attenuation behaviour (10 MHz- 20 GHz) of filter made of four metal powders with a grain size below 50 um. The room-temperature attenuation of a stainless steel powder filter is more than 80 dB at frequencies above 1.5 GHz. In all metal powder filters the attenuation increases with temperature. Compared to classical powder filters, the design presented here is much less laborious to fabricate and specifically the copper powder PCB-filters deliver an equal or even better performance than their classical counterparts.

Filipp Mueller; Raymond N. Schouten; Matthias Brauns; Tian Gang; Wee Han Lim; Nai Shyan Lai; Andrew S. Dzurak; Wilfred G. van der Wiel; Floris A. Zwanenburg

2013-04-11T23:59:59.000Z

422

Quantum circuit optimization by topological compaction in the surface code  

E-Print Network (OSTI)

The fragile nature of quantum information limits our ability to construct large quantities of quantum bits suitable for quantum computing. An important goal, therefore, is to minimize the amount of resources required to implement quantum algorithms, many of which are serial in nature and leave large numbers of qubits idle much of the time unless compression techniques are used. Furthermore, quantum error-correcting codes, which are required to reduce the effects of noise, introduce additional resource overhead. We consider a strategy for quantum circuit optimization based on topological deformation in the surface code, one of the best performing and most practical quantum error-correcting codes. Specifically, we examine the problem of minimizing computation time on a two-dimensional qubit lattice of arbitrary, but fixed dimension, and propose two algorithms for doing so.

Adam Paetznick; Austin G. Fowler

2013-04-09T23:59:59.000Z

423

Multimode circuit QED with hybrid metamaterial transmission lines  

E-Print Network (OSTI)

Quantum transmission lines are a central to superconducting and hybrid quantum computing. Parallel to these developments are those of left-handed meta-materials. They have a wide variety of applications in photonics from the microwave to the visible range such as invisibility cloaks and perfect flat lenses. For classical guided microwaves, left-handed transmission lines have been proposed and studied on the macroscopic scale. We combine these ideas in presenting a left-handed/right-handed hybrid transmission line for applications in quantum optics on a chip. The resulting system allows circuit QED to reach a new regime: multi-mode ultra-strong coupling. Out of the many potential applications of this novel device, we discuss two; the preparation of multipartite entangled states and its use as a quantum simulator for the spin-boson model where a quantum phase transition is reached up to finite size-effects.

Daniel J. Egger; Frank K. Wilhelm

2013-02-22T23:59:59.000Z

424

Carports with Solar Panels do Double Duty for Navy | Department...  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

Carports with Solar Panels do Double Duty for Navy Carports with Solar Panels do Double Duty for Navy May 14, 2010 - 12:22pm Addthis Joshua DeLung What does this project do? In...

425

EA-1136: Double Tracks Test Site, Nye County, Nevada | Department...  

Energy.gov (U.S. Department of Energy (DOE)) Indexed Site

6: Double Tracks Test Site, Nye County, Nevada EA-1136: Double Tracks Test Site, Nye County, Nevada SUMMARY This EA evaluates the environmental impacts of the proposal for the U.S....

426

The Small Quantum Group as a Quantum Double  

E-Print Network (OSTI)

We prove that the quantum double of the quasi-Hopf algebra View the MathML source of We prove that the quantum double of the quasi-Hopf algebra Aq(g)

Etingof, Pavel I.

427

(DDBS) System Doubles Pot Suction, Reduces Roof Emission  

Science Conference Proceedings (OSTI)

... Suction (DDBS) System Doubles Pot Suction, Reduces Roof Emission .... Phase Change Materials in Thermal Energy Storage for Concentrating Solar Power ...

428

Search for ? + / EC double beta decay of 120 Te  

Science Conference Proceedings (OSTI)

We present a search for ? + / EC double beta decay of 120 Te performed with the CUORICINO experiment

C. Tomei; The CUORICINO Collaboration

2011-01-01T23:59:59.000Z

429

Tank characterization for Double-Shell Tank 241-AP-102  

SciTech Connect

This document provides the characterization information and interprets the data for Double-Shell Tank AP-102.

DeLorenzo, D.S.; DiCenso, A.T.; Amato, L.C.; Weyns-Rollosson, M.I.; Smith, D.J. [Los Alamos Technical Associates, Inc., Kennewick, WA (United States); Simpson, B.C.; Welsh, T.L. [Westinghouse Hanford Co., Richland, WA (United States)

1994-08-01T23:59:59.000Z

430

System Specification for the Double Shell Tank (DST) System  

Science Conference Proceedings (OSTI)

This document establishes the functional, performance, design, development, interface and test requirements for the Double-Shell Tank System.

GRENARD, C.E.

2000-04-21T23:59:59.000Z

431

Double layer capacitance of carbon foam electrodes  

DOE Green Energy (OSTI)

We have evaluated a wide variety of microcellular carbon foams prepared by the controlled pyrolysis and carbonization of several polymers including: polyacrylonitrile (PAN), polymethacrylonitrile (PMAN), resorcinol/formaldehyde (RF), divinylbenzene/methacrylonitrile (DVB), phenolics (furfuryl/alcohol), and cellulose polymers such as Rayon. The porosity may be established by several processes including: Gelation (1-5), phase separation (1-3,5-8), emulsion (1,9,10), aerogel/xerogel formation (1,11,12,13), replication (14) and activation. In this report we present the complex impedance analysis and double layer charging characteristics of electrodes prepared from one of these materials for double layer capacitor applications, namely activated cellulose derived microcellular carbon foam.

Delnick, F.M.; Ingersoll, D. [Sandia National Labs., Albuquerque, NM (United States); Firsich, D. [EG& G Mound Lab., Miamisburg, OH (United States)

1993-11-01T23:59:59.000Z

432

Double-clad nuclear fuel safety rod  

DOE Patents (OSTI)

A device for shutting down a nuclear reactor during an undercooling or overpower event, whether or not the reactor's scram system operates properly. This is accomplished by double-clad fuel safety rods positioned at various locations throughout the reactor core, wherein melting of a secondary internal cladding of the rod allows the fuel column therein to shift from the reactor core to place the reactor in a subcritical condition.

McCarthy, William H. (Los Altos, CA); Atcheson, Donald B. (Cupertino, CA); Vaidyanathan, Swaminathan (San Jose, CA)

1984-01-01T23:59:59.000Z

433

Dynamic thermal modelling of a power integrated circuit with the application of structure functions  

Science Conference Proceedings (OSTI)

This paper presents dynamic thermal analyses of a power integrated circuit with a cooling assembly. The investigations are based on the examination of the cumulative and differential structure functions obtained from the circuit cooling curves recorded ... Keywords: Contact thermal resistance, Heat transfer coefficient, Structure function, Thermal modelling and simulation

Marcin Janicki; Jedrzej Banaszczyk; Gilbert De Mey; Marek Kaminski; Bjorn Vermeersch; Andrzej Napieralski

2009-07-01T23:59:59.000Z

434

Fault diagnosis in reversible circuits under missing-gate fault model  

Science Conference Proceedings (OSTI)

This article presents a novel technique for fault detection as well as fault location in a reversible combinational circuit under the missing gate fault model. It is shown that in an (nxn) reversible circuit implemented with k-CNOT gates, addition of ...

Hafizur Rahaman; Dipak K. Kole; Debesh K. Das; Bhargab B. Bhattacharya

2011-07-01T23:59:59.000Z

435

Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only)  

Science Conference Proceedings (OSTI)

Nanotechnology promises to open up new ways of scaling CMOS circuits by introducing new materials. For example, a hybrid circuit of CMOS gates and carbon nano-tubes (CNT), NEMS relay logic and emerging memory devices have been proposed for future nano-scale ... Keywords: fpga, spin-torque devices, spintronics

Larkhoon Leem; James A. Weaver; Metha Jeeradit; James S. Harris

2010-02-01T23:59:59.000Z

436

Research on Monitoring System of Circuit Breakers Based on Neural Networks  

Science Conference Proceedings (OSTI)

The paper proposed a monitoring system for the circuit breakers in the substation based on the Back Propagation Neural Networks(BPNN). The novel temperature and humidity sensor was used in the system to get temperature and humidity value in the breakers. ... Keywords: Circuit Breakers, Monitoring System, Neural Networks, Malfunction Diagnosis

Yimin Hou; Tao Liu; Xiangmin Lun; Jianjun Lan; Yang Cui

2010-04-01T23:59:59.000Z

437

Students' understanding of direct current resistive electrical circuits Paula Vetter Engelhardta)  

E-Print Network (OSTI)

for the answer key as well as for the objectives. Both open- ended questions during the early development stagesStudents' understanding of direct current resistive electrical circuits Paula Vetter Engelhardta regarding direct current resistive electric circuits often differ from the accepted explanations. At present

Zollman, Dean

438

A new type of low power read circuit in EEPROM for UHF RFID  

Science Conference Proceedings (OSTI)

A novel low power read circuit without reference in 1k-bits electrically erasable and programmable (EEPROM) for UHF RFID is designed and implemented in SMIC 0.18@mm EEPROM process. The read power consumption is optimized using a pre-charge sense amplifier. ... Keywords: EEPROM, Low-power, RFID, Read circuit, Sense amplifier

Yongqian Du; Xiaoming Li; Li Dai; Xin Jing; Zhenrong Li; Hualian Tang; Yiqi Zhuang

2012-06-01T23:59:59.000Z

439

Engine with hydraulic fuel injection and ABS circuit using a single high pressure pump  

DOE Patents (OSTI)

An engine system comprises a hydraulically actuated fuel injection system and an ABS circuit connected via a fluid flow passage that provides hydraulic fluid to both the fuel injection system and to the ABS circuit. The hydraulically actuated system includes a high pressure pump. The fluid control passage is in fluid communication with an outlet from the high pressure pump.

Bartley, Bradley E. (Manito, IL); Blass, James R. (Bloomington, IL); Gibson, Dennis H. (Chillicothe, IL)

2001-01-01T23:59:59.000Z

440

Behavior-level yield enhancement approach for large-scaled analog circuits  

Science Conference Proceedings (OSTI)

In traditional yield enhancement approaches, a lot of computation efforts have to be paid first to find the feasible regions and the Pareto fronts, which will become a heavy cost for large analog circuits. In order to reduce the computation efforts, ... Keywords: analog circuits, process variation, yield enhancement

Chin-Cheng Kuo; Yen-Lung Chen; I-Ching Tsai; Li-Yu Chan; Chien-Nan Jimmy Liu

2010-06-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


441

AN INFINITE DIMENSIONAL DESCRIPTOR SYSTEM MODEL FOR ELECTRICAL CIRCUITS WITH TRANSMISSION LINES  

E-Print Network (OSTI)

AN INFINITE DIMENSIONAL DESCRIPTOR SYSTEM MODEL FOR ELECTRICAL CIRCUITS WITH TRANSMISSION LINES TIMO REIS Abstract. In this paper a model of linear electrical circuits with transmission lines is de-coupled with the telegraph equations who describe the behavior of the transmission lines. The resulting system of equations

Reis, Timo

442

Design and Implementation of Welding with Electromagnetic Trailing Peening Control Circuit  

Science Conference Proceedings (OSTI)

In order to eliminate welding stress and improve the quality of welding.The technology of constant frequency pulse width modulation (PWM) is applied in the design of control circuit of welding with trailing peening.AT89C52 is the core of the circuit.This ...

Meijiu Lu; Yuejin Ma; Jianguo Zhao; Jianchang Li; Jianjun Hao

2009-04-01T23:59:59.000Z

443

Charging-choke circuit with a crowbar for precision control of voltage  

DOE Patents (OSTI)

The operation of a circuit using a charging choke to obtain dc voltages is improved by constructing the circuit to be capable of producing a higher voltage than the desired value and crowbarring the charging choke when the load voltage reaches the desired value.

Praeg, W.F.

1975-11-25T23:59:59.000Z

444

A fully-integrated 5 Gbit/s CMOS clock and data recovery circuit  

Science Conference Proceedings (OSTI)

A fully-integrated 5 Gb/s PLL-based clock and data recovery circuit based on a linear half-rate phase detector (PD) architecture is presented. Data retiming performed by the linear PD provides practically no systematic offset for the operating frequency ... Keywords: CMOS analog integrated circuits, Clock data recovery, Half-rate CDR, Linear PD, PLL

Tan Kok-Siang; Mohd-Shahiman Sulaiman; Mamun Reaz; Chuah Hean-Teik; Manoj Sachdev

2007-05-01T23:59:59.000Z

445

Integrated Circuits Metering for Piracy Protection and Digital Rights Management: An Overview  

E-Print Network (OSTI)

Integrated Circuits Metering for Piracy Protection and Digital Rights Management: An Overview@rice.edu ABSTRACT This paper presents an overview of hardware and Integrated Circuits (IC) metering methods. IC metering or hardware metering refers to tools, methodologies, and protocols that enable post

446

Acceptance test procedure for removal of CS1K circuit switcher block and trip schemes  

Science Conference Proceedings (OSTI)

This supporting document provides a detailed process to test the functions of the circuit switcher, protective relays, alarms, SCADA and 125VDC control logic of 115kV and 13.8kV systems at B3S4 substation following the removal of trip and blocking schemes to Transformer No.1 Circuit Switcher B594.

HACHE, J.M.

1999-08-25T23:59:59.000Z

447

A module-level three-stage approach to the evolutionary design of sequential logic circuits  

Science Conference Proceedings (OSTI)

In this study, we propose a module-level three-stage approach (TSA) to optimize the evolutionary design for synchronous sequential circuits. TSA has a three stages process, involving a genetic algorithm (GA), a pre-evolution, and a re-evolution. In the ... Keywords: Data mining, Evolutionary approach, Frequently evolved blocks, Module-level, Redundant states, Sequential circuits, Three-stage

Yanyun Tao; Yuzhen Zhang; Jian Cao; Yalong Huang

2013-06-01T23:59:59.000Z

448

Cost-Effective Concurrent Test Hardware Design for Linear Analog Circuits Sule Ozev and Alex Orailoglu  

E-Print Network (OSTI)

overhead by reduc- ing the number of internal circuit nodes that need to be tapped. Parameter tolerances, electronic circuits are ever more susceptible to external up- sets, such as electron migration and radiation likely to be placed on system boundaries, heightening their exposure to environ- mental effects. Whereas

Orailoglu, Alex

449

Reducing Energy Usage of NULL Convention Logic Circuits using NULL Cycle Reduction  

E-Print Network (OSTI)

in approximately 25% overall lower energy usage. Keywords: asynchronous circuits; NULL Convention Logic (NCL); NULLReducing Energy Usage of NULL Convention Logic Circuits using NULL Cycle Reduction Combined with Supply Voltage Scaling Brett Sparkman and Scott C. Smith Department of Electrical Engineering, University

Smith, Scott C.

450

Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection  

Science Conference Proceedings (OSTI)

We present a novel multiple-threshold circuit using resonant-tunneling diodes (RTDs). The logic operation is based on detecting a switching sequence in the RTD circuit. This scheme enables us to increase the number of threshold voltages by more than ... Keywords: Resonant-tunneling diode, Multiple-threshold, analog-to-digital converter

Takao Waho; Kazufumi Hattori; Kouji Honda

2000-05-01T23:59:59.000Z

451

Artificial neural network control of a heat exchanger in a closed flow air circuit  

Science Conference Proceedings (OSTI)

This paper experimentally investigates the control of a heat exchanger in a closed flow air circuit. The temperature inside the test section of the test facility has been maintained at a set value by variation of air flow rate over the heat exchanger ... Keywords: Air circuit, Heat exchanger, Multi-layer perceptron, Neural network control, PID control

Kapil Varshney; P. K. Panigrahi

2005-07-01T23:59:59.000Z

452

Automated synthesis of discrete-time sigma-delta modulators from system architecture to circuit netlist  

Science Conference Proceedings (OSTI)

A synthesis tool consisting of coefficient synthesis of architecture, circuit specifications synthesis, and CMOS operational-amplifier (op-amp) synthesis for discrete-time sigma-delta modulators (SDMs) is presented. In circuit specifications synthesis, ... Keywords: Automated synthesis, Behavioral modeling, Geometric programming, Op-amp synthesis, Sigma-delta modulator, Transistor sizing

Shuenn-Yuh Lee; Chih-Yuan Chen; Jia-Hua Hong; Rong-Guey Chang; Mark Po-Hung Lin

2011-02-01T23:59:59.000Z

453

Design of Control Circuit of Seawater Treatment System Based on Microprocessor  

Science Conference Proceedings (OSTI)

Among numerous seawater treatment methods, electrolysis belongs to a relatively ideal method with good treatment effect. Basically, it can reach the standards of safe, effective, economical and environment-friendly. The control circuit part design of ... Keywords: seawater treatment system, MCU, synchronous circuit, trigger module, data acquisition

Yanping Gao; Xianjiu Guo; Xianqiang Lv

2009-01-01T23:59:59.000Z

454

Technology independent circuit sizing for standard cell based design using neural networks  

Science Conference Proceedings (OSTI)

This paper presents a neural network (NN) approach for modeling the time characteristics of fundamental gates of digital integrated circuits that include inverter, NAND, NOR, and XOR gates. The modeling approach presented here is technology independent, ... Keywords: Computer aided design, Digital integrated circuits, Neural networks

Nihan Kahraman; Tulay Yildirim

2009-07-01T23:59:59.000Z

455

Time-stepping numerical simulation of switched circuits within the nonsmooth dynamical systems approach  

Science Conference Proceedings (OSTI)

The numerical integration of switching circuits is known to be a tough issue when the number of switches is large, or when sliding modes exist. Then, classical analog simulators may behave poorly, or even fail. In this paper, it is shown on two examples ... Keywords: analog simulation, backward Euler algorithm, complementarity dynamical systems, complementarity problems, multivalued systems, power converters, switching circuits, unilateral state constraints

Vincent Acary; Olivier Bonnefon; Bernard Brogliato

2010-07-01T23:59:59.000Z

456

A Microscopic Double-Slit Experiment  

NLE Websites -- All DOE Office Websites (Extended Search)

A Microscopic Double-Slit Experiment Print A Microscopic Double-Slit Experiment Print Two centuries ago, Thomas Young performed the classic demonstration of the wave nature of light. He placed a screen with two tiny slits in front of a single light source, effectively converting it into a two-centered source. On a second screen far away, he saw a pattern of light and dark diffraction fringes, a well-known hallmark of wave interference. Along with later studies using particles instead of light, the experiment played a crucial role in establishing the validity of wave-particle duality, a puzzling concept that has ultimately become central to the interpretation of complementarity in quantum mechnanics. In a new twist on this classic experiment, the double slit (with light waves) has been replaced by a diatomic molecule (with electron waves). At ALS Beamline 10.0.1, researchers have shown that diatomic molecules can serve as two-center emitters of electron waves and that traces of electron-wave interference can be directly observed in precise measurements of vibrationally resolved photoionization spectra.

457

A Microscopic Double-Slit Experiment  

NLE Websites -- All DOE Office Websites (Extended Search)

A Microscopic Double-Slit Experiment Print A Microscopic Double-Slit Experiment Print Two centuries ago, Thomas Young performed the classic demonstration of the wave nature of light. He placed a screen with two tiny slits in front of a single light source, effectively converting it into a two-centered source. On a second screen far away, he saw a pattern of light and dark diffraction fringes, a well-known hallmark of wave interference. Along with later studies using particles instead of light, the experiment played a crucial role in establishing the validity of wave-particle duality, a puzzling concept that has ultimately become central to the interpretation of complementarity in quantum mechnanics. In a new twist on this classic experiment, the double slit (with light waves) has been replaced by a diatomic molecule (with electron waves). At ALS Beamline 10.0.1, researchers have shown that diatomic molecules can serve as two-center emitters of electron waves and that traces of electron-wave interference can be directly observed in precise measurements of vibrationally resolved photoionization spectra.

458

A background free double beta decay experiment  

E-Print Network (OSTI)

We present a new detection scheme for rejecting backgrounds in neutrino less double beta decay experiments. It relies on the detection of Cherenkov light emitted by electrons in the MeV region. The momentum threshold is tuned to reach a good discrimination between background and good events. We consider many detector concepts and a range of target materials. The most promising is a high-pressure 136Xe emitter for which the required energy threshold is easily adjusted. Combination of this concept and a high pressure Time Projection Chamber could provide an optimal solution. A simple and low cost effective solution is to use the Spherical Proportional Counter that provides two delayed signals from ionization and Cherenkov light. In solid-state double beta decay emitters, because of their higher density, the considered process is out of energy range. An alternative solution could be the development of double decay emitters with lower density by using for instance the aerogel technique. It is surprising that a technology used for particle identification in high-energy physics becomes a powerful tool for rejecting backgrounds in such low-energy experiments.

Ioannis Giomataris

2010-12-20T23:59:59.000Z

459

A semi-custom dual channel peak hold circuit for spaceborne instrumentation  

Science Conference Proceedings (OSTI)

A monolithic dual channel peak hold circuit is developed using a semi-custom Application Specific Integrated Circuit (ASIC). The circuit is designed specifically for spaceborne instrumentation that requires low power operation and low mass packaging. Each independent circuit holds positive pulses and consists of a differential transconductance amplifier followed by a one way current amplifier. Input gate and output hold functions are enabled by standard TTL or CMOS logic levels. To accommodate a range of applications. quiescent power is adjustable for performance-power tradeoff or can be disabled for single channel use. Fabricated with dielectrically isolated vertical geometry NPN and PNP transistors the circuit is inherently radiation-hard and immune to transient upset.

Sweet, M.R.; Grace, K.M.

1992-01-01T23:59:59.000Z

460

A semi-custom dual channel peak hold circuit for spaceborne instrumentation  

SciTech Connect

A monolithic dual channel peak hold circuit is developed using a semi-custom Application Specific Integrated Circuit (ASIC). The circuit is designed specifically for spaceborne instrumentation that requires low power operation and low mass packaging. Each independent circuit holds positive pulses and consists of a differential transconductance amplifier followed by a one way current amplifier. Input gate and output hold functions are enabled by standard TTL or CMOS logic levels. To accommodate a range of applications. quiescent power is adjustable for performance-power tradeoff or can be disabled for single channel use. Fabricated with dielectrically isolated vertical geometry NPN and PNP transistors the circuit is inherently radiation-hard and immune to transient upset.

Sweet, M.R.; Grace, K.M.

1992-12-01T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
they are not comprehensive nor are they the most current set.
We encourage you to perform a real-time search of NLEBeta
to obtain the most current and comprehensive results.


461

Offset-free rail-to-rail derandomizing peak detect-and-hold circuit  

Science Conference Proceedings (OSTI)

A peak detect-and-hold circuit eliminates errors introduced by conventional amplifiers, such as common-mode rejection and input voltage offset. The circuit includes an amplifier, three switches, a transistor, and a capacitor. During a detect-and-hold phase, a hold voltage at a non-inverting in put terminal of the amplifier tracks an input voltage signal and when a peak is reached, the transistor is switched off, thereby storing a peak voltage in the capacitor. During a readout phase, the circuit functions as a unity gain buffer, in which the voltage stored in the capacitor is provided as an output voltage. The circuit is able to sense signals rail-to-rail and can readily be modified to sense positive, negative, or peak-to-peak voltages. Derandomization may be achieved by using a plurality of peak detect-and-hold circuits electrically connected in parallel.

DeGeronimo, Gianluigi (Nesconset, NY); O'Connor, Paul (Bellport, NY); Kandasamy, Anand (Coram, NY)

2003-01-01T23:59:59.000Z

462

Low Insertion HVDC Circuit Breaker: Magnetically Pulsed Hybrid Breaker for HVDC Power Distribution Protection  

SciTech Connect

GENI Project: General Atomics is developing a direct current (DC) circuit breaker that could protect the grid from faults 100 times faster than its alternating current (AC) counterparts. Circuit breakers are critical elements in any electrical system. At the grid level, their main function is to isolate parts of the grid where a fault has occurred—such as a downed power line or a transformer explosion—from the rest of the system. DC circuit breakers must interrupt the system during a fault much faster than AC circuit breakers to prevent possible damage to cables, converters and other grid-level components. General Atomics’ high-voltage DC circuit breaker would react in less than 1/1,000th of a second to interrupt current during a fault, preventing potential hazards to people and equipment.

None

2012-01-09T23:59:59.000Z

463

A Compact Parallel-plane Perpendicular-current Feed for a Modified Equiangular Spiral Antenna and Related Circuits  

E-Print Network (OSTI)

This work describes the design and measurement of a compact bidirectional ultrawideband (UWB) modified equiangular spiral antenna with an integrated feed internally matched to a 50-Ohm microstrip transmission line. A UWB transition from microstrip to double-sided parallel-strip line (DSPSL) soldered to a short (1.14 mm) twin-line transmission line feeds the spiral. The currents on the feed travel in a direction approximately perpendicular to the direction of the currents on the spiral at the points where the feed passes the spiral in close proximity (0.57 mm). Holes were etched from the metal arms of the spiral to reduce the impedance mismatch caused by coupling between the transmission line feed and the spiral. This work also describes a low-loss back-to-back transition from coaxial line to DSPSL, an in-phase connectorized 3 dB DSPSL power divider made using three of those transitions, a 2:1 in-phase DSPSL power divider, a 3:1 in-phase DSPSL power divider, a radial dipole fed by DSPSL, an array of those dipoles utilizing the various power dividers, and a UWB circular monopole antenna fed by DSPSL. Measured and simulated results show good agreement for the designed antennas and circuits.

Eubanks, Travis Wayne

2010-05-01T23:59:59.000Z

464

NBTI induced performance degradation in logic and memory circuits: how effectively can we approach a reliability solution?  

Science Conference Proceedings (OSTI)

This paper evaluates the severity of negative bias temperature instability (NBTI) degradation in two major circuit applications: random logic and memory array. For improved lifetime stability, we propose/select an efficient reliability-aware circuit ...

Kunhyuk Kang; Saakshi Gangwal; Sang Phill Park; Kaushik Roy

2008-01-01T23:59:59.000Z

465

Generalised Clifford groups and simulation of associated quantum circuits  

E-Print Network (OSTI)

Quantum computations that involve only Clifford operations are classically simulable despite the fact that they generate highly entangled states; this is the content of the Gottesman-Knill theorem. Here we isolate the ingredients of the theorem and provide generalisations of some of them with the aim of identifying new classes of simulable quantum computations. In the usual construction, Clifford operations arise as projective normalisers of the first and second tensor powers of the Pauli group. We consider replacing the Pauli group by an arbitrary finite subgroup G of U(d). In particular we seek G such that G tensor G has an entangling normaliser. Via a generalisation of the Gottesman-Knill theorem the resulting normalisers lead to classes of quantum circuits that can be classically efficiently simulated. For the qubit case d=2 we exhaustively treat all finite subgroups of U(2) and find that the only ones (up to unitary equivalence and trivial phase extensions) with entangling normalisers are the groups G_n generated by X and the n^th root of Z.

Sean Clark; Richard Jozsa; Noah Linden

2007-01-15T23:59:59.000Z

466

Life testing of a low voltage air circuit breaker  

Science Conference Proceedings (OSTI)

A DS-416 low voltage air circuit breaker manufactured by Westinghouse was mechanically cycled to identify age-related degradation in the various breaker subcomponents, specifically the power-operated mechanism. This accelerated aging test was performed on one breaker unit for over 36,000 cycles. Three separate pole shafts, one with a 60-degree weld, one with a 120-degree weld, and one with a 180-degree weld in the third pole lever were used to characterize cracking in the welds. In addition, during the testing three different operating mechanisms and several other parts were replaced as they became inoperable. Among the seven welds on the pole shaft, {number_sign}1 and {number_sign}3 were found to be critical ones whose fracture can result in misalignment of the pole levers. This can lead to problems with the operating mechanism, including the burning of coils, excessive wear in certain parts, and overstressed linkages. Furthermore, the limiting service life of a number of subcomponents of the power-operated mechanism, including the operating mechanism itself, were assessed. Based on these findings, suggestions are provided to alleviate the age-related degradation that could occur as a result of normal closing and opening of the breaker contacts during its service life. Also, cause and effect analyses of various age-related degradation in various breaker parts are discussed.

Subudhi, M. [Brookhaven National Lab., Upton, NY (United States); Aggarwal, S. [Nuclear Regulatory Commission, Washington, DC (United States)

1992-06-01T23:59:59.000Z

467

Life testing of a low voltage air circuit breaker  

Science Conference Proceedings (OSTI)

A DS-416 low voltage air circuit breaker manufactured by Westinghouse was mechanically cycled to identify age-related degradation in the various breaker subcomponents, specifically the power-operated mechanism. This accelerated aging test was performed on one breaker unit for over 36,000 cycles. Three separate pole shafts, one with a 60-degree weld, one with a 120-degree weld, and one with a 180-degree weld in the third pole lever were used to characterize cracking in the welds. In addition, during the testing three different operating mechanisms and several other parts were replaced as they became inoperable. Among the seven welds on the pole shaft, {number sign}1 and {number sign}3 were found to be critical ones whose fracture can result in misalignment of the pole levers. This can lead to problems with the operating mechanism, including the burning of coils, excessive wear in certain parts, and overstressed linkages. Furthermore, the limiting service life of a number of subcomponents of the power-operated mechanism, including the operating mechanism itself, were assessed. Based on these findings, suggestions are provided to alleviate the age-related degradation that could occur as a result of normal closing and opening of the breaker contacts during its service life. Also, cause and effect analyses of various age-related degradation in various breaker parts are discussed.

Subudhi, M. (Brookhaven National Lab., Upton, NY (United States)); Aggarwal, S. (Nuclear Regulatory Commission, Washington, DC (United States))

1992-01-01T23:59:59.000Z

468

Heat Pump Cycle with Solution Circuit and Internal Heat Exchange  

E-Print Network (OSTI)

Vapor compression heat pumps which employ working fluid mixtures rather than pure substances offer significant advantages leading to larger temperature lifts at low pressure ratios or to completely new applications. The main feature of such cycles is the fact that the working fluid mixture does not evaporate completely in the evaporator. The remaining liquid phase is then recirculated by means of a liquid pump into the condenser. This yields significant improvements compared to conventional systems: -Adjustable gliding temperature intervals in desorber and absorber by merely adjusting the flow rate through the liquid pump and/or –Dramatically reducing pressure ratios (to typically 45% of the one for a single working fluid heat pump) for a given temperature lift due to staging of the solution circuit. The latter is accomplished when a two-stage version of this cycle is used. In this paper, another version of such cycles will be discussed which offers the same low pressure ratio as a previously discussed two-stage cycle, but requires only one liquid pump. The performance of this cycle has been calculated and the results are presented.

Radermacher, R.

1986-06-01T23:59:59.000Z

469

Series-counterpulse repetitive-pulse inductive storage circuit  

DOE Patents (OSTI)

A high-power series-counterpulse repetitive-pulse inductive energy storage and transfer circuit includes an opening switch, a main energy storage coil, and a counterpulse capacitor. The load pulse is initiated simultaneously with the initiation of the counterpulse which is used to turn the opening switch off. There is no delay from command to output pulse. During the load pulse, the counterpulse capacitor is first discharged and then recharged in the opposite polarity with sufficient energy to accomplish the load counterpulse which terminates the load pulse and turns the load switch off. When the main opening switch is triggered closed again to terminate the load pulse, the counterpulse capacitor discharges in the reverse direction through the load switch and through the load, causing a rapid, sharp cutoff of the load pulse as well as recovering any energy remaining in the load inductance. The counterpulse capacitor is recharged to its original condition by the main energy storage coil after the load pulse is over, not before it begins.

Honig, Emanuel M. (Los Alamos, NM)

1986-01-01T23:59:59.000Z

470

Prediction of Multi-Physics Behaviors of Large Lithium-Ion Batteries During Internal and External Short Circuit (Presentation)  

DOE Green Energy (OSTI)

This presentation describes the multi-physics behaviors of internal and external short circuits in large lithium-ion batteries.

Kim, G. H.; Lee, K. J.; Chaney, L.; Smith, K.; Darcy, E.; Pesaran, A.; Darcy, E.

2010-11-01T23:59:59.000Z

471

Optical double-slit particle measuring system  

DOE Patents (OSTI)

A method for in situ measurement of particle size is described. The size information is obtained by scanning an image of the particle across a double-slit mask and observing the transmitted light. This method is useful when the particle size of primary interest is 3..mu..m and larger. The technique is well suited to applications in which the particles are non-spherical and have unknown refractive index. It is particularly well suited to high temperature environments in which the particle incandescence provides the light source.

Tichenor, D.A.; Wang, J.C.F.; Hencken, K.R.

1982-03-25T23:59:59.000Z

472

Massive Type II in Double Field Theory  

E-Print Network (OSTI)

We provide an extension of the recently constructed double field theory formulation of the low-energy limits of type II strings, in which the RR fields can depend simultaneously on the 10-dimensional space-time coordinates and linearly on the dual winding coordinates. For the special case that only the RR one-form of type IIA carries such a dependence, we obtain the massive deformation of type IIA supergravity due to Romans. For T-dual configurations we obtain a `massive' but non-covariant formulation of type IIB, in which the 10-dimensional diffeomorphism symmetry is deformed by the mass parameter.

Olaf Hohm; Seung Ki Kwak

2011-08-24T23:59:59.000Z

473

Double acting stirling engine phase control  

DOE Patents (OSTI)

A mechanical device for effecting a phase change between the expansion and compression volumes of a double-acting Stirling engine uses helical elements which produce opposite rotation of a pair of crankpins when a control rod is moved, so the phase between two pairs of pistons is changed by +.psi. and the phase between the other two pairs of pistons is changed by -.psi.. The phase can change beyond .psi.=90.degree. at which regenerative braking and then reversal of engine rotation occurs.

Berchowitz, David M. (Scotia, NY)

1983-01-01T23:59:59.000Z

474

Neutrinoless double beta decay and neutrino masses  

SciTech Connect

Neutrinoless double beta decay (0{nu}{beta}{beta}) is a promising test for lepton number violating physics beyond the standard model (SM) of particle physics. There is a deep connection between this decay and the phenomenon of neutrino masses. In particular, we will discuss the relation between 0{nu}{beta}{beta} and Majorana neutrino masses provided by the so-called Schechter-Valle theorem in a quantitative way. Furthermore, we will present an experimental cross check to discriminate 0{nu}{beta}{beta} from unknown nuclear background using only one isotope, i.e., within one experiment.

Duerr, Michael [Max-Planck-Institut fuer Kernphysik, Saupfercheckweg 1, 69117 Heidelberg (Germany)

2012-07-27T23:59:59.000Z

475

Double Photoionization of excited Lithium and Beryllium  

SciTech Connect

We present total, energy-sharing and triple differential cross sections for one-photon, double ionization of lithium and beryllium starting from aligned, excited P states. We employ a recently developed hybrid atomic orbital/ numerical grid method based on the finite-element discrete-variable representation and exterior complex scaling. Comparisons with calculated results for the ground-state atoms, as well as analogous results for ground-state and excited helium, serve to highlight important selection rules and show some interesting effects that relate to differences between inter- and intra-shell electron correlation.

Yip, Frank L.; McCurdy, C. William; Rescigno, Thomas N.

2010-05-20T23:59:59.000Z

476

Double Photoionization of Aligned Molecular Hydrogen  

SciTech Connect

We present converged, completely ab initio calculations ofthe triple differential cross sections for double photoionization ofaligned H2 molecules for a photon energy of 75.0 eV. The method ofexterior complex scaling, implemented with both the discrete variablerepresentation and B-splines, is used to solve the Schroedinger equationfor a correlated continuum wave function corresponding to a single photonhaving been absorbed by a correlated initial state. Results for a fixedinternuclear distance are compared with recent experiments and show thatintegration over experimental angular and energy resolutions is necessaryto produce good qualitative agreement, but does not eliminate somediscrepancies. Limitations of current experimental resolution are shownto sometimes obscure interesting details of the crosssection.

Vanroose, Wim; Horner, Daniel A.; Martin, Fernando; Rescigno,Thomas N.; McCurdy, C. William

2006-07-21T23:59:59.000Z

477

Condition and Power Transfer Assessment of CenterPoint Energy's Polk-Garrott Pipe-Type Cable Circuit  

Science Conference Proceedings (OSTI)

This report summarizes distributed fiber optic temperature sensing (DFOTS) on pipe-type cable circuits and the results of modifying and implementing EPRI's Dynamic Thermal Circuit Rating (DTCR) system on CenterPoint's Polk-Garrott pipe-type cable circuit in Houston, Texas.

2002-12-12T23:59:59.000Z

478

Development of a Novel Test Method for On-Demand Internal Short Circuit in a Li-Ion Cell (Presentation)  

DOE Green Energy (OSTI)

This presentation describes a cell-level test method that simulates an emergent internal short circuit, produces consistent and reproducible test results, can establish the locations and temperatures/power/SOC conditions where an internal short circuit will result in thermal runaway, and provides relevant data to validate internal short circuit models.

Keyser, M.; Long, D.; Jung, Y. S.; Pesaran, A.; Darcy, E.; McCarthy, B.; Patrick, L.; Kruger, C.

2011-01-01T23:59:59.000Z

479

The Double Chooz reactor neutrino experiment  

E-Print Network (OSTI)

The Double Chooz reactor neutrino experiment will be the next detector to search for a non vanishing theta13 mixing angle with unprecedented sensitivity, which might open the way to unveiling CP violation in the leptonic sector. The measurement of this angle will be based in a precise comparison of the antineutrino spectrum at two identical detectors located at different distances from the Chooz nuclear reactor cores in France. Double Chooz is particularly attractive because of its capability to measure sin2(2theta13) to 3 sigmas if sin2(2theta13) > 0.05 or to exclude sin2(2theta13) down to 0.03 at 90% C.L. for Dm2 = 2.5 x 10-3 eV2 in three years of data taking with both detectors. The construction of the far detector starts in 2008 and the first neutrino results are expected in 2009. The current status of the experiment, its physics potential and design and expected performance of the detector are reviewed.

I. Gil-Botella

2007-10-23T23:59:59.000Z

480

Reactor instrumentation and safety circuit status review and program document  

SciTech Connect

This document has been prepared for internal use by the General Electric Company to serve as a program for evaluating reactor instrumentation and safety circuit equipment needs. It is intended that this document be used as a guide for defining, planning and scheduling engineering effort; budgeting of capital money; and project planning for new instrumentation systems. Effort will be made to periodically evaluate the status of the programs presented and provide updating information accordingly.After a plant has been built and operated for a number of years, it becomes apparent to operating and engineering personnel that certain modifications in controls and monitoring systems would provide both tangible and intangible benefits. Systems which were once thought to be the primary points of control shift in importance as others become recognized. As time passes this shifting spreads the main control focus from the central control desk to various other areas in the control room. Production rate increases cause instrument ranges and scales to be changed so that information on the process can still be obtained from existing equipment. Response times, sensitivity, limits, and time constants which were figured for one level must be used or revised for new levels. Further, it is discovered that the process monitoring points could be relocated or increased in number to provide more and better data on plant operation. New monitoring equipment is developed and installed to fill voids in information so production can continue meeting high standards for safety and process control. Equipment is fitted here and there in an already crowded control room, and some is even relocated to less advantageous positions to make available the necessary panel space. This in brief, is the rather complex status of Hanford Production Reactor instrumentation today.

Deichman, J.L.

1963-02-15T23:59:59.000Z

Note: This page contains sample records for the topic "grande-empire double circuit" from the National Library of EnergyBeta (NLEBeta).
While these samples are representative of the content of NLEBeta,
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481

Edison Revisited: Should we use DC Circuits for Lighting in Commercial  

NLE Websites -- All DOE Office Websites (Extended Search)

Edison Revisited: Should we use DC Circuits for Lighting in Commercial Edison Revisited: Should we use DC Circuits for Lighting in Commercial Buildings? Speaker(s): Brinda Thomas Date: March 7, 2012 - 12:30pm Location: 90-3122 Seminar Host/Point of Contact: Chris Marnay This seminar summarizes work from a forthcoming Energy Policy paper and thoughts on future work to understand the economics of DC building circuits. We examined the economic feasibility of a general application of DC building circuits to operate commercial lighting systems. We compare light-emitting diodes (LEDs) and fluorescents that are powered by either a central DC power supply or traditional AC grid electricity, with and without solar photovoltaics (PV) and battery back-up. We find that there are limited life-cycle ownership cost and capital cost benefits of DC

482

Materials and devices for optical switching and modulation of photonic integrated circuits  

E-Print Network (OSTI)

The drive towards photonic integrated circuits (PIC) necessitates the development of new devices and materials capable of achieving miniaturization and integration on a CMOS compatible platform. Optical switching: fast ...

Seneviratne, Dilan Anuradha

2007-01-01T23:59:59.000Z

483

Distributed control of reactive power flow in a radial distribution circuit with high photovoltaic penetration  

E-Print Network (OSTI)

We show how distributed control of reactive power can serve to regulate voltage and minimize resistive losses in a distribution circuit that includes a significant level of photovoltaic (PV) generation. To demonstrate the technique, we consider a radial distribution circuit with a single branch consisting of sequentially-arranged residential-scale loads that consume both real and reactive power. In parallel, some loads also have PV generation capability. We postulate that the inverters associated with each PV system are also capable of limited reactive power generation or consumption, and we seek to find the optimal dispatch of each inverter's reactive power to both maintain the voltage within an acceptable range and minimize the resistive losses over the entire circuit. We assume the complex impedance of the distribution circuit links and the instantaneous load and PV generation at each load are known. We compare the results of the optimal dispatch with a suboptimal local scheme that does not require any com...

Turitsyn, Konstantin; Backhaus, Scott; Chertkov, Michael

2009-01-01T23:59:59.000Z

484

The fine art of electronics : paper-based circuits for creative expression  

E-Print Network (OSTI)

This thesis investigates the creative possibilities enabled by combining circuit building with paper craft to create paper electronics-a medium that adds the magical interactivity of electronics to the physical intuitiveness ...

Qi, Jie, S.M. Massachusetts Institute of Technology

2012-01-01T23:59:59.000Z

485

An auxiliary capacitor based ultra-fast drive circuit for shear piezoelectric motors  

E-Print Network (OSTI)

Shear piezoelectric motors frequently require large voltage changes on very short time scales. Since piezos behave electrically as capacitors, this requires a drive circuit capable of quickly sourcing or sinking a large ...

Chatterjee, Kamalesh

486

Reachability analysis of nonlinear analog circuits through iterative reachable set reduction  

Science Conference Proceedings (OSTI)

We propose a methodology for reachability analysis of nonlinear analog circuits to verify safety properties. Our iterative reachable set reduction algorithm initially considers the entire state space as reachable. Our algorithm iteratively determines ...

Seyed Nematollah Ahmadyan, Shobha Vasudevan

2013-03-01T23:59:59.000Z

487

Time-based circuits for communication systems in advanced CMOS technology  

E-Print Network (OSTI)

As device size scales down, there have been challenges to design conventional analog circuits, such as low voltage headroom and the low intrinsic gain of a device. Although ever-decreasing device channel length in CMOS ...

Park, Min, Ph. D. Massachusetts Institute of Technology

2009-01-01T23:59:59.000Z

488

Estimation of statistical variation in temporal NBTI degradation and its impact on lifetime circuit performance  

Science Conference Proceedings (OSTI)

Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability concerns in sub-100nm technologies. So far, studies of NBTI and its impact on circuit performance have assumed an average behavior of the degradation process. However, ...

Kunhyuk Kang; Sang Phill Park; Kaushik Roy; Muhammad A. Alam

2007-11-01T23:59:59.000Z

489

RISCE—a reduced instruction set circuit extractor for hierarchical VLSI layout verification  

Science Conference Proceedings (OSTI)

We present a circuit extractor preserving the hierarchical layout structure isomorphically. As opposed to existing extractors, our approach permits all cell overlaps which are electrically meaningful. New mask operations based on stretched geometries ...

Volker Henkel; Ulrich Golze

1988-06-01T23:59:59.000Z

490

A Retrofit 60 Hz Current Sensor for Power Monitoring at the Circuit Breaker Panel  

E-Print Network (OSTI)

Improved signal conditioning electronics and new experimental results are presented for a sensor that measures current flow in a circuit breaker. A PIC microcontroller optimizes the phase reference for the synchronous ...

Cooley, John J.

491

Charge collection in GaAs MESFET circuits using a high energy microbeam  

Science Conference Proceedings (OSTI)

The mechanisms responsible for single event upsets can be studied more realistically in transistors that are part of an integrated test circuit than in single isolated test transistors with fixed biases on all the nodes. Both energetic, heavy ions and focused, pulsed laser light were used to generate transient voltages at a number of different nodes in a GaAs MESFET integrated test circuit. Three-dimensional maps of charge collection regions were generated with the use of the scanning ion microprobe at Gesellschaft fuer Schwerionenforschung (GSI). The results showed that charge was collected from all areas of the circuit, but with different efficiencies at different injection sites. Regions not covered with metal were exposed to pulsed laser light. The resulting transients had pulse shapes similar to those generated by ions and amplitudes that also depended on ion strike location. These results illustrate the usefulness of the ion microprobe technique for obtaining spatial and temporal information about SEU in integrated circuits.

Buchner, S.; Weatherford, T.; Knudson, A.; McDonald, P. [SFA, Landover, MD (United States); Campbell, A.B.; McMorrow, D. [Naval Research Lab., Washington, DC (United States); Fischer, B.; Metzger, S.; Schloegl, M. [Gesellschaft fuer Schwerionenforschung, Darmstadt (Germany)

1996-12-01T23:59:59.000Z

492

Simulation and visualization of fields and energy flows in electric circuits with idealized geometries  

E-Print Network (OSTI)

This thesis develops a method to simulate and visualize the fields and energy flows in electric circuits, using a simplified physical model based on an idealized geometry. The physical models combine and extend previously ...

Ohannessian, Mesrob I., 1981-

2005-01-01T23:59:59.000Z

493

Comparator design and analysis for comparator-based switched-capacitor circuits  

E-Print Network (OSTI)

The design of high gain, wide dynamic range op-amps for switched-capacitor circuits has become increasingly challenging with the migration of designs to scaled CMOS technologies. The reduced power supply voltages and the ...

Sepke, Todd C. (Todd Christopher), 1975-

2007-01-01T23:59:59.000Z

494

(VDL)² : a jitter measurement built-in self-test circuit for phase locked loops  

E-Print Network (OSTI)

This paper discusses the development of a new type of BIST circuit, the (VDL)2, with the purpose of measuring jitter in IBM's phase locked loops. The (VDL)2, which stands for Variable Vernier Digital Delay Locked Line, ...

Kam, Brandon Ray

2005-01-01T23:59:59.000Z

495

Nuclear Maintenance Applications Center: Assessment of Printed Circuit Board Diagnostic Techniques  

Science Conference Proceedings (OSTI)

This project evaluated the techniques, theoretical methods, and recommendations made in previous EPRI reports on printed circuit boards (PCBs). The goal was to find techniques to help manage PCB life.

2009-03-31T23:59:59.000Z

496

Energy efficient control for power management circuits operating from nano-watts to watts  

E-Print Network (OSTI)

Energy efficiency and form factor are the key driving forces in today's power electronics. All power delivery circuits, irrespective of the magnitude of power, basically consists of power trains, gate drivers and control ...

Bandyopadhyay, Saurav

2013-01-01T23:59:59.000Z

497

Integrated circuit failure analysis by low-energy charge-induced voltage alteration  

DOE Patents (OSTI)

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs.

Cole, Jr., Edward I. (2116 White Cloud St., NE., Albuquerque, NM 87112)

1996-01-01T23:59:59.000Z

498

Integrated circuit failure analysis by low-energy charge-induced voltage alteration  

DOE Patents (OSTI)

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs. 5 figs.

Cole, E.I. Jr.

1996-06-04T23:59:59.000Z

499

GeSi photodetectors and electro-absorption modulators for Si electronic-photonic integrated circuits  

E-Print Network (OSTI)

The silicon electronic-photonic integrated circuit (EPIC) has emerged as a promising technology to break through the interconnect bottlenecks in telecommunications and on-chip interconnects. High performance photonic ...

Liu, Jifeng, Ph. D. Massachusetts Institute of Technology

2007-01-01T23:59:59.000Z

500

Optical studies of photonic crystals and high index-contrast microphotonic circuits  

E-Print Network (OSTI)

Both high index-contrast (HIC) photonic crystals and HIC microphotonic circuits are presented in this thesis. Studies of macro-scale 2D photonic crystal meta-materials are first described. Through comparison of experimental ...

Rakich, Peter Thomas

2006-01-01T23:59:59.000Z