National Library of Energy BETA

Sample records for fault circuit interrupt

  1. Apparatus for and method of testing an electrical ground fault circuit interrupt device

    DOE Patents [OSTI]

    Andrews, Lowell B.

    1998-01-01

    An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined.

  2. Apparatus for and method of testing an electrical ground fault circuit interrupt device

    DOE Patents [OSTI]

    Andrews, L.B.

    1998-08-18

    An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined. 17 figs.

  3. DIFFERENTIAL FAULT SENSING CIRCUIT

    DOE Patents [OSTI]

    Roberts, J.H.

    1961-09-01

    A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

  4. Hybrid high direct current circuit interrupter

    DOE Patents [OSTI]

    Rockot, Joseph H.; Mikesell, Harvey E.; Jha, Kamal N.

    1998-01-01

    A device and a method for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens.

  5. Hybrid high direct current circuit interrupter

    DOE Patents [OSTI]

    Rockot, J.H.; Mikesell, H.E.; Jha, K.N.

    1998-08-11

    A device and a method are disclosed for interrupting very high direct currents (greater than 100,000 amperes) and simultaneously blocking high voltages (greater than 600 volts). The device utilizes a mechanical switch to carry very high currents continuously with low loss and a silicon controlled rectifier (SCR) to bypass the current around the mechanical switch while its contacts are separating. A commutation circuit, connected in parallel with the SCR, turns off the SCR by utilizing a resonant circuit to divert the SCR current after the switch opens. 7 figs.

  6. CONTROL AND FAULT DETECTOR CIRCUIT

    DOE Patents [OSTI]

    Winningstad, C.N.

    1958-04-01

    A power control and fault detectcr circuit for a radiofrequency system is described. The operation of the circuit controls the power output of a radio- frequency power supply to automatically start the flow of energizing power to the radio-frequency power supply and to gradually increase the power to a predetermined level which is below the point where destruction occurs upon the happening of a fault. If the radio-frequency power supply output fails to increase during such period, the control does not further increase the power. On the other hand, if the output of the radio-frequency power supply properly increases, then the control continues to increase the power to a maximum value. After the maximumn value of radio-frequency output has been achieved. the control is responsive to a ''fault,'' such as a short circuit in the radio-frequency system being driven, so that the flow of power is interrupted for an interval before the cycle is repeated.

  7. Adjustable direct current and pulsed circuit fault current limiter

    DOE Patents [OSTI]

    Boenig, Heinrich J.; Schillig, Josef B.

    2003-09-23

    A fault current limiting system for direct current circuits and for pulsed power circuit. In the circuits, a current source biases a diode that is in series with the circuits' transmission line. If fault current in a circuit exceeds current from the current source biasing the diode open, the diode will cease conducting and route the fault current through the current source and an inductor. This limits the rate of rise and the peak value of the fault current.

  8. Electric circuit breaker comprising a plurality of vacuum interrupters simultaneously operated by a common operator

    DOE Patents [OSTI]

    Barkan, Philip; Imam, Imdad

    1980-01-01

    This circuit breaker comprises a plurality of a vacuum-type circuit interrupters, each having a movable contact rod. A common operating device for the interrupters comprises a linearly-movable operating member. The interrupters are mounted at one side of the operating member with their movable contact rods extending in a direction generally toward the operating member. Means is provided for mechanically coupling the operating member to the contact rods, and this means comprises a plurality of insulating operating rods, each connected at one end to the operating member and at its opposite end to one of the movable contact rods. The operating rods are of substantially equal length and have longitudinal axes that converge and intersect at substantially a common point.

  9. Switch contact device for interrupting high current, high voltage, AC and DC circuits

    DOE Patents [OSTI]

    Via, Lester C.; Witherspoon, F. Douglas; Ryan, John M.

    2005-01-04

    A high voltage switch contact structure capable of interrupting high voltage, high current AC and DC circuits. The contact structure confines the arc created when contacts open to the thin area between two insulating surfaces in intimate contact. This forces the arc into the shape of a thin sheet which loses heat energy far more rapidly than an arc column having a circular cross-section. These high heat losses require a dramatic increase in the voltage required to maintain the arc, thus extinguishing it when the required voltage exceeds the available voltage. The arc extinguishing process with this invention is not dependent on the occurrence of a current zero crossing and, consequently, is capable of rapidly interrupting both AC and DC circuits. The contact structure achieves its high performance without the use of sulfur hexafluoride.

  10. Fault current limiter and alternating current circuit breaker

    DOE Patents [OSTI]

    Boenig, Heinrich J.

    1998-01-01

    A solid-state circuit breaker and current limiter for a load served by an alternating current source having a source impedance, the solid-state circuit breaker and current limiter comprising a thyristor bridge interposed between the alternating current source and the load, the thyristor bridge having four thyristor legs and four nodes, with a first node connected to the alternating current source, and a second node connected to the load. A coil is connected from a third node to a fourth node, the coil having an impedance of a value calculated to limit the current flowing therethrough to a predetermined value. Control means are connected to the thyristor legs for limiting the alternating current flow to the load under fault conditions to a predetermined level, and for gating the thyristor bridge under fault conditions to quickly reduce alternating current flowing therethrough to zero and thereafter to maintain the thyristor bridge in an electrically open condition preventing the alternating current from flowing therethrough for a predetermined period of time.

  11. Fault current limiter and alternating current circuit breaker

    DOE Patents [OSTI]

    Boenig, H.J.

    1998-03-10

    A solid-state circuit breaker and current limiter are disclosed for a load served by an alternating current source having a source impedance, the solid-state circuit breaker and current limiter comprising a thyristor bridge interposed between the alternating current source and the load, the thyristor bridge having four thyristor legs and four nodes, with a first node connected to the alternating current source, and a second node connected to the load. A coil is connected from a third node to a fourth node, the coil having an impedance of a value calculated to limit the current flowing therethrough to a predetermined value. Control means are connected to the thyristor legs for limiting the alternating current flow to the load under fault conditions to a predetermined level, and for gating the thyristor bridge under fault conditions to quickly reduce alternating current flowing therethrough to zero and thereafter to maintain the thyristor bridge in an electrically open condition preventing the alternating current from flowing therethrough for a predetermined period of time. 9 figs.

  12. Use of inverse time, adjustable instantaneous pickup circuit breakers for short circuit and ground fault protection of energy efficient motors

    SciTech Connect (OSTI)

    Heath, D.W.; Bradfield, H.L.

    1995-12-31

    Many energy efficient low voltage motors exhibit first half cycle instantaneous inrush current values greater than the National Electrical Code`s 13 times motor full load amperes maximum permissible setting for instantaneous trip circuit breakers. The alternate use of an inverse time circuit breaker could lead to inadequate protection if the breaker does not have adjustable instantaneous settings. Recent innovations in digital solid state trip unit technology have made available an inverse time, adjustable instantaneous trip circuit breaker in 15A to 150A ratings. This allows the instantaneous pickup to be adjusted to a value slightly above motor inrush so that low level faults will be cleared instantaneously while avoiding nuisance tripping at startup. Applications, settings and comparisons are discussed.

  13. Creating dynamic equivalent PV circuit models with impedance spectroscopy for arc-fault modeling.

    SciTech Connect (OSTI)

    Johnson, Jay Dean; Kuszmaul, Scott S.; Strauch, Jason E.; Schoenwald, David Alan

    2011-06-01

    Article 690.11 in the 2011 National Electrical Code{reg_sign} (NEC{reg_sign}) requires new photovoltaic (PV) systems on or penetrating a building to include a listed arc fault protection device. Currently there is little experimental or empirical research into the behavior of the arcing frequencies through PV components despite the potential for modules and other PV components to filter or attenuate arcing signatures that could render the arc detector ineffective. To model AC arcing signal propagation along PV strings, the well-studied DC diode models were found to inadequately capture the behavior of high frequency arcing signals. Instead dynamic equivalent circuit models of PV modules were required to describe the impedance for alternating currents in modules. The nonlinearities present in PV cells resulting from irradiance, temperature, frequency, and bias voltage variations make modeling these systems challenging. Linearized dynamic equivalent circuits were created for multiple PV module manufacturers and module technologies. The equivalent resistances and capacitances for the modules were determined using impedance spectroscopy with no bias voltage and no irradiance. The equivalent circuit model was employed to evaluate modules having irradiance conditions that could not be measured directly with the instrumentation. Although there was a wide range of circuit component values, the complex impedance model does not predict filtering of arc fault frequencies in PV strings for any irradiance level. Experimental results with no irradiance agree with the model and show nearly no attenuation for 1 Hz to 100 kHz input frequencies.

  14. Low Insertion HVDC Circuit Breaker: Magnetically Pulsed Hybrid Breaker for HVDC Power Distribution Protection

    SciTech Connect (OSTI)

    2012-01-09

    GENI Project: General Atomics is developing a direct current (DC) circuit breaker that could protect the grid from faults 100 times faster than its alternating current (AC) counterparts. Circuit breakers are critical elements in any electrical system. At the grid level, their main function is to isolate parts of the grid where a fault has occurred—such as a downed power line or a transformer explosion—from the rest of the system. DC circuit breakers must interrupt the system during a fault much faster than AC circuit breakers to prevent possible damage to cables, converters and other grid-level components. General Atomics’ high-voltage DC circuit breaker would react in less than 1/1,000th of a second to interrupt current during a fault, preventing potential hazards to people and equipment.

  15. Superior model for fault tolerance computation in designing nano-sized circuit systems

    SciTech Connect (OSTI)

    Singh, N. S. S. Muthuvalu, M. S.; Asirvadam, V. S.

    2014-10-24

    As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalization of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.

  16. Fault Locating, Prediction and Protection (FLPPS)

    SciTech Connect (OSTI)

    Yinger, Robert, J.; Venkata, S., S.; Centeno, Virgilio

    2010-09-30

    One of the main objectives of this DOE-sponsored project was to reduce customer outage time. Fault location, prediction, and protection are the most important aspects of fault management for the reduction of outage time. In the past most of the research and development on power system faults in these areas has focused on transmission systems, and it is not until recently with deregulation and competition that research on power system faults has begun to focus on the unique aspects of distribution systems. This project was planned with three Phases, approximately one year per phase. The first phase of the project involved an assessment of the state-of-the-art in fault location, prediction, and detection as well as the design, lab testing, and field installation of the advanced protection system on the SCE Circuit of the Future located north of San Bernardino, CA. The new feeder automation scheme, with vacuum fault interrupters, will limit the number of customers affected by the fault. Depending on the fault location, the substation breaker might not even trip. Through the use of fast communications (fiber) the fault locations can be determined and the proper fault interrupting switches opened automatically. With knowledge of circuit loadings at the time of the fault, ties to other circuits can be closed automatically to restore all customers except the faulted section. This new automation scheme limits outage time and increases reliability for customers. The second phase of the project involved the selection, modeling, testing and installation of a fault current limiter on the Circuit of the Future. While this project did not pay for the installation and testing of the fault current limiter, it did perform the evaluation of the fault current limiter and its impacts on the protection system of the Circuit of the Future. After investigation of several fault current limiters, the Zenergy superconducting, saturable core fault current limiter was selected for

  17. Fault finder

    DOE Patents [OSTI]

    Bunch, Richard H.

    1986-01-01

    A fault finder for locating faults along a high voltage electrical transmission line. Real time monitoring of background noise and improved filtering of input signals is used to identify the occurrence of a fault. A fault is detected at both a master and remote unit spaced along the line. A master clock synchronizes operation of a similar clock at the remote unit. Both units include modulator and demodulator circuits for transmission of clock signals and data. All data is received at the master unit for processing to determine an accurate fault distance calculation.

  18. Commutation circuit for an HVDC circuit breaker

    DOE Patents [OSTI]

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  19. Commutation circuit for an HVDC circuit breaker

    DOE Patents [OSTI]

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  20. Adversary Sequence Interruption Model

    Energy Science and Technology Software Center (OSTI)

    1985-11-15

    PC EASI is an IBM personal computer or PC-compatible version of an analytical technique for measuring the effectiveness of physical protection systems. PC EASI utilizes a methodology called Estimate of Adversary Sequence Interruption (EASI) which evaluates the probability of interruption (PI) for a given sequence of adversary tasks. Probability of interruption is defined as the probability that the response force will arrive before the adversary force has completed its task. The EASI methodology is amore » probabilistic approach that analytically evaluates basic functions of the physical security system (detection, assessment, communications, and delay) with respect to response time along a single adversary path. It is important that the most critical scenarios for each target be identified to ensure that vulnerabilities have not been overlooked. If the facility is not overly complex, this can be accomplished by examining all paths. If the facility is complex, a global model such as Safeguards Automated Facility Evaluation (SAFE) may be used to identify the most vulnerable paths. PC EASI is menu-driven with screen forms for entering and editing the basic scenarios. In addition to evaluating PI for the basic scenario, the sensitivities of many of the parameters chosen in the scenario can be analyzed. These sensitivities provide information to aid the analyst in determining the tradeoffs for reducing the probability of interruption. PC EASI runs under the Micro Data Base Systems'' proprietary database management system Knowledgeman. KMAN provides the user environment and file management for the specified basic scenarios, and KGRAPH the graphical output of the sensitivity calculations. This software is not included. Due to errors in release 2 of KMAN, PC EASI will not execute properly; release 1.07 of KMAN is required.« less

  1. Interrupted polysilanes useful as photoresists

    DOE Patents [OSTI]

    Zeigler, John M.

    1988-01-01

    Polysilane polymers in which the Si backbone is interrupted by atoms such as O, Ge, Sn, P, etc., are useful photoresists especially in the solvent development mode.

  2. Interrupted polysilanes useful as photoresists

    DOE Patents [OSTI]

    Zeigler, J.M.

    1988-08-02

    Polysilane polymers in which the Si backbone is interrupted by atoms such as O, Ge, Sn, P, etc., are useful photoresists especially in the solvent development mode.

  3. Global interrupt and barrier networks

    DOE Patents [OSTI]

    Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.; Gara, Alan G.; Giampapa, Mark E; Heidelberger, Philip; Kopcsay, Gerard V.; Steinmacher-Burow, Burkhard D.; Takken, Todd E.

    2008-10-28

    A system and method for generating global asynchronous signals in a computing structure. Particularly, a global interrupt and barrier network is implemented that implements logic for generating global interrupt and barrier signals for controlling global asynchronous operations performed by processing elements at selected processing nodes of a computing structure in accordance with a processing algorithm; and includes the physical interconnecting of the processing nodes for communicating the global interrupt and barrier signals to the elements via low-latency paths. The global asynchronous signals respectively initiate interrupt and barrier operations at the processing nodes at times selected for optimizing performance of the processing algorithms. In one embodiment, the global interrupt and barrier network is implemented in a scalable, massively parallel supercomputing device structure comprising a plurality of processing nodes interconnected by multiple independent networks, with each node including one or more processing elements for performing computation or communication activity as required when performing parallel algorithm operations. One multiple independent network includes a global tree network for enabling high-speed global tree communications among global tree network nodes or sub-trees thereof. The global interrupt and barrier network may operate in parallel with the global tree network for providing global asynchronous sideband signals.

  4. Pulsed interrupter and method of operation

    DOE Patents [OSTI]

    Drake, Joel Lawton; Kratz, Robert

    2015-06-09

    Some embodiments provide interrupter systems comprising: a first electrode; a second electrode; a piston movably located at a first position and electrically coupled with the first and second electrodes establishing a closed state, the piston comprises an electrical conductor that couples with the first and second electrodes providing a conductive path; an electromagnetic launcher configured to, when activated, induce a magnetic field pulse causing the piston to move away from the electrical coupling with the first and second electrodes establishing an open circuit between the first and second electrodes; and a piston control system comprising a piston arresting system configured to control a deceleration of the piston following the movement of the piston induced by the electromagnetic launcher such that the piston is not in electrical contact with at least one of the first electrode and the second electrode when in the open state.

  5. High temperature superconducting fault current limiter

    DOE Patents [OSTI]

    Hull, John R.

    1997-01-01

    A fault current limiter (10) for an electrical circuit (14). The fault current limiter (10) includes a high temperature superconductor (12) in the electrical circuit (14). The high temperature superconductor (12) is cooled below its critical temperature to maintain the superconducting electrical properties during operation as the fault current limiter (10).

  6. High temperature superconducting fault current limiter

    DOE Patents [OSTI]

    Hull, J.R.

    1997-02-04

    A fault current limiter for an electrical circuit is disclosed. The fault current limiter includes a high temperature superconductor in the electrical circuit. The high temperature superconductor is cooled below its critical temperature to maintain the superconducting electrical properties during operation as the fault current limiter. 15 figs.

  7. PV Systems Reliability Final Technical Report: Ground Fault Detection

    SciTech Connect (OSTI)

    Lavrova, Olga; Flicker, Jack David; Johnson, Jay

    2016-01-01

    We have examined ground faults in PhotoVoltaic (PV) arrays and the efficacy of fuse, current detection (RCD), current sense monitoring/relays (CSM), isolation/insulation (Riso) monitoring, and Ground Fault Detection and Isolation (GFID) using simulations based on a Simulation Program with Integrated Circuit Emphasis SPICE ground fault circuit model, experimental ground faults installed on real arrays, and theoretical equations.

  8. Squishy Circuits

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Squishy Circuits Squishy Circuits Inspire your inner Ben Franklin Children of all ages create circuits and explore electronics-even making electricity flow with their own doughy...

  9. Executing application function calls in response to an interrupt

    DOE Patents [OSTI]

    Almasi, Gheorghe; Archer, Charles J.; Giampapa, Mark E.; Gooding, Thomas M.; Heidelberger, Philip; Parker, Jeffrey J.

    2010-05-11

    Executing application function calls in response to an interrupt including creating a thread; receiving an interrupt having an interrupt type; determining whether a value of a semaphore represents that interrupts are disabled; if the value of the semaphore represents that interrupts are not disabled: calling, by the thread, one or more preconfigured functions in dependence upon the interrupt type of the interrupt; yielding the thread; and if the value of the semaphore represents that interrupts are disabled: setting the value of the semaphore to represent to a kernel that interrupts are hard-disabled; and hard-disabling interrupts at the kernel.

  10. Hawaii Faults

    DOE Data Explorer [Office of Scientific and Technical Information (OSTI)]

    Nicole Lautze

    2015-01-01

    Faults combined from USGS 2007 Geologic Map of the State of Hawaii and the USGS Quaternary Fault and Fold database. This data is in shapefile format.

  11. Superconducting fault current controller/current controller

    DOE Patents [OSTI]

    Cha, Yung S.

    2004-06-15

    A superconducting fault current controller/current controller employs a superconducting-shielded core reactor (SSCR) with a variable impedance in a secondary circuit to control current in a primary circuit such as an electrical distribution system. In a second embodiment, a variable current source is employed in a secondary circuit of an SSCR to control current in the primary circuit. In a third embodiment, both a variable impedance in one secondary circuit and a variable current source in a second circuit of an SSCR are employed for separate and independent control of current in the primary circuit.

  12. Arc-Fault Detector Algorithm Evaluation Method Utilizing Prerecorded...

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    ... This pulse was fed into the AFD circuit to better tune the arc-fault detector. Figure 4 shows the string current (Hall Effect), the arc-fault voltage (Arc V (TEK)), and the arcing ...

  13. Measuring circuit

    DOE Patents [OSTI]

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  14. Short-Circuit Modeling of a Wind Power Plant: Preprint

    SciTech Connect (OSTI)

    Muljadi, E.; Gevorgian, V.

    2011-03-01

    This paper investigates the short-circuit behavior of a WPP for different types of wind turbines. The short-circuit behavior will be presented. Both the simplified models and detailed models are used in the simulations and both symmetrical faults and unsymmetrical faults are discussed.

  15. ADDER CIRCUIT

    DOE Patents [OSTI]

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  16. Passive fault current limiting device

    DOE Patents [OSTI]

    Evans, D.J.; Cha, Y.S.

    1999-04-06

    A passive current limiting device and isolator is particularly adapted for use at high power levels for limiting excessive currents in a circuit in a fault condition such as an electrical short. The current limiting device comprises a magnetic core wound with two magnetically opposed, parallel connected coils of copper, a high temperature superconductor or other electrically conducting material, and a fault element connected in series with one of the coils. Under normal operating conditions, the magnetic flux density produced by the two coils cancel each other. Under a fault condition, the fault element is triggered to cause an imbalance in the magnetic flux density between the two coils which results in an increase in the impedance in the coils. While the fault element may be a separate current limiter, switch, fuse, bimetal strip or the like, it preferably is a superconductor current limiter conducting one-half of the current load compared to the same limiter wired to carry the total current of the circuit. The major voltage during a fault condition is in the coils wound on the common core in a preferred embodiment. 6 figs.

  17. Passive fault current limiting device

    DOE Patents [OSTI]

    Evans, Daniel J.; Cha, Yung S.

    1999-01-01

    A passive current limiting device and isolator is particularly adapted for use at high power levels for limiting excessive currents in a circuit in a fault condition such as an electrical short. The current limiting device comprises a magnetic core wound with two magnetically opposed, parallel connected coils of copper, a high temperature superconductor or other electrically conducting material, and a fault element connected in series with one of the coils. Under normal operating conditions, the magnetic flux density produced by the two coils cancel each other. Under a fault condition, the fault element is triggered to cause an imbalance in the magnetic flux density between the two coils which results in an increase in the impedance in the coils. While the fault element may be a separate current limiter, switch, fuse, bimetal strip or the like, it preferably is a superconductor current limiter conducting one-half of the current load compared to the same limiter wired to carry the total current of the circuit. The major voltage during a fault condition is in the coils wound on the common core in a preferred embodiment.

  18. Arc fault detection system

    DOE Patents [OSTI]

    Jha, Kamal N.

    1999-01-01

    An arc fault detection system for use on ungrounded or high-resistance-grounded power distribution systems is provided which can be retrofitted outside electrical switchboard circuits having limited space constraints. The system includes a differential current relay that senses a current differential between current flowing from secondary windings located in a current transformer coupled to a power supply side of a switchboard, and a total current induced in secondary windings coupled to a load side of the switchboard. When such a current differential is experienced, a current travels through a operating coil of the differential current relay, which in turn opens an upstream circuit breaker located between the switchboard and a power supply to remove the supply of power to the switchboard.

  19. Arc fault detection system

    DOE Patents [OSTI]

    Jha, K.N.

    1999-05-18

    An arc fault detection system for use on ungrounded or high-resistance-grounded power distribution systems is provided which can be retrofitted outside electrical switchboard circuits having limited space constraints. The system includes a differential current relay that senses a current differential between current flowing from secondary windings located in a current transformer coupled to a power supply side of a switchboard, and a total current induced in secondary windings coupled to a load side of the switchboard. When such a current differential is experienced, a current travels through a operating coil of the differential current relay, which in turn opens an upstream circuit breaker located between the switchboard and a power supply to remove the supply of power to the switchboard. 1 fig.

  20. GATING CIRCUITS

    DOE Patents [OSTI]

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  1. MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  2. Wind Power Plant Enhancement with a Fault-Current Limiter: Preprint

    SciTech Connect (OSTI)

    Muljadi, E.; Gevorgian, V.; DeLaRosa, F.

    2011-03-01

    This paper investigates the capability of a saturable core fault-current limiter to limit the short circuit current of different types of wind turbine generators.

  3. Development of Fault Models for Hybrid Fault Detection and Diagnostics Algorithm: October 1, 2014 -- May 5, 2015

    SciTech Connect (OSTI)

    Cheung, Howard; Braun, James E.

    2015-12-31

    This report describes models of building faults created for OpenStudio to support the ongoing development of fault detection and diagnostic (FDD) algorithms at the National Renewable Energy Laboratory. Building faults are operating abnormalities that degrade building performance, such as using more energy than normal operation, failing to maintain building temperatures according to the thermostat set points, etc. Models of building faults in OpenStudio can be used to estimate fault impacts on building performance and to develop and evaluate FDD algorithms. The aim of the project is to develop fault models of typical heating, ventilating and air conditioning (HVAC) equipment in the United States, and the fault models in this report are grouped as control faults, sensor faults, packaged and split air conditioner faults, water-cooled chiller faults, and other uncategorized faults. The control fault models simulate impacts of inappropriate thermostat control schemes such as an incorrect thermostat set point in unoccupied hours and manual changes of thermostat set point due to extreme outside temperature. Sensor fault models focus on the modeling of sensor biases including economizer relative humidity sensor bias, supply air temperature sensor bias, and water circuit temperature sensor bias. Packaged and split air conditioner fault models simulate refrigerant undercharging, condenser fouling, condenser fan motor efficiency degradation, non-condensable entrainment in refrigerant, and liquid line restriction. Other fault models that are uncategorized include duct fouling, excessive infiltration into the building, and blower and pump motor degradation.

  4. High performance protection circuit for power electronics applications

    SciTech Connect (OSTI)

    Tudoran, Cristian D. Dădârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-23

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a “sensor” or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  5. NREL: Awards and Honors - Current Interrupt Charging Algorithm...

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Current Interrupt Charging Algorithm for Lead-Acid Batteries Developers: Matthew A. Keyser, Ahmad A. Pesaran, and Mark M. Mihalic, National Renewable Energy Laboratory; Robert F....

  6. MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  7. Federated Testbed Circuits

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Testbed Circuits Network R&D Overview Experimental Network Testbeds 100G SDN Testbed Dark Fiber Testbed Federated Testbed Circuits Test Circuit Service Performance (perfSONAR)...

  8. Servicing a globally broadcast interrupt signal in a multi-threaded computer

    DOE Patents [OSTI]

    Attinella, John E.; Davis, Kristan D.; Musselman, Roy G.; Satterfield, David L.

    2015-12-29

    Methods, apparatuses, and computer program products for servicing a globally broadcast interrupt signal in a multi-threaded computer comprising a plurality of processor threads. Embodiments include an interrupt controller indicating in a plurality of local interrupt status locations that a globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include a thread determining that a local interrupt status location corresponding to the thread indicates that the globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include the thread processing one or more entries in a global interrupt status bit queue based on whether global interrupt status bits associated with the globally broadcast interrupt signal are locked. Each entry in the global interrupt status bit queue corresponds to a queued global interrupt.

  9. Galvanostatic interruption of lithium insertion into magnetite: Evidence of surface layer formation

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Nicholas W. Brady; Takeuchi, Esther S.; Knehr, K. W.; Cama, Christina A.; Lininger, Christianna N.; Lin, Zhou; Marschilok, Amy C.; Takeuchi, Kenneth J.; West, Alan C.

    2016-05-05

    Magnetite is a known lithium intercalation material, and the loss of active, nanocrystalline magnetite can be inferred from the open-circuit potential relaxation. Specifically, for current interruption after relatively small amounts of lithium insertion, the potential first increases and then decreases, and the decrease is hypothesized to be due to a formation of a surface layer, which increases the solid-state lithium concentration in the remaining active material. Comparisons of simulation to experiment suggest that the reactions with the electrolyte result in the formation of a thin layer of electrochemically inactive material, which is best described by a nucleation and growth mechanism.more » Simulations are consistent with experimental results observed for 6, 8 and 32-nm crystals. As a result, simulations capture the experimental differences in lithiation behavior between the first and second cycles.« less

  10. High speed, long distance, data transmission multiplexing circuit

    DOE Patents [OSTI]

    Mariotti, Razvan

    1991-01-01

    A high speed serial data transmission multiplexing circuit, which is operable to accurately transmit data over long distances (up to 3 Km), and to multiplex, select and continuously display real time analog signals in a bandwidth from DC to 100 Khz. The circuit is made fault tolerant by use of a programmable flywheel algorithm, which enables the circuit to tolerate one transmission error before losing synchronization of the transmitted frames of data. A method of encoding and framing captured and transmitted data is used which has a low overhead and prevents some particular transmitted data patterns from locking an included detector/decoder circuit.

  11. Multi-megampere current interruption from explosive deformation of conductors

    SciTech Connect (OSTI)

    Goforth, J.H.; Williams, A.H.; Marsh, S.P.

    1985-01-01

    Two approaches for using explosives to interrupt current flowing in solid conductors are described. One concept uses explosives to extrude the switch conductor into thin regions that fuse due to current in the switch. A preliminary scaling law is presented. The second approach employs dielectric jets to sever current carrying conductors. A feasibility experiment and an improved design are described.

  12. Charge regulation circuit

    DOE Patents [OSTI]

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  13. Impact of Interruptible Natural Gas Service on Northeast Heating Oil Demand

    Reports and Publications (EIA)

    2001-01-01

    Assesses the extent of interruptible natural gas contracts and their effect on heating oil demand in the Northeast.

  14. Piezoelectric drive circuit

    DOE Patents [OSTI]

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  15. Electrical Circuit Simulation Code

    Energy Science and Technology Software Center (OSTI)

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  16. Piezoelectric drive circuit

    DOE Patents [OSTI]

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  17. High voltage fault current limiter having immersed phase coils

    DOE Patents [OSTI]

    Darmann, Francis Anthony

    2014-04-22

    A fault current limiter including: a ferromagnetic circuit formed from a ferromagnetic material and including at least a first limb, and a second limb; a saturation mechanism surrounding a limb for magnetically saturating the ferromagnetic material; a phase coil wound around a second limb; a dielectric fluid surrounding the phase coil; a gaseous atmosphere surrounding the saturation mechanism.

  18. Rule based decision support system for single-line fault detection in a delta-delta connected distribution system

    SciTech Connect (OSTI)

    Momoh, J.A.; Dias, L.G.; Thor, T. . Dept. of Electrical Engineering); Laird, D. )

    1994-05-01

    Single-line fault detection, faulted feeder identification, fault type classification, fault location and fault impedance estimation, continue to pose a problem to delta-delta connected distribution systems such as the Los Angeles Department of Water and Power (LADWP) which has over 1,500 feeder circuits at the 4.8kV voltage level. This paper describes a rule based decision support (RBDS) system application to single-line fault detection in a delta-delta connected distribution system. The RBDS system is built from knowledge acquired through exhaustive simulation based on non-arcing type fault situations. It is primarily designed to detect the presence of a fault, identify the faulted feeder, the faulted phase and classify the fault type. It is also designed to gauge the proximity of the fault to the substation and to assess the fault impedance. A fault in the distribution system, upon identification, triggers an alarm with explanatory facility leading to the fault. The RBDS system was tested with different sets of simulated data and proved successful in most cases. Additional tests will be done using field data made available by LADWP. The RBDS system module is a prototype integrated fault detection scheme to be installed in a LADWP distribution substation.

  19. CIRCUITS FOR CURRENT MEASUREMENTS

    DOE Patents [OSTI]

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  20. Photovoltaic System Fault Detection

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Photovoltaic System Fault Detection and Diagnostics using Laterally Primed Adaptive Resonance Theory Neural Network C. Birk Jones, Joshua S. Stein, Sigifredo Gonzalez, and Bruce H. King Sandia National Laboratories, Albuquerque, NM, 87185, U.S.A Abstract-Cost effective integration of solar photovoltaic (PV) systems requires increased reliability. This can be achieved with a robust fault detection and diagnostic (FDD) tool that auto- matically discovers faults. This paper introduces the Laterally

  1. Fault Current Limiters

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Other benefits include: &17; Enhanced system safety, stability, and efficiency of the power ... large fault current desaturates the iron core of the series AC coils and the increased ...

  2. Workplace Charging: Safety and Management Policy For Level 1...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Ground-fault circuit interrupter (GFCI) outlets, which protect against electrical shock, are required for outdoor use. Additionally, it is a good practice to ask an electrician to ...

  3. High-capacity single-pressure SF/sub 6/ interrupters. Final report

    SciTech Connect (OSTI)

    Rostron, J R; Berkebile, L E; Spindle, H E

    1983-05-01

    The object of this project was to design and develop a high-voltage, single-pressure, SF/sub 6/ interrupter with an interrupting capability of 120 kA at 145 kV with a continuous current rating of 5000 A and an interrupting time of 1.5 cycles or less. A second objective of 100 kA at 242 kV was added during the project. Mathematical models were used to extrapolate design requirements from existing data for 63 and 80 kA. Two model puffers, one liquid and the other gas, were designed and tested to obtain data at 100 kA. An interrupter, optimized on the basis of total prospective breaker cost, was designed using the mathematical models. A study was made of the construction materials to operate under the high-stress conditions in this interrupter. Existing high-speed movies of high-current arcs under double-flow conditions were analyzed to obtain more information for modeling the interrupter. The optimized interrupter design was built and tested. The interrupting capability confirmed calculations of predicted performance near current zero; however, the dielectric strength after interrupting these high-current arcs was not adequate for the 145-kV or the 242-kV ratings. The dielectric strength was reduced by hot gases flowing out of the interrupter. Valuable data have been obtained for modeling the SF/sub 6/ puffer interrupter for high currents.

  4. Solar system fault detection

    DOE Patents [OSTI]

    Farrington, Robert B.; Pruett, Jr., James C.

    1986-01-01

    A fault detecting apparatus and method are provided for use with an active solar system. The apparatus provides an indication as to whether one or more predetermined faults have occurred in the solar system. The apparatus includes a plurality of sensors, each sensor being used in determining whether a predetermined condition is present. The outputs of the sensors are combined in a pre-established manner in accordance with the kind of predetermined faults to be detected. Indicators communicate with the outputs generated by combining the sensor outputs to give the user of the solar system and the apparatus an indication as to whether a predetermined fault has occurred. Upon detection and indication of any predetermined fault, the user can take appropriate corrective action so that the overall reliability and efficiency of the active solar system are increased.

  5. Solar system fault detection

    DOE Patents [OSTI]

    Farrington, R.B.; Pruett, J.C. Jr.

    1984-05-14

    A fault detecting apparatus and method are provided for use with an active solar system. The apparatus provides an indication as to whether one or more predetermined faults have occurred in the solar system. The apparatus includes a plurality of sensors, each sensor being used in determining whether a predetermined condition is present. The outputs of the sensors are combined in a pre-established manner in accordance with the kind of predetermined faults to be detected. Indicators communicate with the outputs generated by combining the sensor outputs to give the user of the solar system and the apparatus an indication as to whether a predetermined fault has occurred. Upon detection and indication of any predetermined fault, the user can take appropriate corrective action so that the overall reliability and efficiency of the active solar system are increased.

  6. A Framework For Evaluating Comprehensive Fault Resilience Mechanisms In Numerical Programs

    SciTech Connect (OSTI)

    Chen, S.; Peng, L.; Bronevetsky, G.

    2015-01-09

    As HPC systems approach Exascale, their circuit feature will shrink, while their overall size will grow, all at a fixed power limit. These trends imply that soft faults in electronic circuits will become an increasingly significant problem for applications that run on these systems, causing them to occasionally crash or worse, silently return incorrect results. This is motivating extensive work on application resilience to such faults, ranging from generic techniques such as replication or checkpoint/restart to algorithm-specific error detection and resilience techniques. Effective use of such techniques requires a detailed understanding of (1) which vulnerable parts of the application are most worth protecting (2) the performance and resilience impact of fault resilience mechanisms on the application. This paper presents FaultTelescope, a tool that combines these two and generates actionable insights by presenting in an intuitive way application vulnerabilities and impact of fault resilience mechanisms on applications.

  7. Remote reset circuit

    DOE Patents [OSTI]

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  8. Regenerative feedback resonant circuit

    DOE Patents [OSTI]

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  9. Remote reset circuit

    DOE Patents [OSTI]

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  10. Laser energy control circuit

    SciTech Connect (OSTI)

    Howie, J.B.; Mcleod, J.

    1982-08-17

    A laser energy control circuit for a gas-discharge excited laser includes an energy source psu to supply energy to the gas discharge. First circuit means tr1, tr2 operate to limit the energy supplied to a first value for a first time interval, after which second circuit means a1, a2 allow the energy to rise to a maximum value and then decrease gradually to a second value over a second time interval. Subsequently, third circuit means including amplifiers a3 to a6 operate to maintain the light output of the laser at a desired value.

  11. Liquid detection circuit

    DOE Patents [OSTI]

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  12. Method for deposition of a conductor in integrated circuits

    DOE Patents [OSTI]

    Creighton, J.R.; Dominguez, F.; Johnson, A.W.; Omstead, T.R.

    1997-09-02

    A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten. 2 figs.

  13. Method for deposition of a conductor in integrated circuits

    DOE Patents [OSTI]

    Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

    1997-01-01

    A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

  14. OpenStudio - Fault Modeling

    Energy Science and Technology Software Center (OSTI)

    2014-09-19

    This software record documents the OpenStudio fault model development portion of the Fault Detection and Diagnostics LDRD project.The software provides a suite of OpenStudio measures (scripts) for modeling typical HVAC system faults in commercial buildings and also included supporting materials: example projects and OpenStudio measures for reporting fault costs and energy impacts.

  15. Symmetrical and Unsymmetrical Fault Currents of a Wind Power Plant: Preprint

    SciTech Connect (OSTI)

    Gevorgian, V.; Singh, M.; Muljadi, E.

    2011-12-01

    This paper investigates the short-circuit behavior of a wind power plant for different types of wind turbines. Both symmetrical faults and unsymmetrical faults are investigated. The size of wind power plants (WPPs) keeps getting bigger and bigger. The number of wind plants in the U.S. has increased very rapidly in the past 10 years. It is projected that in the U.S., the total wind power generation will reach 330 GW by 2030. As the importance of WPPs increases, planning engi-neers must perform impact studies used to evaluate short-circuit current (SCC) contribution of the plant into the transmission network under different fault conditions. This information is needed to size the circuit breakers, to establish the proper sys-tem protection, and to choose the transient suppressor in the circuits within the WPP. This task can be challenging to protec-tion engineers due to the topology differences between different types of wind turbine generators (WTGs) and the conventional generating units. This paper investigates the short-circuit behavior of a WPP for different types of wind turbines. Both symmetrical faults and unsymmetrical faults are investigated. Three different soft-ware packages are utilized to develop this paper. Time domain simulations and steady-state calculations are used to perform the analysis.

  16. Compensated gain control circuit for buck regulator command charge circuit

    DOE Patents [OSTI]

    Barrett, David M.

    1996-01-01

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

  17. Compensated gain control circuit for buck regulator command charge circuit

    DOE Patents [OSTI]

    Barrett, D.M.

    1996-11-05

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

  18. Sensor readout detector circuit

    DOE Patents [OSTI]

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  19. Sensor readout detector circuit

    DOE Patents [OSTI]

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  20. Approximate circuits for increased reliability

    DOE Patents [OSTI]

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  1. Approximate circuits for increased reliability

    DOE Patents [OSTI]

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  2. CALUTRON PROTECTIVE CIRCUIT

    DOE Patents [OSTI]

    Schmidt, F.H.

    1959-05-26

    A switch and relay circuit is described for protection of calutrons. By means of this arrangement no arc can be established in the arc chamber unless cooling water flow is established. (T.R.H.)

  3. CALUTRON CATHODE INTERLOCK CIRCUIT

    DOE Patents [OSTI]

    Baldwin, L.W.

    1959-05-26

    A circuit arrangement is described which prevents application of the arc voltage to an ion source of a calutron before the cathode has been heated to operating temperature. (T.R.H.)

  4. Test Circuit Service

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Test Circuit Service Network R&D Software-Defined Networking (SDN) Experimental Network Testbeds 100G SDN Testbed Dark Fiber Testbed Test Circuit Service Testbed Results Current Testbed Research Previous Testbed Research Performance (perfSONAR) Software & Tools Development Data for Researchers Partnerships Publications Workshops Contact Us Technical Assistance: 1 800-33-ESnet (Inside US) 1 800-333-7638 (Inside US) 1 510-486-7600 (Globally) 1 510-486-7607 (Globally) Report Network

  5. Superconducting flux flow digital circuits

    DOE Patents [OSTI]

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  6. Superconducting flux flow digital circuits

    DOE Patents [OSTI]

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  7. Fault tolerant linear actuator

    DOE Patents [OSTI]

    Tesar, Delbert

    2004-09-14

    In varying embodiments, the fault tolerant linear actuator of the present invention is a new and improved linear actuator with fault tolerance and positional control that may incorporate velocity summing, force summing, or a combination of the two. In one embodiment, the invention offers a velocity summing arrangement with a differential gear between two prime movers driving a cage, which then drives a linear spindle screw transmission. Other embodiments feature two prime movers driving separate linear spindle screw transmissions, one internal and one external, in a totally concentric and compact integrated module.

  8. Computer hardware fault administration

    DOE Patents [OSTI]

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  9. ELECTRONIC TRIGGER CIRCUIT

    DOE Patents [OSTI]

    Russell, J.A.G.

    1958-01-01

    An electronic trigger circuit is described of the type where an output pulse is obtained only after an input voltage has cqualed or exceeded a selected reference voltage. In general, the invention comprises a source of direct current reference voltage in series with an impedance and a diode rectifying element. An input pulse of preselected amplitude causes the diode to conduct and develop a signal across the impedance. The signal is delivered to an amplifier where an output pulse is produced and part of the output is fed back in a positive manner to the diode so that the amplifier produces a steep wave front trigger pulsc at the output. The trigger point of the described circuit is not subject to variation due to the aging, etc., of multi-electrode tabes, since the diode circuit essentially determines the trigger point.

  10. ELECTRONIC MULTIPLIER CIRCUIT

    DOE Patents [OSTI]

    Thomas, R.E.

    1959-08-25

    An electronic multiplier circuit is described in which an output voltage having an amplitude proportional to the product or quotient of the input signals is accomplished in a novel manner which facilitates simplicity of circuit construction and a high degree of accuracy in accomplishing the multiplying and dividing function. The circuit broadly comprises a multiplier tube in which the plate current is proportional to the voltage applied to a first control grid multiplied by the difference between voltage applied to a second control grid and the voltage applied to the first control grid. Means are provided to apply a first signal to be multiplied to the first control grid together with means for applying the sum of the first signal to be multiplied and a second signal to be multiplied to the second control grid whereby the plate current of the multiplier tube is proportional to the product of the first and second signals to be multiplied.

  11. ELECTRONIC PHASE CONTROL CIRCUIT

    DOE Patents [OSTI]

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  12. Row fault detection system

    DOE Patents [OSTI]

    Archer, Charles Jens; Pinnow, Kurt Walter; Ratterman, Joseph D.; Smith, Brian Edward

    2008-10-14

    An apparatus, program product and method checks for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.

  13. Row fault detection system

    DOE Patents [OSTI]

    Archer, Charles Jens; Pinnow, Kurt Walter; Ratterman, Joseph D.; Smith, Brian Edward

    2012-02-07

    An apparatus, program product and method check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.

  14. Row fault detection system

    DOE Patents [OSTI]

    Archer, Charles Jens; Pinnow, Kurt Walter; Ratterman, Joseph D.; Smith, Brian Edward

    2010-02-23

    An apparatus and program product check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.

  15. Dynamic Fault Detection Chassis

    SciTech Connect (OSTI)

    Mize, Jeffery J

    2007-01-01

    Abstract The high frequency switching megawatt-class High Voltage Converter Modulator (HVCM) developed by Los Alamos National Laboratory for the Oak Ridge National Laboratory's Spallation Neutron Source (SNS) is now in operation. One of the major problems with the modulator systems is shoot-thru conditions that can occur in a IGBTs H-bridge topology resulting in large fault currents and device failure in a few microseconds. The Dynamic Fault Detection Chassis (DFDC) is a fault monitoring system; it monitors transformer flux saturation using a window comparator and dV/dt events on the cathode voltage caused by any abnormality such as capacitor breakdown, transformer primary turns shorts, or dielectric breakdown between the transformer primary and secondary. If faults are detected, the DFDC will inhibit the IGBT gate drives and shut the system down, significantly reducing the possibility of a shoot-thru condition or other equipment damaging events. In this paper, we will present system integration considerations, performance characteristics of the DFDC, and discuss its ability to significantly reduce costly down time for the entire facility.

  16. Electrical Circuit Tester

    DOE Patents [OSTI]

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  17. Magnetic switches and circuits

    SciTech Connect (OSTI)

    Nunnally, W.C.

    1982-05-01

    This report outlines the use of saturable inductors as switches in lumped-element, magnetic-pulse compression circuits is discussed and the characteristic use of each is defined. In addition, the geometric constraints and magnetic pulse compression circuits used in short-pulse, low-inductance systems are considered. The scaling of presaturation leakage currents, magnetic energy losses, and switching times with geometrical and material parameters are developed to aid in evaluating magnetic pulse compression systems in a particular application. Finally, a scheme for increasing the couping coefficient in saturable stripline transformers is proposed to enable their use in the short-pulse, high-voltage regime.

  18. Small circuits for cryptography.

    SciTech Connect (OSTI)

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  19. A method to determine fault vectors in 4H-SiC from stacking sequences observed on high resolution transmission electron microscopy images

    SciTech Connect (OSTI)

    Wu, Fangzhen; Wang, Huanhuan; Raghothamachar, Balaji; Dudley, Michael; Mueller, Stephan G.; Chung, Gil; Sanchez, Edward K.; Hansen, Darren; Loboda, Mark J.; Zhang, Lihua; Su, Dong; Kisslinger, Kim; Stach, Eric

    2014-09-14

    A new method has been developed to determine the fault vectors associated with stacking faults in 4H-SiC from their stacking sequences observed on high resolution TEM images. This method, analogous to the Burgers circuit technique for determination of dislocation Burgers vector, involves determination of the vectors required in the projection of the perfect lattice to correct the deviated path constructed in the faulted material. Results for several different stacking faults were compared with fault vectors determined from X-ray topographic contrast analysis and were found to be consistent. This technique is expected to applicable to all structures comprising corner shared tetrahedra.

  20. Circuit breaker lockout device

    DOE Patents [OSTI]

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1992-01-01

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

  1. Circuit breaker lockout device

    DOE Patents [OSTI]

    Kozlowski, L.J.; Shirey, L.A.

    1992-11-24

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker. 2 figs.

  2. Bioluminescent bioreporter integrated circuit

    DOE Patents [OSTI]

    Simpson, Michael L.; Sayler, Gary S.; Paulus, Michael J.

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  3. Automatic sweep circuit

    DOE Patents [OSTI]

    Keefe, Donald J.

    1980-01-01

    An automatically sweeping circuit for searching for an evoked response in an output signal in time with respect to a trigger input. Digital counters are used to activate a detector at precise intervals, and monitoring is repeated for statistical accuracy. If the response is not found then a different time window is examined until the signal is found.

  4. Automatic Fault Classification

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Automatic Fault Classification of Photovoltaic Strings Based on an In Situ IV Characterization System and a Gaussian Process Algorithm. C. Birk Jones ∗ , Manel Mart´ ınez-Ram´ on ‡ , § Ryan Smith † , Craig K. Carmignani ∗ , Olga Lavrova ∗ , Charles Robinson ∗ , and Joshua S. Stein ∗ ∗ Sandia National Laboratories Solar PV & Grid Integration, Albuquerque, NM, USA. ‡ Department of Electrical and Computer Engineering, University of New Mexico, Albuquerque, NM, USA, §

  5. Methods of fabricating applique circuits

    DOE Patents [OSTI]

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  6. High voltage MOSFET switching circuit

    DOE Patents [OSTI]

    McEwan, T.E.

    1994-07-26

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

  7. High voltage MOSFET switching circuit

    DOE Patents [OSTI]

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  8. GAS PHOTOTUBE CIRCUIT

    DOE Patents [OSTI]

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  9. PARTICLE BEAM TRACKING CIRCUIT

    DOE Patents [OSTI]

    Anderson, O.A.

    1959-05-01

    >A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)

  10. Fault Detection Tool Project: Automatic Discovery of Faults using...

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Energy Systems LaboratoryBrayton Lab Photovoltaic Systems Evaluation Laboratory PV ... HomeEnergy, Photovoltaic, Renewable Energy, Research & Capabilities, SolarFault ...

  11. Power system with an integrated lubrication circuit

    DOE Patents [OSTI]

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  12. Integrated coherent matter wave circuits

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Ryu, C.; Boshier, M. G.

    2015-09-21

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through theirmoreelectric polarizability. Moreover, the source of coherent matter waves is a BoseEinstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.less

  13. Fault Mapping | Open Energy Information

    Open Energy Info (EERE)

    to help locate and identify geothermal systems that rely on faults as high permeability pathways for fluid circulation. There are many techniques that can be done to...

  14. Reversing-counterpulse repetitive-pulse inductive storage circuit

    DOE Patents [OSTI]

    Honig, Emanuel M.

    1987-01-01

    A high-power reversing-counterpulse repetitive-pulse inductive storage and transfer circuit includes an opening switch, a main energy storage coil, a counterpulse capacitor and a small inductor. After counterpulsing the opening switch off, the counterpulse capacitor is recharged by the main energy storage coil before the load pulse is initiated. This gives the counterpulse capacitor sufficient energy for the next counterpulse operation, although the polarity of the capacitor's voltage must be reversed before that can occur. By using a current-zero switch as the counterpulse start switch, the capacitor is disconnected from the circuit (with a full charge) when the load pulse is initiated, preventing the capacitor from depleting its energy store by discharging through the load. After the load pulse is terminated by reclosing the main opening switch, the polarity of the counterpulse capacitor voltage is reversed by discharging the capacitor through a small inductor and interrupting the discharge current oscillation at zero current and peak reversed voltage. The circuit enables high-power, high-repetition-rate operation with reusable switches and features total control (pulse-to-pulse) over output pulse initiation, duration, repetition rate, and, to some extent, risetime.

  15. Reversing-counterpulse repetitive-pulse inductive storage circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1984-06-05

    A high power reversing-counterpulse repetitive-pulse inductive storage and transfer circuit includes an opening switch, a main energy storage coil, a counterpulse capacitor and a small inductor. After counterpulsing the opening switch off, the counterpulse capacitor is recharged by the main energy storage coil before the load pulse is initiated. This gives the counterpulse capacitor sufficient energy for the next counterpulse operation, although the polarity of the capacitor's voltage must be reversed before that can occur. By using a current-zero switch as the counterpulse start switch, the capacitor is disconnected from the circuit (with a full charge) when the load pulse is initiated, preventing the capacitor from depleting its energy store by discharging through the load. After the load pulse is terminated by reclosing the main opening switch, the polarity of the counterpulse capacitor voltage is reversed by discharging the capacitor through a small inductor and interrupting the discharge current oscillation at zero current and peak reversed voltage. The circuit enables high-power, high-repetition-rate operation with reusable switches and features total control (pulse-to-pulse) over output pulse initiation, duration, repetition rate, and, to some extent, risetime.

  16. Reversing-counterpulse repetitive-pulse inductive storage circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1987-02-10

    A high-power reversing-counterpulse repetitive-pulse inductive storage and transfer circuit includes an opening switch, a main energy storage coil, a counterpulse capacitor and a small inductor. After counterpulsing the opening switch off, the counterpulse capacitor is recharged by the main energy storage coil before the load pulse is initiated. This gives the counterpulse capacitor sufficient energy for the next counterpulse operation, although the polarity of the capacitor's voltage must be reversed before that can occur. By using a current-zero switch as the counterpulse start switch, the capacitor is disconnected from the circuit (with a full charge) when the load pulse is initiated, preventing the capacitor from depleting its energy store by discharging through the load. After the load pulse is terminated by reclosing the main opening switch, the polarity of the counterpulse capacitor voltage is reversed by discharging the capacitor through a small inductor and interrupting the discharge current oscillation at zero current and peak reversed voltage. The circuit enables high-power, high-repetition-rate operation with reusable switches and features total control (pulse-to-pulse) over output pulse initiation, duration, repetition rate, and, to some extent, risetime. 10 figs.

  17. Fault current limiter

    DOE Patents [OSTI]

    Darmann, Francis Anthony

    2013-10-08

    A fault current limiter (FCL) includes a series of high permeability posts for collectively define a core for the FCL. A DC coil, for the purposes of saturating a portion of the high permeability posts, surrounds the complete structure outside of an enclosure in the form of a vessel. The vessel contains a dielectric insulation medium. AC coils, for transporting AC current, are wound on insulating formers and electrically interconnected to each other in a manner such that the senses of the magnetic field produced by each AC coil in the corresponding high permeability core are opposing. There are insulation barriers between phases to improve dielectric withstand properties of the dielectric medium.

  18. Final Technical Report: PV Fault Detection Tool.

    SciTech Connect (OSTI)

    King, Bruce Hardison; Jones, Christian Birk

    2015-12-01

    The PV Fault Detection Tool project plans to demonstrate that the FDT can (a) detect catastrophic and degradation faults and (b) identify the type of fault. This will be accomplished by collecting fault signatures using different instruments and integrating this information to establish a logical controller for detecting, diagnosing and classifying each fault.

  19. Colorado Regional Faults

    DOE Data Explorer [Office of Scientific and Technical Information (OSTI)]

    Hussein, Khalid

    2012-02-01

    Citation Information: Originator: Earth Science &Observation Center (ESOC), CIRES, University of Colorado at Boulder Originator: Colorado Geological Survey (CGS) Publication Date: 2012 Title: Regional Faults Edition: First Publication Information: Publication Place: Earth Science & Observation Center, Cooperative Institute for Research in Environmental Science, University of Colorado, Boulder Publisher: Earth Science &Observation Center (ESOC), CIRES, University of Colorado at Boulder Description: This layer contains the regional faults of Colorado Spatial Domain: Extent: Top: 4543192.100000 m Left: 144385.020000 m Right: 754585.020000 m Bottom: 4094592.100000 m Contact Information: Contact Organization: Earth Science &Observation Center (ESOC), CIRES, University of Colorado at Boulder Contact Person: Khalid Hussein Address: CIRES, Ekeley Building Earth Science & Observation Center (ESOC) 216 UCB City: Boulder State: CO Postal Code: 80309-0216 Country: USA Contact Telephone: 303-492-6782 Spatial Reference Information: Coordinate System: Universal Transverse Mercator (UTM) WGS’1984 Zone 13N False Easting: 500000.00000000 False Northing: 0.00000000 Central Meridian: -105.00000000 Scale Factor: 0.99960000 Latitude of Origin: 0.00000000 Linear Unit: Meter Datum: World Geodetic System 1984 (WGS ’984) Prime Meridian: Greenwich Angular Unit: Degree Digital Form: Format Name: Shape file

  20. Base drive circuit

    DOE Patents [OSTI]

    Lange, A.C.

    1995-04-04

    An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.

  1. Base drive circuit

    DOE Patents [OSTI]

    Lange, Arnold C.

    1995-01-01

    An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

  2. Dynamic pulse difference circuit

    DOE Patents [OSTI]

    Erickson, Gerald L.

    1978-01-01

    A digital electronic circuit of especial use for subtracting background activity pulses in gamma spectrometry comprises an up-down counter connected to count up with signal-channel pulses and to count down with background-channel pulses. A detector responsive to the count position of the up-down counter provides a signal when the up-down counter has completed one scaling sequence cycle of counts in the up direction. In an alternate embodiment, a detector responsive to the count position of the up-down counter provides a signal upon overflow of the counter.

  3. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    DOE Patents [OSTI]

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  4. Jitter compensation circuit

    DOE Patents [OSTI]

    Sullivan, J.S.; Ball, D.G.

    1997-09-09

    The instantaneous V{sub co} signal on a charging capacitor is sampled and the charge voltage on capacitor C{sub o} is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V{sub co} signal is split between a gain stage (G = 0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V{sub co} signal is applied to the negative input of a differential amplifier gain stage (G = 10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V{sub co} signal from the instantaneous value of sampled V{sub co} signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V{sub co} values squared divided by the total volt-second product of the magnetic compression circuit. 11 figs.

  5. Jitter compensation circuit

    DOE Patents [OSTI]

    Sullivan, James S.; Ball, Don G.

    1997-01-01

    The instantaneous V.sub.co signal on a charging capacitor is sampled and the charge voltage on capacitor C.sub.o is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V.sub. co signal is split between a gain stage (G=0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V.sub.co signal is applied to the negative input of a differential amplifier gain stage (G=10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V.sub.co signal from the instantaneous value of sampled V.sub.co signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V.sub.co values squared divided by the total volt-second product of the magnetic compression circuit.

  6. Magnetic compression laser driving circuit

    DOE Patents [OSTI]

    Ball, Don G.; Birx, Dan; Cook, Edward G.

    1993-01-01

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 Kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 Kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  7. Magnetic compression laser driving circuit

    DOE Patents [OSTI]

    Ball, D.G.; Birx, D.; Cook, E.G.

    1993-01-05

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  8. PRECISION TIME-DELAY CIRCUIT

    DOE Patents [OSTI]

    Creveling, R.

    1959-03-17

    A tine-delay circuit which produces a delay time in d. The circuit a capacitor, an te back resistance, connected serially with the anode of the diode going to ground. At the start of the time delay a negative stepfunction is applied to the series circuit and initiates a half-cycle transient oscillatory voltage terminated by a transient oscillatory voltage of substantially higher frequency. The output of the delay circuit is taken at the junction of the inductor and diode where a sudden voltage rise appears after the initiation of the higher frequency transient oscillations.

  9. Pipeline coating impedance effects on powerline fault current coupling

    SciTech Connect (OSTI)

    Dabkowski, J.

    1989-12-01

    Prior research leading to the development of predictive electromagnetic coupling computer codes has shown that the coating conductance is the principal factor in determining the response of a pipeline to magnetic induction from an overhead power transmission line. Under power line fault conditions, a high voltage may stress the coating causing a significant change in its conductance, and hence, the coupling response. Based upon laboratory experimentation and analysis, a model has been developed which allows prediction of the modified coating characteristics when subjected to high voltage during fault situations. Another program objective was the investigation of a method to determine the high voltage behavior of an existing coating from low voltage in situ field measurements. Such a method appeared conceptually feasible for non-porous coatings whose conductance is primarily a result of current leakage through existing holidays. However, limited testing has shown that difficulties in determining the steel-electrolyte capacitance limit the application of the method Methods for field measurement of the pipeline coating conductance were also studied for both dc ad ac signal excitation. Ac techniques offer the advantage that cathodic protection current interruption is not required, thus eliminating depolarization effects. However, ac field measurement techniques need additional refinement before these methods can be generally applied. 53 figs.

  10. ELECTRONIC INTEGRATING CIRCUIT

    DOE Patents [OSTI]

    Englemann, R.H.

    1963-08-20

    An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

  11. Photoconductive circuit element reflectometer

    DOE Patents [OSTI]

    Rauscher, C.

    1987-12-07

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a determinable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line. 4 figs.

  12. Photoconductive circuit element reflectometer

    DOE Patents [OSTI]

    Rauscher, Christen (Alexandria, VA)

    1990-01-01

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

  13. ELECTRONIC PULSE SCALING CIRCUITS

    DOE Patents [OSTI]

    Cooke-Yarborough, E.H.

    1958-11-18

    Electronic pulse scaling circults of the klnd comprlsing a serles of bi- stable elements connected ln sequence, usually in the form of a rlng so as to be cycllcally repetitive at the highest scallng factor, are described. The scaling circuit comprises a ring system of bi-stable elements each arranged on turn-off to cause, a succeeding element of the ring to be turned-on, and one being arranged on turn-off to cause a further element of the ring to be turned-on. In addition, separate means are provided for applying a turn-off pulse to all the elements simultaneously, and for resetting the elements to a starting condition at the end of each cycle.

  14. Modeling cortical circuits.

    SciTech Connect (OSTI)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  15. Comparison of Cenozoic Faulting at the Savannah River Site to Fault Characteristics of the Atlantic Coast Fault Province: Implications for Fault Capability

    SciTech Connect (OSTI)

    Cumbest, R.J.

    2000-11-14

    This study compares the faulting observed on the Savannah River Site and vicinity with the faults of the Atlantic Coastal Fault Province and concludes that both sets of faults exhibit the same general characteristics and are closely associated. Based on the strength of this association it is concluded that the faults observed on the Savannah River Site and vicinity are in fact part of the Atlantic Coastal Fault Province. Inclusion in this group means that the historical precedent established by decades of previous studies on the seismic hazard potential for the Atlantic Coastal Fault Province is relevant to faulting at the Savannah River Site. That is, since these faults are genetically related the conclusion of ''not capable'' reached in past evaluations applies.In addition, this study establishes a set of criteria by which individual faults may be evaluated in order to assess their inclusion in the Atlantic Coast Fault Province and the related association of the ''not capable'' conclusion.

  16. The Owens Valley Fault Zone Eastern California and Surface Faulting...

    Open Energy Info (EERE)

    it steps 3 km to the left and continues northwest across Crater Mountain and through Big Pine. The fault has an overall strike of 340 and dip of 8015 ENE. Surface...

  17. Fault Detection Tool Project: Automatic Discovery of Faults using Machine

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Learning Fault Detection Tool Project: Automatic Discovery of Faults using Machine Learning - Sandia Energy Energy Search Icon Sandia Home Locations Contact Us Employee Locator Energy & Climate Secure & Sustainable Energy Future Stationary Power Energy Conversion Efficiency Solar Energy Wind Energy Water Power Supercritical CO2 Geothermal Natural Gas Safety, Security & Resilience of the Energy Infrastructure Energy Storage Nuclear Power & Engineering Grid Modernization

  18. Demultiplexer circuit for neural stimulation

    DOE Patents [OSTI]

    Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean

    2012-10-09

    A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.

  19. Hot Pot Detail - Evidence of Quaternary Faulting

    DOE Data Explorer [Office of Scientific and Technical Information (OSTI)]

    Lane, Michael

    Compilation of published data, field observations and photo interpretation relevant to Quaternary faulting at Hot Pot.

  20. Hot Pot Detail - Evidence of Quaternary Faulting

    DOE Data Explorer [Office of Scientific and Technical Information (OSTI)]

    Lane, Michael

    2013-06-27

    Compilation of published data, field observations and photo interpretation relevant to Quaternary faulting at Hot Pot.

  1. Cell boundary fault detection system

    DOE Patents [OSTI]

    Archer, Charles Jens; Pinnow, Kurt Walter; Ratterman, Joseph D.; Smith, Brian Edward

    2009-05-05

    A method determines a nodal fault along the boundary, or face, of a computing cell. Nodes on adjacent cell boundaries communicate with each other, and the communications are analyzed to determine if a node or connection is faulty.

  2. Fault Controlled | Open Energy Information

    Open Energy Info (EERE)

    has been provided for this term. Add a Definition This classification is used if the literature describes the geothermal fluids as being controlled by faults, but not in detail....

  3. PHOTOSENSITIVE RELAY CONTROL CIRCUIT

    DOE Patents [OSTI]

    Martin, C.F.

    1958-01-14

    adapted for the measurement of the time required for an oscillating member to pass through a preselected number of oscillations, after being damped to a certain maximum amplitude of oscillation. A mirror is attached to the moving member and directs light successively to a photocell which is part of a trigger unit and to first and second photocells which are part of a starter unit, as the member swings to its maximum amplitude. The starter and trigger units comprise thyratrons and relays so interconnected that the trigger circuit, although generating a counter pulse, does not register a count in the counter when the light traverses both photocells of the starter unit. When the amplitude of oscillation of the member decreases to where the second photocell is not transversed, the triggei pulse is received by the counter. The counter taen operates to register the desired number of oscillations and initiates and terminates a timer for measuring the time irterval for the preselected number of oscillations.

  4. Picture of the Week: Circuits of light

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    5 Circuits of light This artistic conceptualization of circuits made of light represents a new capability that could lead to advanced sensor systems, quantum information processing technology, and more. March 25, 2016 circuits of light artist's conception Circuits of light: artist's conception View a super-large 300 dpi version of this image on our Lab Flickr site. Circuits of light This artistic conceptualization of circuits made of light represents a new capability that could lead to advanced

  5. Integrated circuits, and design and manufacture thereof

    DOE Patents [OSTI]

    Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

    2006-04-18

    A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

  6. Counterpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  7. Overpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  8. Solid-state circuit breaker with current limiting characteristic using a superconducting coil

    DOE Patents [OSTI]

    Boenig, Heinrich J.

    1984-01-01

    A thyristor bridge interposes an ac source and a load. A series connected DC source and superconducting coil within the bridge biases the thyristors thereof so as to permit bidirectional ac current flow therethrough under normal operating conditions. Upon a fault condition a control circuit triggers the thyristors so as to reduce ac current flow therethrough to zero in less than two cycles and to open the bridge thereafter. Upon a temporary overload condition the control circuit triggers the thyristors so as to limit ac current flow therethrough to an acceptable level.

  9. Solid-state circuit breaker with current-limiting characteristic using a superconducting coil

    DOE Patents [OSTI]

    Boenig, H.J.

    1982-08-16

    A thyristor bridge interposes an ac source and a load. A series connected DC source and superconducting coil within the bridge biases the thyristors thereof so as to permit bidirectional ac current flow therethrough under normal operating conditions. Upon a fault condition a control circuit triggers the thyristors so as to reduce ac current flow therethrough to zero in less than two eyeles and to open the bridge thereafter. Upon a temporary overload condition the control circuit triggers the thyristors so as to limit ac current flow therethrough to an acceptable level.

  10. printed-circuit heat exchanger PCHE

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    printed-circuit heat exchanger PCHE - Sandia Energy Energy Search Icon Sandia Home ... SunShot Grand Challenge: Regional Test Centers printed-circuit heat exchanger PCHE Home...

  11. Reverse engineering of integrated circuits

    DOE Patents [OSTI]

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  12. Cost of Power Interruptions to Electricity Consumers in the UnitedStates (U.S.)

    SciTech Connect (OSTI)

    Hamachi LaCommare, Kristina; Eto, Joseph H.

    2006-02-16

    The massive electric power blackout in the northeastern U.S.and Canada on August 14-15, 2003 catalyzed discussions about modernizingthe U.S. electricity grid. Industry sources suggested that investments of$50 to $100 billion would be needed. This work seeks to better understandan important piece of information that has been missing from thesediscussions: What do power interruptions and fluctuations in powerquality (power-quality events) cost electricity consumers? We developed abottom-up approach for assessing the cost to U.S. electricity consumersof power interruptions and power-quality events (referred to collectivelyas "reliability events"). The approach can be used to help assess thepotential benefits of investments in improving the reliability of thegrid. We developed a new estimate based on publicly availableinformation, and assessed how uncertainties in these data affect thisestimate using sensitivity analysis.

  13. Thermal fatigue due to beam interruptions in a Lead-Bismuth cooled ATW blanket

    SciTech Connect (OSTI)

    Dunn, F.

    2000-11-15

    Thermal fatigue consequences of frequent accelerator beam interruptions are quantified for both sodium and lead-bismuth cooled blankets in current designs for accelerator transmutation of waste devices. Temperature response was calculated using the SASSYS-1 systems analysis code for an immediate drop in beam current from full power to zero. Coolant temperatures from SASSYS-1 were fed into a multi-node structure temperature calculation to obtain thermal strains for various structural components. Fatigue curves from the American Society of Mechanical Engineers Boiler and Pressure Vessel Code were used to determine the number of cycles that these components could endure, based on these thermal strains. Beam interruption frequency data from a current accelerator were used to estimate design lifetimes for components. Mitigation options for reducing thermal fatigue are discussed.

  14. Tunable circuit for tunable capacitor devices

    DOE Patents [OSTI]

    Rivkina, Tatiana; Ginley, David S.

    2006-09-19

    A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.

  15. Cell boundary fault detection system

    DOE Patents [OSTI]

    Archer, Charles Jens; Pinnow, Kurt Walter; Ratterman, Joseph D.; Smith, Brian Edward

    2011-04-19

    An apparatus and program product determine a nodal fault along the boundary, or face, of a computing cell. Nodes on adjacent cell boundaries communicate with each other, and the communications are analyzed to determine if a node or connection is faulty.

  16. HPCGridSANDReport

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    5916 Unlimited Release Printed July 2013 Series and Parallel Arc-Fault Circuit Interrupter Tests Jay Johnson, boB Gudgel, Andrew Meares, and Armando Fresquez Prepared by Sandia...

  17. Nuclear sensor signal processing circuit

    DOE Patents [OSTI]

    Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.

    2007-02-20

    An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

  18. Vertically Integrated Circuits at Fermilab

    SciTech Connect (OSTI)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  19. Circuit breaker lock out assembly

    DOE Patents [OSTI]

    Gordy, Wade T.

    1984-01-01

    A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly "S" shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

  20. Circuit breaker lock out assembly

    DOE Patents [OSTI]

    Gordy, W.T.

    1983-05-18

    A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly S shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

  1. Sensor/source electrometer circuit

    SciTech Connect (OSTI)

    Hughes, W.J.

    1991-12-31

    A multiple decade electrometer circuit is claimed which can measure low input currents or act as a current source and is comprised of a microprocessor controlled digital to analog converters to derive individual decades. A plurality of decades are created by multiple D-A voltage sources which generate electrometer currents through scaled resistors. After a first series of decades of current are successively produced, the converters are 10 cycled to generate current through new resistors scaled to produce another series decades of current. In this manner, the electrometer circuit generates or senses a plurality of decades of current without significant scale change.

  2. Understanding the cost of power interruptions to U.S. electricity consumers

    SciTech Connect (OSTI)

    LaCommare, Kristina Hamachi; Eto, Joseph H.

    2004-09-01

    The massive electric power blackout in the northeastern United States and Canada on August 14-15, 2003 resulted in the U.S. electricity system being called ''antiquated'' and catalyzed discussions about modernizing the grid. Industry sources suggested that investments of $50 to $100 billion would be needed. This report seeks to quantify an important piece of information that has been missing from these discussions: how much do power interruptions and fluctuations in power quality (power-quality events) cost U.S. electricity consumers? Accurately estimating this cost will help assess the potential benefits of investments in improving the reliability of the grid. We develop a comprehensive end-use framework for assessing the cost to U.S. electricity consumers of power interruptions and power-quality events (referred to collectively as ''reliability events''). The framework expresses these costs as a function of: (1) Number of customers by type in a region; (2) Frequency and type of reliability events experienced annually (including both power interruptions and power-quality events) by these customers; (3) Cost of reliability events; and (4) Vulnerability of customers to these events. The framework is designed so that its cost estimate can be improved as additional data become available. Using our framework, we estimate that the national cost of power interruptions is about $80 billion annually, based on the best information available in the public domain. However, there are large gaps in and significant uncertainties about the information currently available. Notably, we were not able to develop an estimate of power-quality events. Sensitivity analysis of some of these uncertainties suggests that the total annual cost could range from less than $30 billion to more than $130 billion. Because of this large range and the enormous cost of the decisions that may be based on this estimate, we encourage policy makers, regulators, and industry to jointly under take the

  3. Decreasing Beam Auto Tuning Interruption Events with In-Situ Chemical Cleaning on Axcelis GSD

    SciTech Connect (OSTI)

    Fuchs, Dieter; Spreitzer, Stefan; Vogl, Josef [Infineon Technologies AG., Wernerwerkstr.2, 93049 Regensburg (Germany); Bishop, Steve; Eldridge, David; Kaim, Robert [ATMI Inc., 7 Commerce Drive, Danbury, CT 06810 (United States)

    2008-11-03

    Ion beam auto tuning time and success rate are often major factors in the utilization and productivity of ion implanters. Tuning software frequently fails to meet specified setup times or recipe parameters, causing production stoppages and requiring manual intervention. Build-up of conductive deposits in the arc chamber and extraction gap can be one of the main causes of auto tuning problems. The deposits cause glitching and ion beam instabilities, which lead to errors in the software optimization routines. Infineon Regensburg has been testing use of XeF{sub 2}, an in-situ chemical cleaning reagent, with positive results in reducing auto tuning interruption events.

  4. Electric Power Interruption Cost Estimates for Individual Industries, Sectors, and U.S. Economy

    SciTech Connect (OSTI)

    Balducci, Patrick J.; Roop, Joseph M.; Schienbein, Lawrence A.; DeSteese, John G.; Weimar, Mark R.

    2002-02-27

    During the last 20 years, utilities and researchers have begun to understand the value in the collection and analysis of interruption cost data. The continued investigation of the monetary impact of power outages will facilitate the advancement of the analytical methods used to measure the costs and benefits from the perspective of the energy consumer. More in-depth analysis may be warranted because of the privatization and deregulation of power utilities, price instability in certain regions of the U.S. and the continued evolution of alternative auxiliary power systems.

  5. Inverter Ground Fault Overvoltage Testing

    SciTech Connect (OSTI)

    Hoke, Andy; Nelson, Austin; Chakraborty, Sudipta; Chebahtah, Justin; Wang, Trudie; McCarty, Michael

    2015-08-12

    This report describes testing conducted at NREL to determine the duration and magnitude of transient overvoltages created by several commercial PV inverters during ground fault conditions. For this work, a test plan developed by the Forum on Inverter Grid Integration Issues (FIGII) has been implemented in a custom test setup at NREL. Load rejection overvoltage test results were reported previously in a separate technical report.

  6. Driver circuit for solid state light sources

    DOE Patents [OSTI]

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  7. Post regulation circuit with energy storage

    DOE Patents [OSTI]

    Ball, Don G.; Birx, Daniel L.; Cook, Edward G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply and provides energy storage. The charge regulation circuit according to the present invention provides energy storage without unnecessary dissipation of energy through a resistor as in prior art approaches.

  8. Fault Current Limiters (FCL) Fact Sheet | Department of Energy

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Fault Current Limiters (FCL) Fact Sheet Fault Current Limiters (FCL) Fact Sheet Plugging America Into the Future of Power: Superconducting & Solid-state Power Equipment What are Fault Current Limiters Why do we need Fault Current Limiters What are the benefits to utilities Fault Current Limiter projects Fault Current Limiters (926.42 KB) More Documents & Publications An Assessment of Fault Current Limiter Testing Requirements Superconductivity Program Overview Superconductivity for

  9. Delta connected resonant snubber circuit

    DOE Patents [OSTI]

    Lai, Jih-Sheng; Peng, Fang Zheng; Young, Sr., Robert W.; Ott, Jr., George W.

    1998-01-01

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter.

  10. Ionization tube simmer current circuit

    DOE Patents [OSTI]

    Steinkraus, R.F. Jr.

    1994-12-13

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current. 6 figures.

  11. Ionization tube simmer current circuit

    DOE Patents [OSTI]

    Steinkraus, Jr., Robert F.

    1994-01-01

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

  12. Delta connected resonant snubber circuit

    DOE Patents [OSTI]

    Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

    1998-01-20

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

  13. Restoration and testing of an HTS fault current controller

    SciTech Connect (OSTI)

    Waynert, J. A.; Boenig, H.; Mielke, C. H.; Willis, J. O.; Burley, B. L.

    2002-01-01

    A three-phase, 1200 A, 12.5 kV fault current controller using three HTS 4 mH coils, was built by industry and tested in 1999 at the Center Substation of Southern California Edison in Norwalk, CA. During the testing, it appeared that each of the three single-phase units had experienced a voltage breakdown, one externally and two internally. Los Alamos National Laboratory (LANL) was asked by DOE to restore the operation of the fault current controller provided the HTS coils had not been damaged during the initial substation tests. When the internally-failed coil vacuum vessels were opened it became evident that in these two vessels, a flashover had occurred at the high voltage bus section leading to the terminals of the superconducting coil. An investigation into the failure mechanism resulted in six possible causes for the flashover. Based on these causes, the high voltage bus was completely redesigned. Single-phase tests were successfully performed on the modified unit at a 13.7 kV LANL substation. This paper presents the postulated voltage flashover failure mechanisms, the new high voltage bus design which mitigates the failure mechanisms, the sequence of tests used to validate the new design, and finally, the results of variable load and short-circuit tests with the single-phase unit operating on the LANL 13.7 kV substation.

  14. Overpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, Emanuel M.

    1989-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  15. Counterpulse railgun energy recovery circuit

    DOE Patents [OSTI]

    Honig, Emanuel M.

    1986-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  16. Photoconductive circuit element pulse generator

    DOE Patents [OSTI]

    Rauscher, Christen

    1989-01-01

    A pulse generator for characterizing semiconductor devices at millimeter wavelength frequencies where a photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test.

  17. Additive manufacturing of hybrid circuits

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David M.; Hirschfeld, Deidre; Hall, Aaron Christopher

    2016-03-26

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

  18. Fault-tolerant dynamic task graph scheduling

    SciTech Connect (OSTI)

    Kurt, Mehmet C.; Krishnamoorthy, Sriram; Agrawal, Kunal; Agrawal, Gagan

    2014-11-16

    In this paper, we present an approach to fault tolerant execution of dynamic task graphs scheduled using work stealing. In particular, we focus on selective and localized recovery of tasks in the presence of soft faults. We elicit from the user the basic task graph structure in terms of successor and predecessor relationships. The work stealing-based algorithm to schedule such a task graph is augmented to enable recovery when the data and meta-data associated with a task get corrupted. We use this redundancy, and the knowledge of the task graph structure, to selectively recover from faults with low space and time overheads. We show that the fault tolerant design retains the essential properties of the underlying work stealing-based task scheduling algorithm, and that the fault tolerant execution is asymptotically optimal when task re-execution is taken into account. Experimental evaluation demonstrates the low cost of recovery under various fault scenarios.

  19. Sandia Energy - PV Arc-Fault and Ground Fault Detection and Mitigation...

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    prescribe maintenance schedules, and warn of arc-fault events. Investigating the proscons of module-level, string-level, and array-level arc-fault detection schemes....

  20. Method of determining the open circuit voltage of a battery in a closed circuit

    DOE Patents [OSTI]

    Brown, William E.

    1980-01-01

    The open circuit voltage of a battery which is connected in a closed circuit is determined without breaking the circuit or causing voltage upsets therein. The closed circuit voltage across the battery and the current flowing through it are determined under normal load and then a fractional change is made in the load and the new current and voltage values determined. The open circuit voltage is then calculated, according to known principles, from the two sets of values.

  1. Wind Power Plant Short Circuit Current Contribution for Different Fault and Wind Turbine Topologies: Preprint

    SciTech Connect (OSTI)

    Gevorgian, V.; Muljadi, E.

    2010-10-01

    This paper presents simulation results for SC current contribution for different types of WTGs obtained through transient and steady-state computer simulation software.

  2. Efficient Synchronization Stability Metrics for Fault Clearing...

    Office of Scientific and Technical Information (OSTI)

    Title: Efficient Synchronization Stability Metrics for Fault Clearing Authors: Backhaus, Scott N. 1 ; Chertkov, Michael 1 ; Bent, Russell Whitford 1 ; Bienstock, Daniel 2...

  3. Detachment Faulting & Geothermal Resources - Pearl Hot Spring...

    Office of Energy Efficiency and Renewable Energy (EERE) Indexed Site

    Detachment Faulting & Geothermal Resources - Pearl Hot Spring, NV Finding Large Aperture Fractures in Geothermal Resource Areas Using a Three-Component Long-Offset Surface Seismic ...

  4. Reducing the Risk of Arc-Faults

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    arc-fault detection algorithms by: 1. Performing arcing tests at the Distributed Energy Technologies Laboratory (DETL) with AFCI prototypes to verify their functionality on...

  5. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, R.B.; Bowman, D.R.

    1989-04-11

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response. 6 figs.

  6. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, Robert B.; Bowman, Douglas R.

    1989-01-01

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response.

  7. Polysilicon photoconductor for integrated circuits

    DOE Patents [OSTI]

    Hammond, Robert B.; Bowman, Douglas R.

    1990-01-01

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response.

  8. Printed circuit dispersive transmission line

    DOE Patents [OSTI]

    Ikezi, H.; Lin-Liu, Y.R.; DeGrassie, J.S.

    1991-08-27

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other. 5 figures.

  9. Inductive storage pulse circuit device

    DOE Patents [OSTI]

    Parsons, William M.; Honig, Emanuel M.

    1984-01-01

    Inductive storage pulse circuit device which is capable of delivering a series of electrical pulses to a load in a sequential manner. Silicon controlled rectifiers as well as spark gap switches can be utilized in accordance with the present invention. A commutation switching array is utilized to produce a reverse current to turn-off the main opening switch. A commutation capacitor produces the reverse current and is initially charged to a predetermined voltage and subsequently charged in alternating directions by the inductive storage current.

  10. Printed circuit dispersive transmission line

    DOE Patents [OSTI]

    Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; DeGrassie, John S.

    1991-01-01

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

  11. Physiochemical Evidence of Faulting Processes and Modeling of Fluid in Evolving Fault Systems in Southern California

    SciTech Connect (OSTI)

    Boles, James

    2013-05-24

    Our study targets recent (Plio-Pleistocene) faults and young (Tertiary) petroleum fields in southern California. Faults include the Refugio Fault in the Transverse Ranges, the Ellwood Fault in the Santa Barbara Channel, and most recently the Newport- Inglewood in the Los Angeles Basin. Subsurface core and tubing scale samples, outcrop samples, well logs, reservoir properties, pore pressures, fluid compositions, and published structural-seismic sections have been used to characterize the tectonic/diagenetic history of the faults. As part of the effort to understand the diagenetic processes within these fault zones, we have studied analogous processes of rapid carbonate precipitation (scaling) in petroleum reservoir tubing and manmade tunnels. From this, we have identified geochemical signatures in carbonate that characterize rapid CO2 degassing. These data provide constraints for finite element models that predict fluid pressures, multiphase flow patterns, rates and patterns of deformation, subsurface temperatures and heat flow, and geochemistry associated with large fault systems.

  12. Self-triggering superconducting fault current limiter

    DOE Patents [OSTI]

    Yuan, Xing; Tekletsadik, Kasegn

    2008-10-21

    A modular and scaleable Matrix Fault Current Limiter (MFCL) that functions as a "variable impedance" device in an electric power network, using components made of superconducting and non-superconducting electrically conductive materials. The matrix fault current limiter comprises a fault current limiter module that includes a superconductor which is electrically coupled in parallel with a trigger coil, wherein the trigger coil is magnetically coupled to the superconductor. The current surge doing a fault within the electrical power network will cause the superconductor to transition to its resistive state and also generate a uniform magnetic field in the trigger coil and simultaneously limit the voltage developed across the superconductor. This results in fast and uniform quenching of the superconductors, significantly reduces the burnout risk associated with non-uniformity often existing within the volume of superconductor materials. The fault current limiter modules may be electrically coupled together to form various "n" (rows).times."m" (columns) matrix configurations.

  13. Interruptible service system: A demand-side management application for the City of Los Angeles Department of Water & Power

    SciTech Connect (OSTI)

    Leblanc, M.; Sweeney, D.

    1994-12-31

    The Los Angeles Department of Water & Power (LADWP) instituted an electric rate schedule, A3-B, for its largest industrial power consumers in 1985. The A3 rate provides these LADWP customers (2000 Kilowatts or more users) a significant savings on their electric service rate. LADWP benefits by having the capability to interrupt the industrial customer`s load after giving them a 10 minute warning notice of interruption. The Interruptible Service System (ISS) automates this formerly manual process and allows for continuous monitoring of the power used of the power system`s largest power consumers. An ISS remote terminal unit (RTU) is installed at each customer`s site. This RTU communicates with a master computer (desktop PC) at LADWP`s Energy Control Center (ECC). The ECC initiates control, monitoring, and interrupt operations involving all customers on the ISS rate. Communication between the master computer and the various ISS customer RTUs will be accomplished via Pacific Bell Telephone`s advanced digital network (ADN). Future Plans include expansion to monitoring and control of co-generation facilities and monitoring of other large industrial customer power consumption.

  14. MULTI-ELECTRODE TUBE PULSE MEMORY CIRCUIT

    DOE Patents [OSTI]

    Gundlach, J.C.; Reeves, J.B.

    1958-05-20

    Control circuits are described for pulse memory devices for scalers and the like, and more particularly to a driving or energizing circuit for a polycathode gaseous discharge tube having an elongated anode and a successive series of cathodes spaced opposite the anode along its length. The circuit is so arranged as to utilize an arc discharge between the anode and a cathode to count a series of pulses. Upon application of an input pulse the discharge is made to occur between the anode and the next successive cathode, and an output pulse is produced when a particular subsequent cathode is reached. The circuit means for transfering the discharge by altering the anode potential and potential of the cathodes and interconnecting the cathodes constitutes the novel aspects of the invention. A low response time and reduced number of circuit components are the practical advantages of the described circuit.

  15. Realizing a supercapacitor in an electrical circuit

    SciTech Connect (OSTI)

    Fukuhara, Mikio Kuroda, Tomoyuki; Hasegawa, Fumihiko

    2014-11-17

    Capacitors are commonly used in electronic resonance circuits; however, capacitors have not been used for storing large amounts of electrical energy in electrical circuits. Here, we report a superior RC circuit which serves as an electrical storage system characterized by quick charging and long-term discharging of electricity. The improved energy storage characteristics in this mixed electric circuit (R{sub 1}?+?R{sub 2}C{sub 1}) with small resistor R{sub 1}, large resistor R{sub 2}, and large capacitor C{sub 1} are derived from the damming effect by large R{sub 2} in simple parallel R{sub 2}C{sub 1} circuit. However, no research work has been carried out previously on the use of capacitors as electrical energy storage devices in circuits. Combined with nanotechnology, we hope that our finding will play a remarkable role in a variety of applications such as hybrid electric vehicles and backup power supplies.

  16. Termination of a Major Normal Fault | Open Energy Information

    Open Energy Info (EERE)

    sometimes split into multiple closely-spaced faults that result in increased permeability. Fault sets at these terminations sometimes appear as "horsetailing" splays that...

  17. Modeling of fault reactivation and induced seismicity during...

    Office of Scientific and Technical Information (OSTI)

    Modeling of fault reactivation and induced seismicity during hydraulic fracturing of shale-gas reservoirs Citation Details In-Document Search Title: Modeling of fault reactivation ...

  18. Multi-fault Tolerance for Cartesian Data Distributions (Journal...

    Office of Scientific and Technical Information (OSTI)

    Fault-tolerant linear algebra (FTLA) algo- rithms employ additional processors that store parities along the dimensions of a matrix to tolerate multiple, simultaneous faults. ...

  19. Monitoring transients in low inductance circuits

    DOE Patents [OSTI]

    Guilford, R.P.; Rosborough, J.R.

    1985-10-21

    The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.

  20. Multiplexer and time duration measuring circuit

    DOE Patents [OSTI]

    Gray, Jr., James

    1980-01-01

    A multiplexer device is provided for multiplexing data in the form of randomly developed, variable width pulses from a plurality of pulse sources to a master storage. The device includes a first multiplexer unit which includes a plurality of input circuits each coupled to one of the pulse sources, with all input circuits being disabled when one input circuit receives an input pulse so that only one input pulse is multiplexed by the multiplexer unit at any one time.

  1. Hybrid stretchable circuits on silicone substrate

    SciTech Connect (OSTI)

    Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk [Nanoscience Centre, University of Cambridge, Cambridge CB01FF (United Kingdom); Liu, Q.; Suo, Z. [School of Engineering and Applied Sciences and Kavli Institute for Bionano Science and Technology, Harvard University, Cambridge, Massachusetts 02138 (United States); Lacour, S. P., E-mail: stephanie.lacour@epfl.ch [Centre for Neuroprosthetics and Laboratory for Soft Bioelectronics Interfaces, School of Engineering, Ecole Polytechnique Fdrale de Lausanne, Lausanne 1015 (Switzerland)

    2014-04-14

    When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substratea silicone matrix carrying concentric rigid disksensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

  2. Predicting the reliability of electronic circuits.

    SciTech Connect (OSTI)

    Loescher, Douglas H.

    2004-06-01

    Procedures to predict the reliability of electrical circuits are discussed. Three cases are introduced and discussed. In Case 1, an analyst predicts the probability of any failure in the intended relations between circuit inputs and circuit outputs. In Case 2, an analyst predicts the probability that specified unintended outputs would occur. In Case 3, an analyst considers coupling between circuits. Logic models are given for the three cases, and sources of failure probabilities of components are mentioned. Methods of analysis are given, software tools are mentioned, and recommendations for presentation and review of results are discussed.

  3. Jabil Circuit Inc | Open Energy Information

    Open Energy Info (EERE)

    Florida Zip: 33716 Sector: Services Product: Florida-based company offering manufacturing and product management services for electronic goods. References: Jabil Circuit...

  4. Circuits of Atoms on Wires of Light

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Circuits of Atoms on Wires of Light 1663 Los Alamos science and technology magazine Latest Issue:July 2016 past issues All Issues » submit Circuits of Atoms on Wires of Light A new kind of circuitry-with electrons on conducting wires replaced by atoms on paths of laser light-is ushering in an era of "atomtronic" technology. March 8, 2016 Artist visualization of atomic circuits Los Alamos scientists have developed a reliable new way to create atomtronic circuits with waves of

  5. Modeling of transformers using circuit simulators

    SciTech Connect (OSTI)

    Archer, W.E.; Deveney, M.F.; Nagel, R.L.

    1994-07-01

    Transformers of two different designs; and unencapsulated pot core and an encapsulated toroidal core have been modeled for circuit analysis with circuit simulation tools. We selected MicroSim`s PSPICE and Anology`s SABER as the simulation tools and used experimental BH Loop and network analyzer measurements to generate the needed input data. The models are compared for accuracy and convergence using the circuit simulators. Results are presented which demonstrate the effects on circuit performance from magnetic core losses, eddy currents, and mechanical stress on the magnetic cores.

  6. Vertical Circuits Inc | Open Energy Information

    Open Energy Info (EERE)

    and intellectual property for the manufacture of low cost ultra high-speedhigh-density semiconductor components. References: Vertical Circuits, Inc.1 This article is a...

  7. Demultiplexer circuit for neural stimulation (Patent) | DOEPatents

    Office of Scientific and Technical Information (OSTI)

    all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. ...

  8. Shapeable short circuit resistant capacitor

    DOE Patents [OSTI]

    Taylor, Ralph S.; Myers, John D.; Baney, William J.

    2015-10-06

    A ceramic short circuit resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The capacitor that exhibits a benign failure mode in which a multitude of discrete failure events result in a gradual loss of capacitance. Each event is a localized event in which localized heating causes an adjacent portion of one or both of the electrodes to vaporize, physically cleaning away electrode material from the failure site. A first metal electrode, a second metal electrode, and a ceramic dielectric layer between the electrodes are thin enough to be formed in a serpentine-arrangement with gaps between the first electrode and the second electrode that allow venting of vaporized electrode material in the event of a benign failure.

  9. Beta-gamma discriminator circuit

    SciTech Connect (OSTI)

    Erkkila, B.H.; Wolf, M.A.; Eisen, Y.; Unruh, W.P.; Brake, R.J.

    1984-01-01

    The major difficulty encountered in the determination of beta-ray dose in field conditions is generally the presence of a relatively high gamma-ray component. Conventional dosimetry instruments use a shield on the detector to estimate the gamma-ray component in comparison with the beta-ray component. More accurate dosimetry information can be obtained from the measured beta spectrum itself. At Los Alamos, a detector and discriminator circuit suitable for use in a portable spectrometer have been developed. This instrument will discriminate between gammas and betas in a mixed field. The portable package includes a 256-channel MCA which can be programmed to give a variety of outputs, including a spectral display, and may be programmed to read dose directly.

  10. Sequential power-up circuit

    DOE Patents [OSTI]

    Kronberg, James W.

    1992-01-01

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable.

  11. Sequential power-up circuit

    DOE Patents [OSTI]

    Kronberg, J.W.

    1992-06-02

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable. 2 figs.

  12. TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT

    DOE Patents [OSTI]

    Smith, V.L.; Carstensen, H.K.

    1959-11-24

    An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.

  13. Maze solving automatons for self-healing of open interconnects: Modular add-on for circuit boards

    SciTech Connect (OSTI)

    Nair, Aswathi; Raghunandan, Karthik; Yaswant, Vaddi; Sambandan, Sanjiv E-mail: ssanjiv@isu.iisc.ernet.in; Pillai, Sreelal S.

    2015-03-23

    We present the circuit board integration of a self-healing mechanism to repair open faults. The electric field driven mechanism physically restores fractured interconnects in electronic circuits and has the ability to solve mazes. The repair is performed by conductive particles dispersed in an insulating fluid. We demonstrate the integration of the healing module onto printed circuit boards and the ability of maze solving. We model and perform experiments on the influence of the geometry of conductive particles as well as the terminal impedances of the route on the healing efficiency. The typical heal rate is 10 μm/s with healed route having mean resistance of 8 kΩ across a 200 micron gap and depending on the materials and concentrations used.

  14. Mechanical Models of Fault-Related Folding

    SciTech Connect (OSTI)

    Johnson, A. M.

    2003-01-09

    The subject of the proposed research is fault-related folding and ground deformation. The results are relevant to oil-producing structures throughout the world, to understanding of damage that has been observed along and near earthquake ruptures, and to earthquake-producing structures in California and other tectonically-active areas. The objectives of the proposed research were to provide both a unified, mechanical infrastructure for studies of fault-related foldings and to present the results in computer programs that have graphical users interfaces (GUIs) so that structural geologists and geophysicists can model a wide variety of fault-related folds (FaRFs).

  15. Reusable vibration resistant integrated circuit mounting socket

    DOE Patents [OSTI]

    Evans, Craig N.

    1995-01-01

    This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

  16. HVAC Fault Detection and Diagnosis Toolkit

    Energy Science and Technology Software Center (OSTI)

    2004-12-31

    This toolkit supports component-level model-based fault detection methods in commercial building HVAC systems. The toolbox consists of five basic modules: a parameter estimator for model calibration, a preprocessor, an AHU model simulator, a steady-state detector, and a comparator. Each of these modules and the fuzzy logic rules for fault diagnosis are described in detail. The toolbox is written in C++ and also invokes the SPARK simulation program.

  17. A connecting network with fault tolerance capabilities

    SciTech Connect (OSTI)

    Ciminiera, L.; Serra, A.

    1986-06-01

    A new multistage interconnection network is presented in this paper. It is able to handle the communications between the connected devices correctly, even in the presence of fault(s) in the network. This goal is achieved by using redundant paths with a fast procedure able to dynamically reroute the message. It is also shown that the rerouting properties are still valid when broadcasting transmission is used.

  18. Different Factors Affecting Short Circuit Behavior of a Wind Power Plant

    SciTech Connect (OSTI)

    Muljadi, E.; Samaan, Nader A.; Gevorgian, Vahan; Li, Jun; Pasupulati, Subbaiah

    2010-12-21

    A wind power plant consists of a large number of turbines interconnected by underground cable. A pad-mount transformer at each turbine steps up the voltage from generating voltage (690 V) to a medium voltage (34.5 kV). All turbines in the plant are connected to the substation transformer where the voltage is stepped up to the transmission level. An important aspect of wind power plant (WPP) impact studies is to evaluate the short-circuit (SC) current contribution of the plant into the transmission network under different fault conditions. This task can be challenging to protection engineers due to the topology differences between different types of wind turbine generators (WTGs) and the conventional generating units. This paper investigates the short circuit behavior of a wind power plant for different types of faults. The impact of wind turbine types, the transformer configuration, and the reactive compensation capacitor will be investigated. The voltage response at different buses will be observed. Finally, the SC line currents will be presented along with its symmetrical components.

  19. Different Factors Affecting Short Circuit Behavior of a Wind Power Plant

    SciTech Connect (OSTI)

    Muljadi, E.; Samaan, Nader A.; Gevorgian, Vahan; Li, Jun; Pasupulati, Subbaiah

    2013-01-31

    A wind power plant consists of a large number of turbines interconnected by underground cable. A pad-mount transformer at each turbine steps up the voltage from generating voltage (690 V) to a medium voltage (34.5 kV). All turbines in the plant are connected to the substation transformer where the voltage is stepped up to the transmission level. An important aspect of wind power plant (WPP) impact studies is to evaluate the short-circuit (SC) current contribution of the plant into the transmission network under different fault conditions. This task can be challenging to protection engineers due to the topology differences between different types of wind turbine generators (WTGs) and the conventional generating units. This paper investigates the short circuit behavior of a wind power plant for different types of faults. The impact of wind turbine types, the transformer configuration, and the reactive compensation capacitor will be investigated. The voltage response at different buses will be observed. Finally, the SC line currents will be presented along with its symmetrical components.

  20. BLOCKING OSCILLATOR DOUBLE PULSE GENERATOR CIRCUIT

    DOE Patents [OSTI]

    Haase, J.A.

    1961-01-24

    A double-pulse generator, particuiarly a double-pulse generator comprising a blocking oscillator utilizing a feedback circuit to provide means for producing a second pulse within the recovery time of the blocking oscillator, is described. The invention utilized a passive network which permits adjustment of the spacing between the original pulses derived from the blocking oscillator and further utilizes the original pulses to trigger a circuit from which other pulses are initiated. These other pulses are delayed and then applied to the input of the blocking oscillator, with the result that the output from the oscillator circuit contains twice the number of pulses originally initiated by the blocking oscillator itself.

  1. Overload protection circuit for output driver

    DOE Patents [OSTI]

    Stewart, Roger G.

    1982-05-11

    A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.

  2. Industrial Circuit Breakers |GE Global Research

    Broader source: All U.S. Department of Energy (DOE) Office Webpages (Extended Search)

    Journey Inside the Complex and Powerful World of Industrial Circuit Breakers Click to email this to a friend (Opens in new window) Share on Facebook (Opens in new window) Click to share (Opens in new window) Click to share on LinkedIn (Opens in new window) Click to share on Tumblr (Opens in new window) A Journey Inside the Complex and Powerful World of Industrial Circuit Breakers Kathleen O'Brien 2015.04.21 Most of us only think about circuit breakers when one trips because we plugged in too

  3. Legos for the Fabrication of Atomically Precise Electronic Circuits...

    Office of Science (SC) Website

    circuits for faster, more energy efficient electronics and advanced solar cells. ... used to produce high performance circuits for use in future electronics and solar cells. ...

  4. Unitech Printed Circuit Board Corp UPCB | Open Energy Information

    Open Energy Info (EERE)

    Sector: Solar Product: Taiwan-based printed-circuit board maker with intent to enter into solar cell manufacturing industry. References: Unitech Printed Circuit Board Corp....

  5. Serpentine and corduroy circuits to enhance the stretchability...

    Office of Scientific and Technical Information (OSTI)

    The apparatus comprises a stretchable polymer body, and at least one circuit line operatively connected to the stretchable polymer body, the at least one circuit line extending in ...

  6. Serpentine and corduroy circuits to enhance the stretchablity...

    Office of Scientific and Technical Information (OSTI)

    The apparatus comprises a stretchable polymer body, and at least one circuit line operatively connected to the stretchable polymer body, the at least one circuit line extending in ...

  7. Measuring and Modeling Fault Density for Plume-Fault Encounter Probability Estimation

    SciTech Connect (OSTI)

    Jordan, P.D.; Oldenburg, C.M.; Nicot, J.-P.

    2011-05-15

    Emission of carbon dioxide from fossil-fueled power generation stations contributes to global climate change. Storage of this carbon dioxide within the pores of geologic strata (geologic carbon storage) is one approach to mitigating the climate change that would otherwise occur. The large storage volume needed for this mitigation requires injection into brine-filled pore space in reservoir strata overlain by cap rocks. One of the main concerns of storage in such rocks is leakage via faults. In the early stages of site selection, site-specific fault coverages are often not available. This necessitates a method for using available fault data to develop an estimate of the likelihood of injected carbon dioxide encountering and migrating up a fault, primarily due to buoyancy. Fault population statistics provide one of the main inputs to calculate the encounter probability. Previous fault population statistics work is shown to be applicable to areal fault density statistics. This result is applied to a case study in the southern portion of the San Joaquin Basin with the result that the probability of a carbon dioxide plume from a previously planned injection had a 3% chance of encountering a fully seal offsetting fault.

  8. Internal configuration of prismatic lithium-ion cells at the onset of mechanically induced short circuit

    DOE Public Access Gateway for Energy & Science Beta (PAGES Beta)

    Wang, Hsin; Simunovic, Srdjan; Maleki, Hosein; Howard, Jason N.; Hallmark, Jerald A.

    2016-01-01

    The response of Li-ion cells to mechanically induced internal electrical shorts is an important safety performance metric design. We assume that the battery internal configuration at the onset of electrical short influences the subsequent response and can be used to gauge the safety risk. We subjected a series of prismatic Li-ion cells to lateral pinching using 0.25", 0.5", 1", 2" and 3" diameter steel balls until the onset of internal short. The external aluminum enclosure froze the internal cell configuration at the onset of short and enabled us to cross-section the cells, and take the cross-section images. The images indicatemore » that an internal electric short is preceded by extensive strain partitioning in the cells, fracturing and tearing of the current collectors, and cracking and slipping of the electrode layers with multiple fault lines across multiple layers. These observations are at odds with a common notion of homogeneous deformation across the layers and strain hardening of electrodes that eventually punch through the separator and short the cell. The faults are akin to tectonic movements of multiple layers that are characteristic of granular materials and bonded aggregates. As a result, the short circuits occur after extensive internal faulting, which implies significant stretching and tearing of separators.« less

  9. Internal configuration of prismatic lithium-ion cells at the onset of mechanically induced short circuit

    SciTech Connect (OSTI)

    Wang, Hsin; Simunovic, Srdjan; Maleki, Hosein; Howard, Jason N.; Hallmark, Jerald A.

    2016-01-01

    The response of Li-ion cells to mechanically induced internal electrical shorts is an important safety performance metric design. We assume that the battery internal configuration at the onset of electrical short influences the subsequent response and can be used to gauge the safety risk. We subjected a series of prismatic Li-ion cells to lateral pinching using 0.25", 0.5", 1", 2" and 3" diameter steel balls until the onset of internal short. The external aluminum enclosure froze the internal cell configuration at the onset of short and enabled us to cross-section the cells, and take the cross-section images. The images indicate that an internal electric short is preceded by extensive strain partitioning in the cells, fracturing and tearing of the current collectors, and cracking and slipping of the electrode layers with multiple fault lines across multiple layers. These observations are at odds with a common notion of homogeneous deformation across the layers and strain hardening of electrodes that eventually punch through the separator and short the cell. The faults are akin to tectonic movements of multiple layers that are characteristic of granular materials and bonded aggregates. As a result, the short circuits occur after extensive internal faulting, which implies significant stretching and tearing of separators.

  10. Demultiplexer circuit for neural stimulation (Patent) | DOEPatents

    Office of Scientific and Technical Information (OSTI)

    to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array ...

  11. Analog circuit for controlling acoustic transducer arrays

    SciTech Connect (OSTI)

    Drumheller, Douglas S.

    1991-01-01

    A simplified ananlog circuit is presented for controlling electromechanical transducer pairs in an acoustic telemetry system. The analog circuit of this invention comprises a single electrical resistor which replaces all of the digital components in a known digital circuit. In accordance with this invention, a first transducer in a transducer pair of array is driven in series with the resistor. The voltage drop across this resistor is then amplified and used to drive the second transducer. The voltage drop across the resistor is proportional and in phase with the current to the transducer. This current is approximately 90 degrees out of phase with the driving voltage to the transducer. This phase shift replaces the digital delay required by the digital control circuit of the prior art.

  12. Circuit level modeling of inductive elements

    SciTech Connect (OSTI)

    Muyshondt, G.P.; Portnoy, W.M.

    1989-01-01

    Design and analysis of spacecraft power systems have been difficult to perform because of the lack of circuit level models for nonlinear inductive elements. This paper reviews some of the models which have been proposed, their limitations, and applications. An improved saturation dependent model will be described. The model has been implemented in SPICE and with a commercial circuit program and demonstrated to be satisfactory in both implementations. 3 refs., 9 figs.

  13. Electrochemically controlled charging circuit for storage batteries

    DOE Patents [OSTI]

    Onstott, E.I.

    1980-06-24

    An electrochemically controlled charging circuit for charging storage batteries is disclosed. The embodiments disclosed utilize dc amplification of battery control current to minimize total energy expended for charging storage batteries to a preset voltage level. The circuits allow for selection of Zener diodes having a wide range of reference voltage levels. Also, the preset voltage level to which the storage batteries are charged can be varied over a wide range.

  14. Communications circuit including a linear quadratic estimator

    DOE Patents [OSTI]

    Ferguson, Dennis D.

    2015-07-07

    A circuit includes a linear quadratic estimator (LQE) configured to receive a plurality of measurements a signal. The LQE is configured to weight the measurements based on their respective uncertainties to produce weighted averages. The circuit further includes a controller coupled to the LQE and configured to selectively adjust at least one data link parameter associated with a communication channel in response to receiving the weighted averages.

  15. Dynamical Systems in Circuit Designer's Eyes

    SciTech Connect (OSTI)

    Odyniec, M.

    2011-05-09

    Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)

  16. Equivalent Circuit Modeling of Hysteresis Motors

    SciTech Connect (OSTI)

    Nitao, J J; Scharlemann, E T; Kirkendall, B A

    2009-08-31

    We performed a literature review and found that many equivalent circuit models of hysteresis motors in use today are incorrect. The model by Miyairi and Kataoka (1965) is the correct one. We extended the model by transforming it to quadrature coordinates, amenable to circuit or digital simulation. 'Hunting' is an oscillatory phenomenon often observed in hysteresis motors. While several works have attempted to model the phenomenon with some partial success, we present a new complete model that predicts hunting from first principles.

  17. Fault Detection and Load Distribution for the Wind Farm Challenge

    SciTech Connect (OSTI)

    Borchehrsen, Anders B.; Larsen, Jesper A.; Stoustrup, Jakob

    2014-08-24

    In this paper a fault detection system and a fault tolerant controller for a wind farm model. The wind farm model used is the one proposed as a public challenge. In the model three types of faults are introduced to a wind farm consisting of nine turbines. A fault detection system designed, by taking advantage of the fact that within a wind farm several wind turbines will be operating under all most identical conditions. The turbines are then grouped, and then turbines within each group are used to generate residuals for turbines in the group. The generated residuals are then evaluated using dynamical cumulative sum. The designed fault detection system is cable of detecting all three fault types occurring in the model. But there is room for improving the fault detection in some areas. To take advantage of the fault detection system a fault tolerant controller for the wind farm has been designed. The fault tolerant controller is a dispatch controller which is estimating the possible power at each individual turbine and then setting the reference accordingly. The fault tolerant controller has been compared to a reference controller. And the comparison shows that the fault tolerant controller performance better in all measures. The fault detection and a fault tolerant controller has been designed, and based on the simulated results the overall performance of the wind farm is improved on all measures. Thereby this is a step towards improving the overall performance of current and future wind farms.

  18. Active shunt capacitance cancelling oscillator circuit

    DOE Patents [OSTI]

    Wessendorf, Kurt O.

    2003-09-23

    An oscillator circuit is disclosed which can be used to produce oscillation using a piezoelectric crystal, with a frequency of oscillation being largely independent of any shunt capacitance associated with the crystal (i.e. due to electrodes on the surfaces of the crystal and due to packaging and wiring for the crystal). The oscillator circuit is based on a tuned gain stage which operates the crystal at a frequency, f, near a series resonance frequency, f.sub.S. The oscillator circuit further includes a compensation circuit that supplies all the ac current flow through the shunt resistance associated with the crystal so that this ac current need not be supplied by the tuned gain stage. The compensation circuit uses a current mirror to provide the ac current flow based on the current flow through a reference capacitor that is equivalent to the shunt capacitance associated with the crystal. The oscillator circuit has applications for driving piezoelectric crystals for sensing of viscous, fluid or solid media by detecting a change in the frequency of oscillation of the crystal and a resonator loss which occur from contact of an exposed surface of the crystal by the viscous, fluid or solid media.

  19. Buried pipelines in large fault movements

    SciTech Connect (OSTI)

    Wang, L.J.; Wang, L.R.L.

    1995-12-31

    Responses of buried pipelines in large fault movements are examined based upon a non-linear cantilever beam analogy. This analogy assumes that the pipeline in a large deflection zone behaves like a cantilever beam under a transverse-concentrated shear at the inflection point with a uniformly distributed soil pressure along the entire span. The tangent modulus approach is adopted to analyze the coupled axial force-bending moment interaction on pipeline deformations in the inelastic range. The buckling load of compressive pipeline is computed by the modified Newmark`s numerical integration scheme. Parametric studies of both tensile and compressive pipeline responses to various fault movements, pipeline/fault crossing angles, soil/pipe friction angles, buried depths, pipe diameters and thickness are investigated. It is shown by the comparisons that previous findings were unconservative.

  20. VCSEL fault location apparatus and method

    DOE Patents [OSTI]

    Keeler, Gordon A.; Serkland, Darwin K.

    2007-05-15

    An apparatus for locating a fault within an optical fiber is disclosed. The apparatus, which can be formed as a part of a fiber-optic transmitter or as a stand-alone instrument, utilizes a vertical-cavity surface-emitting laser (VCSEL) to generate a test pulse of light which is coupled into an optical fiber under test. The VCSEL is subsequently reconfigured by changing a bias voltage thereto and is used as a resonant-cavity photodetector (RCPD) to detect a portion of the test light pulse which is reflected or scattered from any fault within the optical fiber. A time interval .DELTA.t between an instant in time when the test light pulse is generated and the time the reflected or scattered portion is detected can then be used to determine the location of the fault within the optical fiber.

  1. Fault-tolerant three-level inverter

    DOE Patents [OSTI]

    Edwards, John; Xu, Longya; Bhargava, Brij B.

    2006-12-05

    A method for driving a neutral point clamped three-level inverter is provided. In one exemplary embodiment, DC current is received at a neutral point-clamped three-level inverter. The inverter has a plurality of nodes including first, second and third output nodes. The inverter also has a plurality of switches. Faults are checked for in the inverter and predetermined switches are automatically activated responsive to a detected fault such that three-phase electrical power is provided at the output nodes.

  2. Triple effect absorption chiller utilizing two refrigeration circuits

    DOE Patents [OSTI]

    DeVault, Robert C.

    1988-01-01

    A triple effect absorption method and apparatus having a high coefficient of performance. Two single effect absorption circuits are combined with heat exchange occurring between a condenser and absorber of a high temperature circuit, and a generator of a low temperature circuit. The evaporators of both the high and low temperature circuits provide cooling to an external heat load.

  3. Differential transimpedance amplifier circuit for correlated differential amplification

    DOE Patents [OSTI]

    Gresham, Christopher A.; Denton, M. Bonner; Sperline, Roger P.

    2008-07-22

    A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

  4. Protective circuit for thyristor controlled systems and thyristor converter embodying such protective circuit

    DOE Patents [OSTI]

    Downhower, Jr., Francis H.; Finlayson, Paul T.

    1984-04-10

    A snubber circuit coupled across each thyristor to be gated in a chain of thyristors determines the critical output of a NOR LATCH whenever one snubber circuit could not be charged and discharged under normal gating conditions because of a short failure.

  5. Oregon Cascades Play Fairway Analysis: Faults and Heat Flow maps

    SciTech Connect (OSTI)

    Adam Brandt

    2015-11-15

    This submission includes a fault map of the Oregon Cascades and backarc, a probability map of heat flow, and a fault density probability layer. More extensive metadata can be found within each zip file.

  6. Lockout device for high voltage circuit breaker

    DOE Patents [OSTI]

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1993-01-01

    An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the repsective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

  7. Dual circuit embossed sheet heat transfer panel

    DOE Patents [OSTI]

    Morgan, G.D.

    1984-02-21

    A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet. 6 figs.

  8. Dual circuit embossed sheet heat transfer panel

    DOE Patents [OSTI]

    Morgan, Grover D.

    1984-01-01

    A heat transfer panel provides redundant cooling for fusion reactors or the like environment requiring low-mass construction. Redundant cooling is provided by two independent cooling circuits, each circuit consisting of a series of channels joined to inlet and outlet headers. The panel comprises a welded joinder of two full-size and two much smaller partial-size sheets. The first full-size sheet is embossed to form first portions of channels for the first and second circuits, as well as a header for the first circuit. The second full-sized sheet is then laid over and welded to the first full-size sheet. The first and second partial-size sheets are then overlaid on separate portions of the second full-sized sheet, and are welded thereto. The first and second partial-sized sheets are embossed to form inlet and outlet headers, which communicate with channels of the second circuit through apertures formed in the second full-sized sheet.

  9. Lockout device for high voltage circuit breaker

    DOE Patents [OSTI]

    Kozlowski, L.J.; Shirey, L.A.

    1993-01-26

    An improved lockout assembly is provided for a circuit breaker to lock the switch handle into a selected switch position. The lockout assembly includes two main elements, each having a respective foot for engaging a portion of the upper housing wall of the circuit breaker. The first foot is inserted into a groove in the upper housing wall, and the second foot is inserted into an adjacent aperture (e.g., a slot) in the upper housing wall. The first foot is slid under and into engagement with a first portion, and the second foot is slid under and into engagement with a second portion of the upper housing wall. At the same time the respective two feet are placed in engagement with the respective portions of the upper housing wall, two holes, one on each of the respective two main elements of the assembly, are placed in registration; and a locking device, such as a special scissors equipped with a padlock, is installed through the registered holes to secure the lockout assembly on the circuit breaker. When the lockout assembly of the invention is secured on the circuit breaker, the switch handle of the circuit breaker is locked into the selected switch position and prevented from being switched to another switch position.

  10. Deep drilling phase of the Pen Brand Fault Program

    SciTech Connect (OSTI)

    Stieve, A.

    1991-05-15

    This deep drilling activity is one element of the Pen Branch Fault Program at Savannah River Site (SRS). The effort will consist of three tasks: the extension of wells PBF-7 and PBF-8 into crystalline basement, geologic and drilling oversight during drilling operations, and the lithologic description and analysis of the recovered core. The drilling program addresses the association of the Pen Branch fault with order fault systems such as the fault that formed the Bunbarton basin in the Triassic.