Jutman, Artur - Faculty of Information Technology, Tallinn University of Technology

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Jutman, Artur - Faculty of Information Technology, Tallinn University of Technology

LABORATORY TRAINING FOR TEACHING DESIGN AND TEST OF DIGITAL CIRCUITS
Consider the test set that consists of three test sequences s1, s2 and s3.
WEB-BASED TRAINING SYSTEM FOR TEACHING BASICS OF RT-LEVEL DIGITAL DESIGN, TEST, AND DESIGN FOR TEST
Fast Static Compaction of Test Sequences using Implications and Greedy Search J. Raik, A. Jutman, R. Ubar
Fast Static Compaction of Tests Composed of Independent Sequences: Basic Properties and Comparison of Methods
HIERARCHICAL DESIGN ERROR DIAGNOSIS IN COMBINATIONAL CIRCUITS
Improving the Efficiency of Timing Simulation of Digital Circuits by Using Structurally Synthesized BDDs
Teaching Digital RT-Level Self-Test using a Java Applet S. Devadze, A. Jutman, A. Sudnitson, R. Ubar
Java Applets Support for an Asynchronous-Mode Learning of Digital Design and Test
On SSBDD Model Size & Complexity Artur Jutman
Struktuursete binaarsete otsustusdiagrammide rakendamine digitaalskeemide asnkroonseks
Turbo Tester -Diagnostic Package for Research and Training , A.Jutman1
WEB-BASED APPLET FOR TEACHING BOUNDARY SCAN STANDARD IEEE 1149.1