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Nannarelli, Alberto - Institut for Informatik og Matematisk Modellering, Danmarks Tekniske Universitet
Combined Radix-10 and Radix-16 Division Unit Tomas Lang and Alberto Nannarelli
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Digit-Recurrence Dividers with Reduced Logical Depth
POWERDELAY TRADEOFFS IN RESIDUE NUMBER SYSTEM Alberto Nannarelli, Gian Carlo Cardarilli and Marco Re
Low Power and Low Leakage Implementation of RNS FIR Filters
A Tool for Automatic Generation of RTLLevel VHDL Description of RNS FIR Filters
Residue Number System for Low-Power DSP Applications
Programmable Power-of-two RNS Scaler and its Application to a QRNS Polyphase Filter
RNS Implementation of High Performance Filters for Satellite Demultiplexing
A Variant of a Radix-10 Combinational Multiplier Luigi Dadda
Net Balanced Floorplanning Based on Elastic Energy Model
On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters
ADAPTO: full-adder based reconfigurable architecture for bit level operations
Impact of RNS Coding Overhead on FIR Filters Performance
LOW-POWER IMPLEMENTATION OF POLYPHASE FILTERS IN QUADRATIC RESIDUE NUMBER SYSTEM
A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters
Reducing Power Dissipation in Pipelined Accumulators
Power Dissipation in Division Wei Liu and Alberto Nannarelli
Low-power adaptive filter based on RNS G.L. Bernocchi, G.C. Cardarilli, A. Del Re, A. Nannarelli and M. Re
Division Unit for Binary Integer Decimals Tomas Lang and Alberto Nannarelli
Post-placement Temperature Reduction Techniques Wei Liu, Alberto Nannarelli
A Combined Decimal and Binary Floating-point Divider
Power Dissipation Challenges in Multicore Floating-Point Units
Degrading Precision Arithmetics for Low-power FIR Implementation