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Davoodi, Azadeh - Department of Electrical and Computer Engineering, University of Wisconsin at Madison
A Parallel Integer Programming Approach to Global Routing
Representative Path Selection for Post-Silicon Timing Prediction Under Variability
A Pareto-Algebraic Framework for Signal Power Optimization in Global Routing
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. , NO. 1 GRIP: Global Routing via Integer Programming
Copyright 2008 American Scientific Publishers All rights reserved
Power-Driven Global Routing for Multi-Supply Voltage Domains
Trace Signal Selection to Enhance Timing and Logic Visibility in Post-Silicon Validation
Post-Silicon Diagnosis of Segments of Failing Speedpaths due to Manufacturing Variations
Demonstration of A Modern Physical Design Flow Using the Silicon Virtual Prototyping Back-End Tools of Cadence
GRIP: Scalable 3D Global Routing Using Integer Programming
A PARALLEL INTEGER PROGRAMMING APPROACH TO GLOBAL ROUTING
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Congestion Analysis for Global Routing via Integer Programming
