- Design-space Optimization for Automatic Acceleration of Streaming Applications
- Acceleration of Binomial Options Pricing via Parallelizing along Time-axis on a GPU
- Financial Monte Carlo Simulation on Architecturally Diverse Systems
- Analytic Performance Models for Bounded Queueing Praveen Krishnamurthy
- Application Development on Hybrid Systems Roger D. Chamberlain
- Automatic Deployment of Streaming Applications on Hybrid Architectures
- Exploiting Reconfigurability for Text Search Roger D. Chamberlain
- Impact of CMP Design on High-Performance Embedded Patrick Crowley
- Dusty Caches for Reference Counting Garbage Collection Scott Friedman, Praveen Krishnamurthy,
- Parallel Matlab Computation for STAP Clutter Scattering Function Estimation and Moving Target Estimation
- Experimental Federated Modeling of an Optical Data Path
- An FPGA-based Search Engine for Unstructured
- The Mercury System: Exploiting Truly Fast Hardware
- Modeling the Power Consumption of Audio Signal Processing
- Performance Evaluation of a Reconfigurable, Embedded Photonic Multiring
- Relationships Between Computational System Performance and
- Analysis of Computational System Performance in Automatic Target
- Fairness Issues in an Embedded Photonic Ring Interconnect
- Fair Scheduling in an Optical Interconnection Network
- The Gemini Interconnect: Data Path Measurements
- How Are We Doing? An Efficiency Measure for Shared, Heterogeneous
- Design of an Optically-Interconnected Multiprocessor
- Crossing Timezones in the TimeTrial Performance Monitor
- Rapid RNA Folding: Analysis and Acceleration of the Zuker Recurrence
- Reliable Real-time Clinical Monitoring Using Sensor Network Technology
- Efficient Runtime Performance Monitoring of FPGA-based Applications
- Globally Clocked Magnetic Logic Circuits Michael Hall
- Understanding the Performance of Streaming Applications Deployed on Hybrid Systems
- Performance of Direct Attached Disk Subsystems Roger D. Chamberlain
- A Banded Smith-Waterman FPGA Accelerator for Mercury Brandon Harris, Arpith C. Jacob, Joseph M. Lancaster,
- Preliminary results in accelerating profile HMM search on Arpith Jacob, Joseph Lancaster,
- Evaluating Dusty Caches on General Workloads Praveen Krishnamurthy, Roger D. Chamberlain,
- Automatic Application-Specific Microarchitecture Reconfiguration
- Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory
- Evaluating the Performance of Photonic Interconnection
- Design of an Interconnection Network Using VLSI Photonics and Free-Space
- Harsh RealityHarsh Reality Memory MattersMemory Matters
- Keeping Track of Free BlocksKeeping Track of Free Blocks Method 1Method 1: Implicit list using lengths: Implicit list using lengths ----links all blockslinks all blocks
- CSE 361S Intro to Systems Software Assignment #2
- CSE 361S Intro to Systems Software Final Project
- Performance Predictions for Speculative, Synchronous,
- Accelerating HMMER on GPUs by Implementing Hybrid Data and Task Parallelism
- Streaming Data from Disk Store to Application Roger D. Chamberlain
- Simulation of Streaming Applications on Multicore Saurabh Gayen
- Wireless Data Path for a Mobile, Modular Computer System
- FPGA-accelerated seed generation in Mercury BLASTP Arpith Jacob, Joseph Lancaster,
- VLSI Photonic Ring Interconnect for Embedded Multicomputers
- Scalable Softcore Vector Processor for Biosequence Applications
- Washington University School of Engineering and Applied Science
- /* abstract data type for vector */ typedef struct {
- The Mercury System: Embedding Computation
- Dynamic Reconfigurable Computing Benjamin C. Brodie
- Novel Techniques for Processing Unstructured Data Sets Roger Chamberlain
- CSE 361S Intro to Systems Software Assignment #3
- Deadlock Avoidance for Streaming Computations with Filtering
- Distributed Algorithms for the Placement of Network Services
- Embedding Applications within a Storage Appliance Roger D. Chamberlain
- Predicting the Future: Resource Requirements
- Simbench: A Logic Simulation Benchmark Set
- CSE 361S Intro to Systems Software Assignment #1
- Microarchitecture Optimization for Embedded Systems
- Motivations for Virtual MemoryMotivations for Virtual Memory Use Physical DRAM as a Cache for the DiskUse Physical DRAM as a Cache for the Disk
- Analytic Performance Model for Speculative, Synchronous,
- Sorting on Architecturally Diverse Computer Systems Roger D. Chamberlain
- Massively Parallel Data Mining Using Reconfigurable Hardware
- Power Consumption of Customized Numerical Representations
- An Architecture for Fast Processing of Large Unstructured Data Sets
- CSE 361S Intro to Systems Software Lab Assignment #4
- Deadlock-avoidance for Streaming Applications with Split-Join Structure: Two Case Studies
- Breaking the Memory Bottleneck with an Optical Data Path
- Acceleration of Ungapped Extension in Mercury BLAST
- Better Languages for More Effective Designing Roger D. Chamberlain
- Cycle-Accurate Microarchitecture Performance Evaluation Richard Hough, Phillip Jones, Scott Friedman,
- Comparing Edge-cuts to Communications Volume in
- Accelerator Design for Protein Sequence HMM Search Rahul P. Maddimsetty
- Biosequence Similarity Search on the Mercury System
- Application-guided Tool Development for Architecturally Diverse Computation
- Improving Cluster Utilization through Intelligent Processor Gary Stiehr
- Parallel Logic Simulation of VLSI Systems
- Optical Switching System for MPP, LAN, or WAN Systems
- Application Development for Hybrid Pipelined Systems Mark A. Franklin, Patrick Crowley, Roger D. Chamberlain,
- Optical Network Reconfiguration for Signal Processing Applications
- Optimal Runtime Reconfiguration Strategies for Systolic Arrays
- Visions for Application Development on Hybrid Computing Systems
- Achieving Real Data Throughput for an FPGA Co-Processor on
- Implementation of Hearing Aid Signal Processing Algorithms on the TI DHP-100 Platform
- Dynamic Reconfiguration of an Optical Interconnect
- Most of the computations the hearing aid is performing
- Performance Model for Speculative Simulation
- Intro to Systems Software Short description
- Direct-Attached Disk Subsystem Performance Assessment Roger D. Chamberlain
- Design of throughput-optimized arrays from recurrence abstractions
- X-Sim: A Federated Heterogeneous Simulation Environment
- Empirical Performance Assessment Using Soft-Core Processors on Reconfigurable Hardware
- Vision for Liquid Architecture Roger D. Chamberlain
- Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures
- Mercury BLASTN: Faster DNA Sequence Comparison Using a Streaming Hardware Architecture
- Novel Numerical Representations for Low-Power Audio Signal Processing
- A Federated Simulation Environment for Hybrid Systems Saurabh Gayen
- Highly-Scalable Reconfigurable Computing Roger D. Chamberlain*
- Tradeoffs Between Quality of Results and Resource Consumption in a
- Dependence of Recognition Accuracy on Available Network
- Intel P6Intel P6 Internal Designation for Successor to PentiumInternal Designation for Successor to Pentium
- Number Representations Make binary more human friendly
- Introduction Contact Information
- CSE 361S Intro to Systems Software Due: Thursday, Sept. 8, 2011
- Noise Analysis of a Current-Mode Read Circuit for Sensing Magnetic Tunnel Junction Resistance
- Setting up Linux VM with Virtual Box Last modified: 8/26/2011
- Hardware and Instruction Set Architecture
- Evaluation of the Placement of Network Services Todd Sproull
- CSE 361S Intro to Systems Software Assignment #1
- Intro to Systems Software Short description
- CSE 361S Intro to Systems Software Assignment #2
- CSE 361S Intro to Systems Software Due: Thursday, September 22, 2011
- Towards More Effective Spectrum Use Based on Memory Allocation Models
- Rolling Partial Prefix-Sums To Speedup Evaluation of Uniform and Affine Recurrence Equations
- Asking for Performance: Exploiting Developer Intuition to Guide Instrumentation with TimeTrial
- TimeTrial: A Low-Impact Performance Profiler for Streaming Data Applications
- Digital Systems and Information Representationp
- CSE 361S Intro to Systems Software Due: Thursday, October 6, 2011
- CSE 361S Intro to Systems Software Lab Assignment #5
- Heterogeneous Data Structures Pointers and Arrays
- Memory Allocation Harsh RealityHarsh Reality
- Control Flow Assembly Control Flow
- Call/Return Protocols observe: register set used for efficient access
- Pointers in C A pointer is a variable that contains the address
- Virtual Memory Motivations for Virtual MemoryMotivations for Virtual Memory
- Crossing Boundaries in TimeTrial: Monitoring Communications Across Architecturally Diverse
- Memory Technologies First we will cover several memory
- CSE 361S Intro to Systems Software Assignment #4
- CSE 361S Intro to Systems Software Due: Thursday, October 13, 2011
- One Step Translation Simple translation will work
- 53NOVEMBER 2011 PERSPECTIVES
- Cache Memory Writing Cache Friendly CodeWriting Cache Friendly Code
- Normal Control Flow Normal execution sequence is
- Memory Allocation and Usage Keeping Track of Free BlocksKeeping Track of Free Blocks
- Bloom Filter Performance on Graphics Engines Roger D. Chamberlain
- Basic Program Structure Assembly Standard Form
- Addressing and Basic Machine Languageg g
- Performance Optimization Compiler Optimization
- Intel P6 Virtual Memory Intel P6Intel P6
- CSE 361S Intro to Systems Software Assignment #3
- CSE 361S Intro to Systems Software Final Project
- Stack Frame Pass Parameters
- Rolling Partial Prefix-Sums To Speedup Evaluation of Uniform and Affine Recurrence Equations
- Optimal Design-Space Exploration of Streaming Applications
