- Context-Free-Grammar based Token Tagger in Reconfigurable Devices Young H. Cho and James Moscola and John W. Lockwood
- Deep Network Packet Filter Design for Reconfigurable Devices
- Context-Free Grammar Parsing for High-Speed Network Applications in Reconfigurable Hardware
- An Adapative Frequency Control Method using Thermal Feedback for Reconfigurable Hardware
- Hardware-Accelerated Parser for Extraction of Metadata in Semantic Network Content
- A THERMAL MANAGEMENT AND PROFILING METHOD FOR RECONFIGURABLE HARDWARE APPLICATIONS
- IMPLEMENTATION OF NETWORK APPLICATION LAYER PARSER FOR MULTIPLE TCP/IP FLOWS IN RECONFIGURABLE DEVICES
- Reconfigurable Context-Free Grammar Based Data Processing Hardware with Error Recovery
- ADAPTIVE THERMOREGULATION FOR APPLICATIONS ON RECONFIGURABLE Phillip H. Jones, James Moscola, Young H. Cho, John W. Lockwood
- YOUNG H. CHO Contact: 10125 De Soto Ave #20
- Changing Output Quality for Thermal Management Phillip H. Jones, James Moscola, Young H. Cho, John W. Lockwood
- Fast Reconfiguring Deep Packet Filter for 1+ Gigabit Network Young H. Cho and William H. Mangione-Smith
- NetFPGA Logic Analyzer Andrew Goodney, Shailesh Narayan, Mengchen Wang, Peigen Sun, Vivek Bhandwalkar, Young H. Cho
- Streaming Hierarchical Clustering for Concept Mining Moshe Looks, Andrew Levine, G. Adam Covington, Ronald P. Loui, John W. Lockwood, Young H. Cho
- Young H. Cho Last Updated 02/05/10 Office Address: 4676 Admiralty Way, Suite 1001, Marina del Rey, CA 90292
- Pattern Based Packet Filtering using NetFPGA in DETER Infrastructure
- High-Performance Context-Free Parser for Polymorphic Malware Detection
- A Pattern Matching Co-processor for Network Security Young H. Cho and William H. Mangione-Smith
- Programmable Hardware for Deep Packet Filtering on a Large Signature Set
- Optimized Automatic Target Recognition Algorithm on Scalable Myrinet/Field Programmable Array Nodes
- Scalable Softcore Vector Processor for Biosequence Applications Arpith C. Jacob, Brandon Harris, and Young H. Cho
- A Hardware Implementation of Hierarchical Clustering Shobana Padmanabhan, Moshe Looks, Dan Legorreta, Young Cho, and John Lockwood
- Context-Free-Grammar based Token Tagger in Reconfigurable Devices
- Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohen and Brian Bray*
- Scalable, Network-Connected, Reconfigurable, Hardware Accelerators
- Deep Packet Filter with Dedicated Logic and Read Only Memories Young H. Cho and William H. Mangione-Smith
- A Scalable Hybrid Regular Expression Pattern Matcher James Moscola, Young H. Cho, John W. Lockwood
- Sensitivity Analysis of Gigabit Concept Mining System Andrew Levine, Ron Loui, John W. Lockwood, Young H. Cho
- HIGH SPEED DOCUMENT CLUSTERING IN RECONFIGURABLE HARDWARE G. Adam Covington, Charles L.G. Comstock, Andrew A. Levine, John W. Lockwood, Young H. Cho
- Optimization of Vertical and Horizontal Beamforming Kernels on the PowerPC G4 Processor with AltiVec Technology
- Dynamically Optimizing FPGA Applications by Monitoring Temperature and Phillip H. Jones, Young H. Cho, John W. Lockwood
- A RECONFIGURABLE ARCHITECTURE FOR MULTI-GIGABIT SPEED CONTENT-BASED ROUTING
- Scoped Identifiers for Efficient Bit Aligned Logging Computer Science Department
- YOUNG H. CHO Contact: 10125 De Soto Ave #20
- Young H. Cho Last Updated 06/29/11 Address: Informatics Division
