- Effective Blame for Information-Flow Violations Trent Jaeger
- Quantitative Analysis of Systems Using Game-Theoretic Learning
- Convergence Testing in Term-Level Bounded Model Checking ?
- A Translation of Statecharts to Esterel S. A. Seshia 1? , R. K. Shyamasundar 1 , A. K. Bhattacharjee 2 , and
- Abstraction-based Satis ability Solving of Presburger Arithmetic ?
- Appeared at LICS'04 Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution
- Appeared at CAV'03 Unbounded, Fully Symbolic Model Checking of
- Counterexample-Guided SMT-Driven Optimal Buffer Sizing
- A Comparison and Combination of Theory Generation and Model Checking for Security Protocol Analysis
- Automating Security Mediation Placement Dave King1, Susmit Jha2, Divya Muthukumaran1,
- Modeling and Verification of OutofOrder Microprocessors in UCLID
- GameTime: A Toolkit for Timing Analysis of Software Sanjit A. Seshia and Jonathan Kotker
- CalCS: SMT Solving for Non-Linear Convex Constraints
- Symbolic Reachability Analysis of Lazy Linear Hybrid Automata
- A Graphical Environment for the Speci cation and Veri cation of Reactive Systems
- Verification-Guided Soft Error Resilience Sanjit A. Seshia
- Deciding CLU Logic Formulas via Boolean and Pseudo-Boolean Encodings
- The UCLID Decision Procedure # Shuvendu K. Lahiri and Sanjit A. Seshia
- A Modular Checker for Multithreaded Programs Cormac Flanagan 1 , Shaz Qadeer 1 , and Sanjit A. Seshia 2#
- Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic
- Quantitative Analysis of Software: Challenges and Recent Advances
- Abstraction-Based Performance Analysis of NoCs Daniel E. Holcomb
- Scalable Specification Mining for Verification and UC Berkeley
- Oracle-Guided Component-Based Program Synthesis UC Berkeley
- Synthesizing Switching Logic for Safety and Dwell-Time Requirements
- Deciding Bit-Vector Arithmetic with Abstraction
- Automatic Model Generation for Black Box Real-Time Systems Thomas Huining Feng
- On Voting Machine Design for Verification and Testability Cynthia Sturton Susmit Jha Sanjit A. Seshia David Wagner
- Optimizations of an Application-Level Protocol for Enhanced Dependability in FlexRay
- Semantics-Aware Malware Detection Mihai Christodorescu
- Appeared at CAV'03 Unbounded, Fully Symbolic Model Checking of
- An Introductory Textbook on Cyber-Physical Systems Edward A. Lee
- Localizing Transient Faults Using Dynamic Bayesian Networks
- Post-Silicon Validation Opportunities, Challenges and Recent Advances
- Algorithms for Green Buildings: Learning-Based Techniques for Energy Prediction and Fault Diagnosis
- Design as You See FIT: System-Level Soft Error Analysis of Sequential Circuits Daniel Holcomb Wenchao Li Sanjit A. Seshia
- Autonomic Reactive Systems via Online Learning Sanjit A. Seshia
- Appeared at LICS'04 Deciding QuantifierFree Presburger Formulas Using Parameterized Solution
- IEEE PROCEEDINGS, VOL. XXX, NO. YYY, DATE 1 Distributed Real-Time Software
- Mining Assumptions for Synthesis UC Berkeley
- An Introductory Capstone Design Course on Embedded Systems
- Synthesis of Optimal Switching Logic for Hybrid Systems EECS Dept., UC Berkeley
- Synthesis with Clairvoyance Orna Kupferman1
- Sciduction: Combining Induction, Deduction, and Structure for Verification and Synthesis
- Timing Analysis of Interrupt-Driven Programs under Context Bounds
