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- FPGA Implementation of a Bartlett Direction of Arrival Algorithm for a 5.8GHz Circular Antenna Array
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- DesignCon 2005 Connectorless Logic Analyzer
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- Broadband Impedance Matching for Inductive Interconnect in VLSI Packages
- Design of a Radiation Tolerant Computing System Based on a Many-Core FPGA Architecture
- Brock J. LaMeres Montana State University Bozeman
- CHARACTERIZATION OF A PRINTED CIRCUIT BOARD VIA
- IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 15, NO. 4, DECEMBER 2000 433 An Approach to Evaluate the General Performance of
- IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 33, NO. 1, FEBRUARY 2010 37 Novel 3-D Coaxial Interconnect System for Use
- Abstract: This paper presents the design and Finite Element Analysis (FEA) of a controlled impedance chip-to-chip interconnect system using coplanar wire bonds. Our proposed system uses on-chip coplanar transmission lines which
- Electrical Characterization of a Novel Coaxial Die-to-Die Interconnect
- DesignCon 2008 Characterization Methodology for
- 3D/SiP Advanced Packaging Symposium, April 28-30, 2008, Durham, NC. Off-Chip Coaxial-to-Coplanar Transition
- IEEE Electronics System-Integration Technology Conference, (ESTC), September 1-4, 2008, Greenwhich, London UK. (accepted) Fabrication Process For A Novel High Speed Coplanar-to-Coaxial Off-Chip Interconnect
- 2008 Military & Aerospace Programmable Logic Devices (MAPLD) Conference, Sept. 15-18, 2008, Annapolis, MD. A Power-Efficient Design Approach to Radiation Hardened Digital Circuitry
- Erwin Dunbar, Pat Kujawa, & David Racek Advisor: Dr. Brock J. LaMeres
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- Memory Futures (Track 2) High Speed Digital Systems Require
- Logic Analyzer Connectorless Probing Reduces Loading and Footprint Impact on DDR Memory Validation
- DesignConEast 2005 Connectorless Logic Analyzer
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- Differential Logic Analyzer Probing Brock J. LaMeres
- Spatial Avoidance of Hardware Faults using FPGA Partial Reconfiguration of Tile-Based Soft Processors
- Digital system designers are turning to FPGAs as their main building blocks due to their flexibility and scalability. They've become the key enabler for configurable computing architectures. But debugging an FPGA is still one of the most time-
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- The four pins of the retention module can easily be soldered after the board has been loaded. This is an improvement over attempting to hand load fine-pitch connectors.
- step z for each simulation of the phase-matched case. This is measured on an average 600 MHz Pentium III PC, which
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- NASA Symposium on VLSI Design, June 4-5, 2007, Post Falls, ID. Off-Chip Coaxial to Microstrip Transition
- Todd Kaiser, Brian Peterson, Eric Gowens, Brock LaMeres Ionization radiation passing through the sensor creates electron hole
- DESIGN AND IMPLEMENTATION OF A FUZZY LOGIC-BASED VOLTAGE CONTROLLER FOR VOLTAGE REGULATION
- DesignConEast 2005 Design of a Low-Power
- DesignCon 2005 Performance Model for Inter-
- Improved Student Learning of Microprocessor Systems Through Hands-On and Online Experience
- AC 2011-531: THE MONTANA MULE: A CASE STUDY IN INTERDISCI-PLINARY CAPSTONE DESIGN
- Position Sensitive Radiation Detector Integrated with an FPGA for Radiation Tolerant Computing
- AC 2010-415: IMPROVED STUDENT LEARNING OF MICROPROCESSOR SYSTEMS THROUGH HANDS-ON AND ONLINE EXPERIENCE
- Comparing Student Learning in a Required Electrical Engineering Undergraduate Course
- Design and Test of FPGA-Based Direction-of-Arrival Algorithms for Adaptive Array Antennas
- A position sensitive radiation sensor was modeled, developed and fabricated then interfaced with a field programmable gate array
- AC 2011-457: A COMPARISON OF HANDS-ON VERSUS REMOTE LAB-ORATORY EXPERIENCE FOR INTRODUCTORY MICROPROCESSORS
- U.S. Government Work not protected by U.S. copyright 1 Error Mitigation of Point-to-Point Communication for
