- A Reconfigurable FIR Filter Embedded in a 9b Successive Approximation ADC
- 432 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 3, MARCH 2002 Brief Papers_______________________________________________________________________________
- 352 2007 IEEE International Solid-State Circuits Conference ISSCC 2007 / SESSION 19 / CELLULAR AND MULTI-MODE TRANSCEIVERS / 19.9
- A 2.5mW 80dB DR 36dB SNDR 22MS/s Logarithmilc Pipeline ADC Jongwoo Lee, Sunghyun Park, Joshua Kang, Jae-sun Seo, Jens Anders and Michael Flynn
- 9 2006 IEEE International Solid-State Circuits Conference ISSCC 2006 / SESSION 31 / VERY HIGH-SPEED ADCs AND DACs / 31.3
- 2464 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 11, NOVEMBER 2008 A 14 mW Fractional-N PLL Modulator With a Digital
- 1704 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--I: REGULAR PAPERS, VOL. 53, NO. 8, AUGUST 2006 A Regenerative Comparator Structure With
- 310 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 3, MARCH 2002 A Low-Power 8-PAM Serial Transceiver
- A Flexible 5 Receiver with
- A Compact 5GHz Q-enhanced Standing-Wave Resonator-based Filter in 0.13m CMOS
- A Compact 5GHz Standing-Wave Resonator-based VCO in 0.13m Dan Shi, Jack East and Michael P. Flynn
- Miniaturized X-Band On-Chip Slot Antenna in 0.13m Nader Behdad1,2
- Session ID: 11A.3 Paper ID: ET11A3 ICCAD 05 Flynn and Kang, University of Michigan Global Signaling over Lossy Transmission Lines
- A Low-power 8-PAM Serial-Transceiver in 0.5m digital CMOS David J. Foley
- ])4/b(a[V15VV ijrefinres
- A 3.3V, 1.6GHz, Low-Jitter, Self-Correcting DLL Based Clock Synthesizer in 0.5m CMOS.
- 1932 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 12, DECEMBER 1998 A 400-Msample/s, 6-b CMOS
- IEEE SENSORS JOURNAL, VOL. 6, NO. 3, JUNE 2006 557 An RF-Powered, Wireless
- AN RF POWERED, WIRELESS TEMPERATURE SENSOR IN QUARTER MICRON CMOS Fatih Kocer, Paul M. Walsh, and Michael P. Flynn
- A `Digital' 6-bit ADC in 0.25m CMOS Conor Donovan
- CMOS DLL Based 2V, 3.2ps Jitter, 1GHz Clock Synthesizer and Temperature-Compensated Tunable Oscillator.
- A 9Gbit/s Serial Transceiver for On-chip Global Signaling over Lossy Transmission Lines
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS--II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 50, NO. 5, MAY 2003 205 Digital Calibration Incorporating Redundancy of
- A Fully Integrated Auto-Calibrated Super-Regenerative Receiver
- We describe a 64 channel closed-loop deep brain stimulator IC for use in research and treatment of Parkinson's disease. The
- Wireless, remotely powered telemetry in 0.25m CMOS Fatih Kocer, Paul M. Walsh, and Michael P. Flynn
- A 57dB SFDR Digitally Calibrated 500MS/s Folding ADC in 0.18m digital CMOS
- A 12b 50MS/s 3.5mW SAR Assisted 2-Stage Pipeline ADC Chun C. Lee1,2
- An Injection Locked, RF Powered, Telemetry IC in 0.25m CMOS Fatih Kocer, Paul M. Walsh, and Michael P. Flynn
- 1142 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 5, MAY 2006 A New Transponder Architecture With On-Chip ADC
- A 5GHz Fully Integrated Super-regenerative Receiver with On-chip Slot Antenna in 0.13m CMOS
