- An Assembler for the MSSP Distiller Eric Zimmerman
- 2005 by Eric J. Zimmerman. All rights reserved. PROFILE-DIRECTED IF-CONVERSION IN SUPERSCALAR MICROPROCESSORS
- Identifying Important and Difficult Concepts in Introductory Computing Courses using a Delphi Process
- Branch-on-Random Edward Lee Craig Zilles
- Hardware Atomicity for Reliable Software Speculation Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, and Craig Zilles
- Proof by Incomplete Enumeration and Other Logical Misconceptions
- SPIMbot: An Engaging, Problem-based Approach to Teaching Assembly Language Programming
- 0 1000 2000 3000 4000 5000 number of iterations
- A TASK OPTIMIZATION FRAMEWORK FOR MSSP RAHUL ULHAS JOSHI
- SPIMbot: An Engaging, Problem-based Approach to Teaching Assembly Language Programming
- A Criticality Analysis of Clustering in Superscalar Processors Pierre Salverda Craig Zilles
- Identifying Important and Difficult Concepts in Introductory Computing Courses using a Delphi Process
- Fundamental Performance Constraints in Horizontal Fusion of In-order Cores
- A Characterization of Instruction-level Error Derating and its Implications for Error Detection
- An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
- Implications of False Conflict Rate Trends for Robust Software Transactional Memory
- An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
- Dependence-Based Scheduling Revisited: A Tale of Two Baselines Pierre Salverda Craig Zilles
- Brief Announcement: Transactional Memory and the Birthday Paradox
- Hardware Transactional Memory Support for Lightweight Dynamic Language Evolution
- Extending Hardware Transactional Memory to Support Non-busy Waiting and Non-transactional Actions
- Probabilistic Counter Updates for Predictor Hysteresis and Stratification Nicholas Riley Craig Zilles
- Probabilistic Counter Updates for Predictor Hysteresis and Bias
- On the Energy Effectiveness of If-conversion in Superscalar Microprocessors
- Challenges to Providing Performance Isolation in Transactional Memories Craig Zilles and David H. Flint
- TraceVis: An Execution Trace Visualization Tool James Roberts
- Reactive Techniques for Controlling Software Speculation Craig Zilles Naveen Neelakantam
- Increasing Interactivity by Predicting User Actions Interactive workloads are characterized by relatively long periods of idle time punctuated with bursts of activity (see
- Targeted Path Profiling: Lower Overhead Path Profiling for Staged Dynamic Optimization Systems
- UniversityofWisconsin-MadisonTechnicalReport1438.Availablefromhttp://www.cs.wisc.edu/~zilles/papers/mssp-tr1438.pdf Master/Slave Speculative Parallelization with Distilled Programs
- UniversityofWisconsinTechnicalReport-TR1430 Time-Shifted Modules: Exploiting Code Modularity
- The Use of Multithreading for Exception Handling
- HAPTIC RENDERING: PROGRAMMING TOUCH INTERACTION WITH VIRTUAL OBJECTS
- TraceVis: An Execution Trace Visualization Tool James Evan Roberts
- A Project Summary The goal of this project is to improve assessment of student learning in computer science. To this end, this work pro-
- Formally Defining and Verifying Master/Slave Speculative Parallelization
- Student Misconceptions in an Introductory Logic Design Course J.T. Longino, Michael Loui, and Craig Zilles*
- BOOLEAN BLUNDERS: IDENTIFICATION AND ASSESSMENT OF STUDENT MISCONCEPTIONS
- Session T1A 0-7803-9077-6/05/$20.00 2005 IEEE October 19 22, 2005, Indianapolis, IN
- Decomposing the Load-Store Queue by Function for Power Reduction and Scalability
- Some challenges facing Transactional Memory Craig Zilles and Lee Baugh, U. Illinois In the context of a shared-memory approach to exposing thread-level parallelism, Transactional Memory
- Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional
- Accordion Arrays: Selective Compression of Unicode Arrays in Java Craig Zilles
- Accurate Critical Path Analysis via Random Trace Construction
- PROGRAM ORIENTEERING NAVEEN NEELAKANTAM
- Proof by Incomplete Enumeration and Other Logical Misconceptions
- Formal Verification of MSSP Pierre Salverda
- Session 2: Tracing and Characterization Optimizing UNIX for OLTP on CC-NUMA
- Session 3: Design Tradeoff Analysis Characterization, Tracing, and Optimization of Commercial I/O Workloads
- FIRST WORKSHOP ON COMPUTER ARCHITECTURE EVALUATION USING COMMERCIAL WORKLOADS
- Session 4: Simulation Environments Multiprocessor Architecture Evaluation using Commercial Applications
- CAECWWorkshop' Tracedriven
- Performance Performance
- Instructionlevel Performance
- Instruction SupportWorkloads
- Effectiveness performance
- Performance Characterization
- Information Information
- WebWorkload Characterization
- Prefetching for DatabaseWorkloads SunMicrosystems Srikanth
